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Author SHA1 Message Date
Samuel Pitoiset
ba9988d230 radv: remove useless use of radv_image_use_comp_to_single() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34231>
 2025-03-31 11:55:02 +00:00
Samuel Pitoiset
5398ec6356 radv: add queue family assertions when doing decompression passes 
This is to make sure the previous functions that are supposed to
trigger a decompression pass work as expected.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34231>
 2025-03-31 11:55:02 +00:00
Samuel Pitoiset
086f529bbe radv: do not trigger FCE or FMASK decompress on compute queue 
A pipeline barrier which contains an image layout transition like
COLOR_ATTACHMENT_OPTIMAL -> TRANSFER_DST_OPTIMAL on compute queue
would just hang. Such a barrier is useless in practice but it's legal.

Prevent GPU hangs by skipping FCE or FMASK_DECOMPRESS when it's not
on the graphics queue.

Fixes dEQP-VK.synchronization2.layout_transition.compute_transition*.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34231>
 2025-03-31 11:55:02 +00:00
Danylo Piliaiev
be481e6615 tu: Disable FS in certain cases even if FS is not empty 
If FS doesn't have side-effects and color write mask is zero.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33735>
 2025-03-31 12:15:56 +02:00
Danylo Piliaiev
71238fb4d8 ir3: Detect FS that write only color without other side effects 
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33735>
 2025-03-31 12:15:56 +02:00
Danylo Piliaiev
ace933455c tu/a7xx: Bypass invoking empty FS for D/S-only draw calls 
It is important to get D/S only draw calls to bypass invoking
the fragment shader. The public documentation for Adreno states:
  "Hint the driver to engage Fast-Z by using an empty fragment
   shader and disabling frame buffer write masks for renderpasses
   that modify Z values only."
  "The GPU has a special mode that writes Z-only pixels at twice
   the normal rate."

We are promised a big performance improvement in this case.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33735>
 2025-03-31 12:15:56 +02:00
Danylo Piliaiev
b0a98d3b13 ir3: Detect empty fragment shaders 
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33735>
 2025-03-31 12:15:56 +02:00
Danylo Piliaiev
3d76f307b6 freedreno/regs: Rename BINNING bit to FS_DISABLE in a few regs 
In most cases it is used in binning, but it is also used when
FS is empty in order to signal that FS shouldn't be invoked.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33735>
 2025-03-31 12:15:56 +02:00
Erik Faye-Lund
aa8fec638f panvk: add basic driconf infrastructure 
This hooks up some driconfs for WSI, as well as the force_vk_vendor
DRIconf. Nothing panvk specific for now.

Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33895>
 2025-03-31 09:24:04 +00:00
Erik Faye-Lund
4fabd37a3c panvk: enable KHR_line_rasterization support 
This allows users to toggle between rectangular and bresenham style
rasterization.

The bresenham style rasterization is performed by disabling
multisampling and changing the end-points to be axis-aligned. This is
similar to what we already do in Gallium.

Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33844>
 2025-03-31 09:03:05 +00:00
Georg Lehmann
de45676efd aco/insert_exec: reset exec temporary after combined p_demote + p_end_wqm 
Otherwise the next divergent merge block might re-enable demoted invocations.

Fixes: 90faadae72 ("aco/insert_exec_mask: don't disable dead quads on demote in divergent CF")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12898
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12912
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34278>
 2025-03-31 06:43:22 +00:00
Hyunjun Ko
ae75376c8f anv: Move rateControlMode to the video session. 
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34250>
 2025-03-31 04:25:14 +00:00
Trigger Huang
f03b385d4b radeonsi: Fix perfcounter start event in si_pc_emit_start 
The original typo caused performance counters to send STOP events
instead of START, leading to incorrect profiling data.

Fixes: 1a1138817c ("radeonsi: add a new PM4 helper radeon_event_write")

Signed-off-by: Trigger Huang <Trigger.Huang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34236>
 2025-03-31 02:36:48 +00:00
Faith Ekstrand
59b01dc764 nvk: Disable 32k images on Pascal A 
While we're here, add a comment about why we have this restriction in
the first place since NVK and the proprietary driver are different here.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34281>
 2025-03-30 20:29:13 -05:00
Faith Ekstrand
65d06d91ca nvk: Use max_image_dimension for maxFramebufferWidth/Height 
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34281>
 2025-03-30 20:29:07 -05:00
Faith Ekstrand
c1674d4dfe nvk: Disable vulkanMemoryModel on Kepler and earlier 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34281>
 2025-03-30 20:16:25 -05:00
Marek Olšák
b74a6e05bd glapi: fix x86 32-bit asm dispatch regression 
shared_glapi_mapi_tmp.h must be included before asm("x86_entry_end:").

Fixes: fae087770a - glapi: simplify codegen macros
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34269>
 2025-03-29 22:36:21 +00:00
Eric Engestrom
359f69ba0c ci: add FDO_RUNNER_JOB_PRIORITY_TAG_* to control priority of generic freedesktop runners 
This affects:
- generic jobs (sanity, rustfmt, shader-db, docs, etc.)
- linux image builds
- linux mesa builds
- software renderer tests
- android tests
- virgl & venus tests

Marge pipelines get high priority, nightly pipelines get low priority,
and everything else is in between.

(Hardware test farms have their own mechanisms.)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34264>
 2025-03-29 18:17:24 +01:00
Eric Engestrom
88f70e48f5 ci: move android's kvm requirement to .use-debian/x86_64_test-android 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34264>
 2025-03-29 18:17:24 +01:00
Eric Engestrom
e45f2e6c46 ci: move aarch64 tag to .use-debian/arm64_build 
Like we do in the other `.use-debian/arm64_*`.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34264>
 2025-03-29 18:17:24 +01:00
Eric Engestrom
76a6ce40e1 ci: drop packet.net tag on git archive job 
We are no longer on that infrastructure, and we no longer need to
specify which one we are on.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34271>
 2025-03-29 10:38:03 +00:00
Aaron Ruby
d64df991bb gbm/dri: Match zink autoloading from egl 
Essentially, match the Zink autoloading order that was implemented as
part of https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25640

Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34163>
 2025-03-29 09:18:47 +00:00
Mike Blumenkrantz
49aec32f57 zink: block inferred loading for swrast 
this should always load llvmpipe

Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34163>
 2025-03-29 09:18:47 +00:00
Aaron Ruby
9ee435f92a egl: Remove FallbackZink config item entirely 
Its effect was negated as part of: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29771

Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34163>
 2025-03-29 09:18:47 +00:00
David Rosca
f9d7d131a4 ac/parse_ib: Parse VCN DYNAMIC_REFLIST_BUFFER 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34262>
 2025-03-29 08:50:49 +00:00
David Rosca
5275a88174 ac/parse_ib: Fix parsing output format on VCN5 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34262>
 2025-03-29 08:50:49 +00:00
Faith Ekstrand
8d45d3bc3d nak: Disable lea64 and f2fp.pack_ab tests pre-Volta 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34129>
 2025-03-29 04:33:10 +00:00
Faith Ekstrand
bb43c665dc nak: Add a QMD heap to hw_runner 
This is needed prior to Maxwell B to avoid SKED cache issues.

Reviewed-by: Lorenzo Rossi <snowycoder@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34129>
 2025-03-29 04:33:10 +00:00
Faith Ekstrand
d8fef0a26c nak: Improve WS abstractions in hw_runner 
Reviewed-by: Lorenzo Rossi <snowycoder@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34129>
 2025-03-29 04:33:10 +00:00
Mel Henning
c1d64053f2 nak: Assert instr_sched matches calc_instr_deps 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32311>
 2025-03-29 04:05:05 +00:00
Mel Henning
562504f47c nak: Calc static cycle count in instr_sched 
This changes the static cycle count estimate so that it takes into
account estimated variable latency instruction delays. Statistics from
before this commit are not comparable to statistics generated after
this commit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32311>
 2025-03-29 04:05:05 +00:00
Mel Henning
79d0f8263d nak: Add a simple postpass instruction scheduler 
To get us started, this is designed to be pretty much the simplest thing
possible. It runs post-RA so we don't need to worry about hurting
occupancy and it uses the classic textbook algorithm for local (single
block) scheduling with the usual latency-weighted-depth heuristic.

-14.22% static cycle count on shaderdb

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32311>
 2025-03-29 04:05:05 +00:00
Faith Ekstrand
d06d76a0d4 nak: Box our RegTrackers 
RegTracker<T> contains over 300 copies of T.  It's probably best not to
put that on the stack.  We can probably get away with it on Linux but
Windows has small stacks.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32311>
 2025-03-29 04:05:04 +00:00
Faith Ekstrand
e9ff848095 nak: Move some calc_instr_deps items to a new file 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32311>
 2025-03-29 04:05:04 +00:00
Lorenzo Rossi
0ba5d99a61 nak: Simplify shl64 lowering on Maxwell 
Signed-off-by: Lorenzo Rossi <snowycoder@gmail.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34137>
 2025-03-29 03:45:49 +00:00
Lorenzo Rossi
139a9ea526 nak: Fix SM50 rounding-mode encoding edge-case 
Signed-off-by: Lorenzo Rossi <snowycoder@gmail.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34137>
 2025-03-29 03:45:49 +00:00
Faith Ekstrand
a3935c7aa2 nak,nir: Generalize nak_nir_split_64bit_conversions and move it to NIR 
This pass was originally based on a similar pass from Intel but it's
grown support for some fancy stuff like fp64 -> fp16 conversion
splitting with proper rounding.

Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34126>
 2025-03-29 03:02:17 +00:00
Faith Ekstrand
2d75e7dced nak/nir: Use correct rounding for fp64 -> fp16 conversions 
For up, down, and round towards zero, the rounding accumulates properly
as long as you use the same rounding mode for both.  For RTNE, however,
we need to insert a two-instruction fixup in order to guarantee correct
rounding.

Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34126>
 2025-03-29 03:02:17 +00:00
Faith Ekstrand
d826f82ffe nak: Implement nir_intrinsic_convert_alu_types 
We can't support every single form of this instruction but at least it's
plumbed through now.  Before this will be OpenCL-ready, we'll need to
call the NIR lowering pass with an appropriate predicate function.
However, for now it lets us use it in NAK-specific NIR lowerings.

Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34126>
 2025-03-29 03:02:17 +00:00
Faith Ekstrand
c05565ce7b compiler/rust: Add more NIR intrinsic getters 
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34126>
 2025-03-29 03:02:17 +00:00
Faith Ekstrand
1355c71943 compiler/rust: Add a nir_alu_type wrapper 
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34126>
 2025-03-29 03:02:17 +00:00
Lionel Landwerlin
47cfc77085 anv: expose VK_KHR_maintenance8 support 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33138>
 2025-03-29 02:15:19 +00:00
Lionel Landwerlin
7fca7cc721 anv: wire VkAccessFlagBits3KHR flags in internal helpers 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33138>
 2025-03-29 02:15:18 +00:00
Lionel Landwerlin
23de5abcb5 anv: enable non uniform texture offset lowering 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33138>
 2025-03-29 02:15:18 +00:00
Lionel Landwerlin
4346210ae6 brw: move texture offset packing to NIR 
That way we can deal with upcoming non constant values for
VK_KHR_maintenance8.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33138>
 2025-03-29 02:15:18 +00:00
Lionel Landwerlin
67ae49dede intel: move lower_texture to brw 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33138>
 2025-03-29 02:15:18 +00:00
Lionel Landwerlin
86773b2ba6 brw: don't lower tg4 offsets without LOD 
The problem this fixes is currently hidden because of the order in
which we run nir_lower_tex & intel_nir_lower_texture. The issue is
that nir_lower_tex removes the LOD source in some cases and the second
run of nir_lower_tex can add it back.

This is also only needed on Gfx12.5+ if the LOD is present.

Finally move all of the texture lowering to the postprocess phase. No
need to run this multiple times.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33138>
 2025-03-29 02:15:18 +00:00
Lionel Landwerlin
b87dccc64c elk: stop using intel_nir_lower_texture 
It's not doing anything.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33138>
 2025-03-29 02:15:18 +00:00
Lionel Landwerlin
772beb0ebf nir: add support for lowering non uniform texture offsets 
Intel HW only has support for non-uniform offsets for TG4 operations.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33138>
 2025-03-29 02:15:18 +00:00
Timur Kristóf
64c6930bfc ac/nir/ngg: Remove cleanup_culling_shader_after_dce. 
Not needed anymore, now that the new concept is there.

No Fossil DB changes on Navi 21.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22073>
 2025-03-29 00:47:20 +00:00