ba2c7fd00a
panvk: use force_fb_preload for unaligned preload
...
Extend force_fb_preload to take an optional VkRenderingInfo. When it is
non-NULL, this is the unaligned preload and force_fb_preload should
clear attachments.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31895 >
2024-11-06 15:23:41 -08:00
bf96702985
intel/measure: increase size of filename malloc to account for \0
...
Corrects regression caused by prior commit that created memory
overwrite by not mallocing enough space for filename string.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32013 >
2024-11-06 22:12:29 +00:00
918978f525
Nightly full job for a630-gles-asan
...
The a630-gles-asan has a significant fraction, that's a trade-off for the
pre-merge, but then we need a full test in the nightly run.
The a630-gles-asan-full job usually takes 40-50 minutes. Therefore, the 20
minutes timeout is increased to 1h. The parallel feature is not used because
the nightly run is, with the introduction of this job, using 4 of the 6
devices available.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Reviewed-by: Valentine Burley <valentine.burley@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31713 >
2024-11-06 21:44:44 +00:00
f59f322efc
r300/ci: fails update after recent piglit uprev
...
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31745 >
2024-11-06 21:10:21 +00:00
5480831e5e
r300: add driconf math mode override for Unigine Tropics and Oilrush
...
Fixes rendering in both apps. Specifically they want the ME_RECIP_FF
opcode. Figured out by Filip Gawin.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/332
Reviewed-by: Filip Gawin <filip@gawin.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31745 >
2024-11-06 21:10:21 +00:00
be595d0e52
r300: remove wrong Unigine Sanctuary driconf override
...
I used this for testing when adding r300 driconf support
and it was commited by mistake.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Reviewed-by: Filip Gawin <filip@gawin.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31745 >
2024-11-06 21:10:21 +00:00
584ac64670
r300: add switch to support IEEE and FF math opcodes
...
Also add support for the 0*NaN = NaN IEEE compliant multiply on R500.
All of this is disabled by default, but can be enabled with a
RADEON_DEBUG variable or alternativelly with a driconf tweak.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com >
Reviewed-by: Filip Gawin <filip@gawin.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31745 >
2024-11-06 21:10:21 +00:00
26fc1ea9e5
dzn: Clean up dri options cache
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32011 >
2024-11-06 20:53:13 +00:00
215c44c124
aco: apply extract to v_cvt_f32_ubyte0
...
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762 >
2024-11-06 19:31:20 +00:00
f1a932bc29
aco: apply extract to p_extract_vector
...
fossil-db (navi21):
Totals from 46 (0.06% of 79395) affected shaders:
Instrs: 80126 -> 79944 (-0.23%); split: -0.27%, +0.04%
CodeSize: 486860 -> 485668 (-0.24%); split: -0.31%, +0.06%
Latency: 1615395 -> 1614218 (-0.07%); split: -0.07%, +0.00%
InvThroughput: 705479 -> 705013 (-0.07%); split: -0.07%, +0.00%
Copies: 18934 -> 18797 (-0.72%); split: -0.98%, +0.25%
VALU: 52452 -> 52268 (-0.35%); split: -0.41%, +0.06%
SALU: 17253 -> 17255 (+0.01%); split: -0.02%, +0.03%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762 >
2024-11-06 19:31:20 +00:00
6cb9d39bc2
aco: combine extracts with sub-dword definitions
...
fossil-db (navi21):
Totals from 23 (0.03% of 79395) affected shaders:
Instrs: 55133 -> 55099 (-0.06%)
CodeSize: 335744 -> 335512 (-0.07%)
Latency: 1709146 -> 1709031 (-0.01%)
InvThroughput: 613788 -> 613713 (-0.01%)
Copies: 14405 -> 14407 (+0.01%); split: -0.03%, +0.04%
VALU: 37038 -> 37000 (-0.10%)
SALU: 11125 -> 11131 (+0.05%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762 >
2024-11-06 19:31:20 +00:00
30af7ae44f
aco: add and use apply_extract_twice helper
...
This will be used in the next commit.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762 >
2024-11-06 19:31:20 +00:00
05d0fa894e
aco: allow applying sign-extended sel to p_extract more often
...
In the case of v1=p_extract(v1=p_extract(src, 0, 16, 1), 0, 32, 0).
When we apply extracts with sub-dword definitions, this will also
include v2b=p_extract(v2b=p_extract(src, 0, 8, 1), 0, 16, 0).
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762 >
2024-11-06 19:31:20 +00:00
e47bc3e750
aco: shrink code size of some p_extract
...
fossil-db (navi21):
Totals from 37 (0.05% of 79395) affected shaders:
CodeSize: 2048204 -> 2047836 (-0.02%)
fossil-db (navi31):
Totals from 307 (0.39% of 79395) affected shaders:
CodeSize: 3075732 -> 3065236 (-0.34%); split: -0.34%, +0.00%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762 >
2024-11-06 19:31:20 +00:00
d285333800
aco: add a bit more p_extract/p_insert validation
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762 >
2024-11-06 19:31:20 +00:00
d3ac69f79b
aco: handle SGPR limitations when applying extract
...
We were already doing this, but missing it in a few places.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762 >
2024-11-06 19:31:20 +00:00
07e28dad75
aco: disallow p_extract(,,32,)
...
Nothing uses these.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762 >
2024-11-06 19:31:20 +00:00
f528597906
aco: check for SDWA before applying extract to lshl/cvt_f32
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762 >
2024-11-06 19:31:20 +00:00
6ce51ea168
aco/gfx11: fix v1b=p_extract(src, 0, 16, 0)
...
This is weird, but the SDWA path supports this.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762 >
2024-11-06 19:31:20 +00:00
da5c5a3edd
nir/algebraic: add bit-size check to extract_u8 pattern
...
This only worked when "a" was 16-bit because a pattern above replaced the
shift.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31762 >
2024-11-06 19:31:20 +00:00
b318fe47e9
aco: don't byte align global VMEM loads if it might be unsafe
...
Using the byte align path can be unsafe even when 12 byte loads are
supported.
fossil-db (navi21):
Totals from 185 (0.23% of 79395) affected shaders:
Instrs: 391501 -> 391575 (+0.02%); split: -0.03%, +0.05%
CodeSize: 2147336 -> 2147672 (+0.02%); split: -0.03%, +0.05%
Latency: 3762613 -> 3860941 (+2.61%); split: -0.01%, +2.62%
InvThroughput: 871429 -> 888013 (+1.90%); split: -0.08%, +1.98%
VClause: 9712 -> 10210 (+5.13%)
Copies: 53775 -> 53010 (-1.42%); split: -1.46%, +0.04%
VALU: 254009 -> 252146 (-0.73%)
SALU: 56698 -> 56699 (+0.00%); split: -0.00%, +0.00%
VMEM: 18503 -> 19601 (+5.93%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Fixes: 391bf3ea30https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31807 >
2024-11-06 19:07:16 +00:00
dc47ecc9ac
ir3: merge is_reg_gpr and reg_gpr
...
These two helpers were basically doing the same thing so no point in
having them both around.
Signed-off-by: Job Noorman <job@noorman.info >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32000 >
2024-11-06 17:00:25 +00:00
2352fcd5b4
nir/lower_clip_disable: handle non-scalar store intrinsics
...
It only supported scalar intrinsics because it was written before
nir_opt_vectorize_io existed. The introduction of nir_opt_vectorize_io
exposes this issue. The direct path has been tested. The indirect path
hasn't. That's fine because if we see a CLIP_DIST failure with indirect
in the future, this pass is likely the cause.
This is a prerequisite for enabling nir_opt_varyings for all gallium
drivers.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31994 >
2024-11-06 15:51:51 +00:00
a21320ec47
st/mesa: implement key->persample_shading for lowered IO
...
It was only done for variables.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31994 >
2024-11-06 15:51:51 +00:00
2a9d590b6c
Revert "amd/ci: adjust stoney traces checksums"
...
This reverts commit 5882b5b93balyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31994 >
2024-11-06 15:51:51 +00:00
979373d583
glsl: fix accidentally disabling nir_opt_varyings for all drivers
...
Fixes: adc40aee25alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31994 >
2024-11-06 15:51:51 +00:00
7e3ac4d476
broadcom/ci: document flakes seen lately
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32007 >
2024-11-06 14:14:38 +00:00
79d101d985
freedreno/ci: document flakes seen lately
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32007 >
2024-11-06 14:14:38 +00:00
73db4d350a
nvk/ci: document flakes seen lately
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32007 >
2024-11-06 14:14:38 +00:00
cdeb284dce
amd/ci: document flakes seen lately
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32007 >
2024-11-06 14:14:38 +00:00
2cd8a9fef7
amd: lower gl_FragCoord.w rcp in NIR
...
This allows NIR to remove the rcps if the application uses rcp(gl_FragCoord.w).
D3D provides w, not 1/w like GL/VK in the shader, so this is commonly used.
Foz-DB Navi21:
Totals from 2068 (2.61% of 79206) affected shaders:
MaxWaves: 45636 -> 45652 (+0.04%)
Instrs: 2173444 -> 2169671 (-0.17%); split: -0.18%, +0.00%
CodeSize: 11881304 -> 11867208 (-0.12%); split: -0.12%, +0.01%
VGPRs: 118000 -> 117968 (-0.03%)
Latency: 35689676 -> 35675909 (-0.04%); split: -0.06%, +0.02%
InvThroughput: 9167199 -> 9159801 (-0.08%); split: -0.08%, +0.00%
VClause: 45076 -> 45078 (+0.00%); split: -0.01%, +0.02%
SClause: 92503 -> 92366 (-0.15%); split: -0.31%, +0.17%
Copies: 140282 -> 140303 (+0.01%); split: -0.13%, +0.14%
Branches: 53347 -> 53346 (-0.00%); split: -0.01%, +0.00%
PreVGPRs: 96495 -> 96465 (-0.03%)
VALU: 1522980 -> 1519252 (-0.24%); split: -0.25%, +0.01%
SALU: 213451 -> 213460 (+0.00%); split: -0.02%, +0.02%
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31967 >
2024-11-06 12:57:08 +00:00
917f312873
nir/lower_fragcoord_wtrans: use intrinsics_pass
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31967 >
2024-11-06 12:57:08 +00:00
0ab2849597
anv: move pipe control debug to anv_util.c
...
We're going to add more printing.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31928 >
2024-11-06 12:20:23 +00:00
b5403a4e40
anv: fix indentation
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31928 >
2024-11-06 12:20:23 +00:00
f9e76e8ca6
anv: add texture cache inval after binding pool update
...
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31928 >
2024-11-06 12:20:22 +00:00
b3f487bd0d
anv: fix even set/reset on blitter engine
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31928 >
2024-11-06 12:20:22 +00:00
423d472a4e
tu: Re-emit visibility stream before each render pass
...
When we set the visibility stream with CP_SET_PSEUDO_REG, it does two
things (or only one of the two, with concurrent binning):
- Set the "pseudo register" used by CP_SET_BIN_DATA5_OFFSET, which in
turn is used when decoding the vis. streams.
- Set the VSC register used by the binning pass.
Preemption with skipsaverestore obliterates the second, but not the
first. This means that before running the binning pass, we have to
re-emit these registers. I *think* this is what the blob does on a7xx.
On a6xx, where the pseudo register doesn't exist, the blob seems to
re-emit the preamble every time we re-allocate the visibility streams,
but we don't support a6xx yet so we can defer making that decision.
Fixes supertuxkart under zink with preemption enabled in the kernel.
Fixes: 1d2b479a3bhttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31937 >
2024-11-06 11:55:28 +00:00
2cadab5dcf
vulkan/runtime: fix allocation failure handling
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 93d0c66b27ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31982 >
2024-11-06 11:23:27 +00:00
5375d77488
aco: wait for scratch stores to complete before dealloc_vgprs
...
fossil-db (navi31):
Totals from 392 (0.49% of 79395) affected shaders:
Instrs: 5052043 -> 5054100 (+0.04%)
CodeSize: 26701200 -> 26709428 (+0.03%)
Latency: 43614861 -> 43615368 (+0.00%)
InvThroughput: 7353147 -> 7353216 (+0.00%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24884 >
2024-11-06 09:58:05 +00:00
575f24d19f
aco: don't emit early exit over dealloc_vgprs
...
fossil-db (navi31):
Totals from 3308 (4.17% of 79395) affected shaders:
Instrs: 387145 -> 375373 (-3.04%)
CodeSize: 2018276 -> 1964380 (-2.67%)
Latency: 6588004 -> 6549068 (-0.59%)
InvThroughput: 458792 -> 457025 (-0.39%); split: -0.39%, +0.00%
Branches: 10710 -> 7402 (-30.89%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24884 >
2024-11-06 09:58:05 +00:00
295b7d606f
aco: insert NOP before dealloc_vgpr in the insert_NOPs pass
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24884 >
2024-11-06 09:58:05 +00:00
4dfc564669
aco: fix printing of block_kind_discard_early_exit
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24884 >
2024-11-06 09:58:04 +00:00
0ad713ca9f
aco: add waitcnt build helper
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24884 >
2024-11-06 09:58:04 +00:00
766617e8da
radv: Enable NGG culling by default on GFX10.
...
We never took the time to actually test this, but it works fine.
Improves performance on Navi 10 in the following test cases:
Baldur's Gate 3 Vulkan: up to 10%
Witcher 3 D3D11: around 4%
Granite primitive stress test: 107%
FSR2 sample app: 57%
Notes:
NGG is still disabled on Navi 14.
Not tested on Navi 12.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31971 >
2024-11-06 03:16:54 +00:00
6bf19b2d70
radv: Increase NGG culling PS param limit to 12 on GFX10.
...
Helps performance in Baldur's Gate 3 on Navi 10
when NGG culling is enabled.
Also fix the description of the RADV_PERFTEST=nggc env var.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31971 >
2024-11-06 03:16:53 +00:00
5068a6b4ce
anv: Set shader_spilling_rate=11
...
This has the best fossil-db results across in a sweep from 0..15.
fossil-db results on Alderlake:
Instructions in all programs: 152849904 -> 152824116 (-0.0%)
SENDs in all programs: 7677830 -> 7677830 (+0.0%)
Loops in all programs: 48470 -> 48470 (+0.0%)
Cycles in all programs: 11988670382 -> 11987530942 (-0.0%)
Spills in all programs: 42863 -> 41777 (-2.5%)
Fills in all programs: 77114 -> 73044 (-5.3%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31990 >
2024-11-06 02:47:26 +00:00
c3c80491f9
amd/vpelib: Input Format Adjustment
...
Reviewed-by: Jiali Zhao <Jiali.Zhao@amd.com >
Reviewed-by: Jesse Agate <Jesse.Agate@amd.com >
Acked-by: Chenyu Chen <Chen-Yu.Chen@amd.com >
Signed-off-by: Evan <evan.damphousse@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31918 >
2024-11-06 02:19:39 +00:00
d1b790c028
amd/vpelib: Fix color fill performance issue on VPE1.1 ( #419 )
...
\[WHY\]
For color fill only case we see performance on Vpe1.1 are not doubled due
to CD are all 0, no odd CD
\[HOW\]
1. Dummy stream dst rect should be in the middle of target rect so the
two (dummy seg + bg only seg) are balanced, instead of target at upper
left corner which makes it imbalance
2. BG gap generation should consider more for collaboration mode
num_multiple
3. When pure bg case, skip dummy stream handling and go ahead do BG gap
generation
4. Update memory requirement for the new pure BG case flow to avoid run out of embedded buffer
4. Additional -- fix the random Collaborate data generation bug (benign)
\[TESTING\]
Vpelibtest app + nv12torgb case with debug flag bgcolorfill set on in
vpelibtestapp
Media player with/without bgcolorfillonly flag
Teams
Reviewed-by: Roy Chan <Roy.Chan@amd.com >
Reviewed-by: Navid Assadian <Navid.Assadian@amd.com >
Acked-by: Chenyu Chen <Chen-Yu.Chen@amd.com >
Signed-off-by: Tomson Chang <tomson.chang@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31918 >
2024-11-06 02:19:39 +00:00
4661bf3659
amd/vpelib: Remove TODO comments and legacy check( #421 )
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\[WHY\]
1.Remove TODO comments that don't need action item
2.Delete the legacy command number check as it is now using a vector (i.e. without hard limit)
\[HOW\]
Remove TODO comments and delete the legacy command number check
Signed off by <tvisan@amd.com >
Reviewed-by: Roy Chan <Roy.Chan@amd.com >
Reviewed-by: Jesse Agate <Jesse.Agate@amd.com >
Acked-by: Chenyu Chen <Chen-Yu.Chen@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31918 >
2024-11-06 02:19:39 +00:00
e0754a6dc7
amd/vpelib: Remove unused define macro
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Reviewed-by: Roy Chan <Roy.Chan@amd.com >
Acked-by: Chenyu Chen <Chen-Yu.Chen@amd.com >
Signed-off-by: Chenyu Chen <Chen-Yu.Chen@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31918 >
2024-11-06 02:19:39 +00:00
Chia-I Wu