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Lionel Landwerlin b7828f56ba anv: fix acceleration structure descriptor template writes 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d258b0bf0e ("anv: Add support for binding acceleration structures")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16058>
 2022-04-25 11:01:56 +00:00
Lionel Landwerlin ace22edd30 anv: remove unused enum 
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16058>
 2022-04-25 11:01:56 +00:00
Samuel Pitoiset 51ea72e621 radv: remove redundant VK_PIPELINE_STAGE_2_TRANSFER_BIT for CP DMA idle 
They are equivalent.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15943>
 2022-04-25 10:40:59 +00:00
Samuel Pitoiset 591e3296cd radv: clarify why STAGE_2_CLEAR_BIT needs to wait for CP DMA to be idle 
To clarify that other clear operations like vkCmdFillBuffer() are
implicitly synchronized. So, STAGE_2_CLEAR_BIT is only needed for
vkCmdUpdateBuffer() in some rare cases (GFX10+ dGPUs with GTT BOs).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15943>
 2022-04-25 10:40:59 +00:00
Lionel Landwerlin 107acf5a4a intel: fixup number of threads per EU on XeHP 
Computations for indexing in-memory data structures for ray queries
depend on this.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4f9141607f ("intel: Add device info for DG2")
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15925>
 2022-04-25 10:06:02 +00:00
Samuel Pitoiset 4ebb5391ac nir: mark XFB varyings as unmoveable to prevent them to be remapped 
XFB varyings are considered as always active IO to prevent them to
be removed or compacted. Though, if the NIR linker doesn't mark XFB
varyings as unmoveable it still possible to remap other varyings to
the same location/component.

Fixes KHR-Single-GL46.enhanced_layouts.xfb_override_qualifiers_with_api
with Zink and a bunch of other dEQP XFB tests.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6301
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri  <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16092>
 2022-04-25 07:56:27 +00:00
Samuel Pitoiset 26f74f17d9 nir: fix marking XFB varyings as always active IO 
Components need to be handled, otherwise if a shader has two XFB
varyings at the same location, only one will be marked as always active.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri  <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16092>
 2022-04-25 07:56:27 +00:00
Samuel Pitoiset 6873da0e42 aco: fix load_barycentric_at_{sample,offset} on GFX6-7 
The computation was wrong.

Fixes dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_offset.*
with Zink on GFX6 (Pitcairn).

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16099>
 2022-04-25 07:17:39 +00:00
Samuel Pitoiset 9662f9bcdc radv/ci: update the flakes list for GFX9 chips 
Fixed since "ac/surface: fix an addrlib race condition on gfx9".

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16093>
 2022-04-25 08:18:40 +02:00
Mike Blumenkrantz a6a4bf0f1e glsl/nir: set new_style_shadow for sparse tex ops as necessary 
this needs the sparse result type, which is not the ir type

Fixes: f4a972b748 ("glsl/nir: convert sparse ir_texture to nir")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16097>
 2022-04-24 15:56:05 +00:00
Mike Blumenkrantz 5f0ac8ac19 aux/trace: make get_sparse_texture_virtual_page_size useful 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16097>
 2022-04-24 15:56:05 +00:00
Mike Blumenkrantz 272f6ede0d mesa/st: clamp GL_RENDERBUFFER to GL_TEXTURE_2D for sparse queries 
this is a legal query that cts uses, so don't just abort

Fixes: b1c32a6c8c ("mesa: add ARB_sparse_texture query in glGetInternalformativ")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16097>
 2022-04-24 15:56:05 +00:00
Konstantin Seurer e4a6f09d12 radv: Clean up the accel-struct build shaders 
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
 2022-04-24 16:03:32 +02:00
Konstantin Seurer be57b085be radv: Build accaleration structures using LBVH 
This sorts the leaf nodes along a morton curve before
creating the internal nodes. For reference:
https://developer.nvidia.com/blog/thinking-parallel-part-iii-tree-construction-gpu/

Ray query cts:
Test run totals:
  Passed:        22418/23426 (95.7%)
  Failed:        0/23426 (0.0%)
  Not supported: 1008/23426 (4.3%)
  Warnings:      0/23426 (0.0%)
  Waived:        0/23426 (0.0%)

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
 2022-04-24 16:03:32 +02:00
Konstantin Seurer 5d9ef0efb5 radv: Add the fuchsia radix sort 
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
 2022-04-24 16:03:32 +02:00
Konstantin Seurer 9c020b525b radv: Format radv_acceleration_structure.c 
This is the result of running clang-format on the entire file.
Although this is not related to this MR, I decided to include
the formatting changes so I do not have to deal with them if
I work on this file in the future.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
 2022-04-24 16:03:32 +02:00
Konstantin Seurer 49383fe39e radv: Make fill_buffer_shader non-static 
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
 2022-04-24 16:03:32 +02:00
Konstantin Seurer 2a004866fb radv: Use VAs in radv_meta_buffer.c 
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
 2022-04-24 16:03:32 +02:00
Konstantin Seurer 8cb92ce94e ci: Always install glslangValidator for build jobs 
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
 2022-04-24 16:03:12 +02:00
Alyssa Rosenzweig 6bef59f56b pan/bi: Simplify bi_propagate_pass_flags 
Worklist-based dataflow analysis is overkill, we can just do DFS.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16045>
 2022-04-23 18:16:08 +00:00
Alyssa Rosenzweig 46b099e392 meson: Ignore unused variables in release builds 
Variables that are only used for assertions are considered unused in release
builds. Don't treat this as an error, since we build with -Werror even for
release in CI. This causes reasonable code to build and pass tests locally (and
therefore to be queued for merge by reasonable developers), but later fail in CI
due to a variable used only as an assertion. This pattern is common enough we
have an ASSERTED macro to workaround the behaviour, but failing a CI run to
have the author go back and add in the ASSERTED and re-queue later is a recipe
for frustration, wasted time, and wasted CI bandwidth.

Disable this behaviour to reduce CI friction.

In my view, sprinkling in ASSERTED clutters the code, rather than helps; I find
CI's insistence on doing so actively counterproductive. Developers are free to
continue doing so after this change. But this way CI won't fail merge requests
over it. After all, CI enforces policy, and we shouldn't have "mark variables
only used for assertions as ASSERTED" as policy. Let's pick our battles wisely
and improve CI's signal-to-noise ratio.

As an added benefit, this eliminates a class of defects where ASSERTED is used
incorrectly, e.g:

   c91e3c6a42 ("util: Should not use ASSERTED in util_thread_get_time_nano")
   3e22fc27af ("zink: remove incorrect ASSERTED macro")
   0d08ce287b ("pan/bi: Remove dated ASSERTED properties")

Note that actual unused variables will be caught by debug builds. It is expected
that developers do debug builds locally before ramming code through CI, so that
should be caught.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Suggested-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15582>
 2022-04-23 13:36:05 -04:00
Marek Olšák 3d5ba0e1b7 ac/gpu_info: remove old and unused fields from radeon_info 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák 1bf39b1f9d ac,radeonsi: rework how scratch_waves is used and move it to ac_gpu_info.c 
The addition of the "compute" parameter is for a future change.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák 159b28ad36 ac/llvm: rename tbuffer -> buffer where tbuffer instructions are not generated 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák 6698753cdb ac/llvm: don't use tbuffer_store as a fallback for swizzled stores 
This depends on the offset computation fix from:
   "ac/llvm: remove inst_offset parameter from ac_build_buffer_store_dword"

v2: The instruction type is changed to MUBUF, which requires us to clear
    DATA_FORMAT with ADD_TID_ENABLE.

Reviewed-by: Mihai Preda <mhpreda@gmail.com> (v1)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák 4b63b5caa2 ac/llvm: remove unused code from ac_llvm_build.c/h 
One forward declaration didn't have an implementation.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák 99356c597f ac/llvm: remove immoffset parameter from ac_build_tbuffer_load_byte/short 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák c888e77dfc ac/llvm: remove inst_offset parameter from ac_build_buffer_load 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák e3421ae8ff ac/llvm: use soffset correctly in ac_build_buffer_load 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák f68aeaa2c2 ac/llvm: remove inst_offset parameter from ac_build_buffer_store_dword 
There was a bug that inst_offset was added to soffset in one codepath and
to voffset in all other codepaths. The correct behavior is to add it
to voffset.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák 8abb612cba ac/llvm: remove immoffset parameter from ac_build_tbuffer_load 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák 6234d92073 ac/llvm: remove immoffset parameter from ac_build_tbuffer_store 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák a3e777a89a ac/llvm: add AC_WAIT_EXP for ac_build_waitcnt 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák f719085007 ac: add more non-shadowed registers to the lists 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák c16239d464 ac/surface/tests: generalize and extend gfx10 tests 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák dda718d2bf amd: document chips 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
 2022-04-23 01:45:17 +00:00
Marek Olšák 5af4d0c2dc ac/llvm: remove LLVM pass ac_optimize_vs_outputs 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14414>
 2022-04-22 22:21:11 +00:00
Marek Olšák 3777a5d715 radeonsi: assign param export indices before compilation 
This moves the logic out of LLVM-specific codepaths.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14414>
 2022-04-22 22:21:11 +00:00
Marek Olšák 11c28d9798 ac: add ac_nir_optimize_outputs, a NIR version of ac_optimize_vs_outputs 
ac_optimize_vs_outputs is an LLVM IR pass, and it will be replaced by this.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14414>
 2022-04-22 22:21:11 +00:00
Marek Olšák 4e8b8555c6 radeonsi: move si_shader_info::stage into si_shader_selector 
This will help me see all places where we use "info", which will
be moved from si_shader_selector to shader variants.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14414>
 2022-04-22 22:21:11 +00:00
Marek Olšák 8de5b11b29 radeonsi: move most "info" fields from si_shader_selector into si_shader_info 
It's where they should be, and future commits might require this.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14414>
 2022-04-22 22:21:11 +00:00
Marek Olšák b57a163b7d radeonsi: gather pipe_stream_output_info from NIR intrinsics 
This stops pipe_stream_output_info from create_*s_state context functions
because NIR contains everything and can do more advanced shader linking
this way.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14414>
 2022-04-22 22:21:11 +00:00
Marek Olšák 981bd8cbe2 radeonsi: apply key.ge.opt.kill_{outputs,pointsize,clipdistance} in NIR 
This may be needed by ACO, but it doesn't do anything for LLVM yet other
than making the initial LLVM IR smaller.

It will be needed by a future commit, which rewrites ac_optimize_vs_outputs
in NIR, which relies on NIR matching the shader key.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14414>
 2022-04-22 22:21:11 +00:00
Marek Olšák 65dfb7bf2e radeonsi: use nir_shader_get_entrypoint in si_nir_scan_shader 
The typecast is needed because nir is const.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14414>
 2022-04-22 22:21:11 +00:00
Marek Olšák a7b906264a radeonsi: add pipe_stream_output_info into si_shader_context 
to reduce deltas for the next commit

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14414>
 2022-04-22 22:21:11 +00:00
Marek Olšák db92451e23 radeonsi: scalarize IO instructions 
The next commit will rely on this.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14414>
 2022-04-22 22:21:11 +00:00
Marek Olšák a373b558c0 radeonsi: run nir_io_add_const_offset_to_base for TES/TCS as late optimizations 
Other stages don't have indirect indexing, so it's always const.
Doing it here should also remove dead load_const instructions.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14414>
 2022-04-22 22:21:11 +00:00
Lionel Landwerlin 5a52cfd88b anv: fix INTEL_DEBUG=sync 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 3684012770 ("anv: implement DEBUG_SYNC")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16101>
 2022-04-22 21:59:50 +00:00
Marek Olšák 6fc94500c0 radeonsi: ignore AMD_DEBUG=nodcc if the texture is imported 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15965>
 2022-04-22 20:52:26 +00:00
Marek Olšák ef52d803a9 radeonsi: dump shaders after si_shader_binary_upload to fix printed LDS stat 
lds_size is set by si_shader_binary_upload, so it always printed zero.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15965>
 2022-04-22 20:52:26 +00:00