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Author SHA1 Message Date
Guido Günther afbccdf8f9 etnaviv/drm: Print gpu model at debug verbosity 
Otherwise we print it at every application start.

Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10546>
 2021-12-22 09:15:57 +01:00
Guido Günther a93c0e1860 etnaviv/drm: Add some bo debug output 
This makes it simpler to trace BO usage.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10546>
 2021-12-22 09:15:53 +01:00
Guido Günther 87879b0633 etnaviv/drm: Use etna_mesa_debug for debugging messages 
We use the variable from gallium but fall back to a weak symbol
in case there's usage out of galllium in the future.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10546>
 2021-12-22 09:15:02 +01:00
Tapani Pälli ebd1f202ae glsl: fix invariant qualifer usage and matching rule for GLSL 4.20 
I noticed that GLSL version referenced here was wrong, version 4.20 is
first spec that does not allow invariant keyword for inputs.

v2: fix all comments (Timothy Arceri)

Fixes: f9f462936a ("glsl: Fix invariant matching in GLSL 4.30 and GLSL ES 1.00.")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14241>
 2021-12-22 06:01:37 +00:00
Thomas H.P. Andersen 0bc5e8cddc ci: debian-clang: drop -Wno-error for self-assign 
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14272>
 2021-12-22 03:34:23 +00:00
Thomas H.P. Andersen f1dfc6a780 gallivm: avoid a self-assign warning 
Fixes a clang warning

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14272>
 2021-12-22 03:34:23 +00:00
Vinson Lee 9f8a204645 panfrost: Avoid double unlock. 
Fix defect reported by Coverity Scan.

Double unlock (LOCK)
double_unlock: pthread_mutex_unlock unlocks dev->indirect_draw_shaders.lock while it is unlocked.

Fixes: 2e6d94c198 ("panfrost: Add helpers to support indirect draws")
Suggested-by: Alyssa Rosenzweig <alyssa@collabora.com>
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14262>
 2021-12-22 02:01:57 +00:00
Vinson Lee 1d6f6f9102 ir3: Make shift operand 64-bit. 
Fix defect reported by Coverity Scan.

Unintentional integer overflow (OVERFLOW_BEFORE_WIDEN)
overflow_before_widen: Potentially overflowing expression 2 << W
with type int (32 bits, signed) is evaluated using 32-bit
arithmetic, and then used in a context that expects an expression
of type uint64_t (64 bits, unsigned).

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Acked-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14258>
 2021-12-22 01:19:46 +00:00
Timur Kristóf b293299776 aco/optimizer_postRA: Fix applying VCC to branches. 
Fixes: a93092d0ed
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14281>
 2021-12-21 22:53:23 +00:00
Timur Kristóf ce4daa259c aco/optimizer_postRA: Fix combining DPP into VALU. 
Fixes: 4ac47ad1cd
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14281>
 2021-12-21 22:53:23 +00:00
Thomas H.P. Andersen 14a204b19d ci: clean up debian-clang no-error list 
I see no warnings for these on a local build

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14269>
 2021-12-21 22:24:16 +00:00
Caio Oliveira ac90519e35 anv: Simplify assertions related to graphics stages 
In all three cases, COMPUTE was on the table but with an invalid
value (zero).  Drop it from the tables and the extra assertion, so if
a COMPUTE is passed it will just fail the ARRAY_SIZE assertion.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14274>
 2021-12-21 18:25:05 +00:00
Daniel Schürmann d36a43598c aco/ra: fix get_reg_for_operand() in case of stride mismatches 
We have to clear the register file from the previous operand
as otherwise, there might be no space left.

Totals from 5 (0.00% of 134572) affected shaders: (GFX10.3)
CodeSize: 21144 -> 21000 (-0.68%); split: -0.72%, +0.04%
Instrs: 3738 -> 3720 (-0.48%); split: -0.51%, +0.03%
Latency: 517229 -> 516319 (-0.18%); split: -0.18%, +0.00%
InvThroughput: 49068 -> 48902 (-0.34%); split: -0.38%, +0.04%
Copies: 501 -> 483 (-3.59%); split: -3.79%, +0.20%

Cc: mesa-stable
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14279>
 2021-12-21 17:15:45 +00:00
Jesse Natalie 664810ebb0 d3d12: Fix NV12 resource importing 
Fixes: a6db8054 ("d3d12: Handle opening planar resources")
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14276>
 2021-12-21 16:56:45 +00:00
Daniel Schürmann 17ecd0b31a nir/opt_algebraic: lower fneg_hi/lo to fmul 
This pattern, found in the FSR upscaling shader,
helps the vectorization efforts by keeping the
chain of vectorized instructions intact.
Radeon can optimize it to per-component fneg modifiers.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13688>
 2021-12-21 13:23:37 +01:00
Daniel Schürmann 30a7199e37 aco/optimizer: propagate and fold inline constants on VOP3P instructions 
This patch aims to propagate and fold constants on VOP3P instructions
by using omod selection and the fneg modifier.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13688>
 2021-12-21 13:23:36 +01:00
Daniel Schürmann 62bcfcd0a8 aco: change fneg for VOP3P to use fmul with +1.0 
This will be useful to be able to also apply
fneg_lo and fneg_hi.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13688>
 2021-12-21 13:23:36 +01:00
Daniel Schürmann 193bd740ab aco/optimizer: fix fneg modifier propagation on VOP3P 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13688>
 2021-12-21 13:23:36 +01:00
Caio Oliveira de916d827f anv: Refactor dirty masking in cmd_buffer_flush_state 
Instead of masking the dirty variable itself, use an appropriate mask
in the users of dirty.  This will avoid extra tracking when dealing
with Task/Mesh later.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14275>
 2021-12-21 11:07:31 +00:00
Caio Oliveira 37fca614b8 anv/blorp: Split blorp_exec into a render and compute 
And set the relevant push_constants_dirty for each case.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14275>
 2021-12-21 11:07:31 +00:00
Roman Stratiienko 2686c5419d v3dv: add Android support 
Acknowledgements to android-rpi team and lineage-rpi maintainer (KonstaT)
for creating/testing initial vulkan support. Their experience was used as
a baseline for this work.

Most of the code is a copy of turnip and anv.
Improved by cleaning dEQP failures:

 - Improved gralloc support (use allocation time stride, size, modifier).
 - Fixed some dEQP crashes due to memory allocation issues.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14016>
 2021-12-21 09:24:43 +00:00
Emma Anholt 658b2ca467 r300/vs: Fix flow control processing just after an endloop. 
We tried to step over the instruction we just generated, except we didn't
always just generate one.  In the sequence_vertex tests, that meant we
skipped processing the next BGNLOOP and then underflowed our stack.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14271>
 2021-12-21 01:05:07 +00:00
Emma Anholt b48852436e r300/vs: Reuse rc_match_bgnloop(). 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14271>
 2021-12-21 01:05:07 +00:00
Emma Anholt e41a53cd19 r300/vs: Allocate temps we see a use as a source, too. 
This is a quick hack for a bunch of the fail in #5766.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14271>
 2021-12-21 01:05:07 +00:00
Emma Anholt e3d0ceccc9 ci/r300: Add another xfail on the main branch. 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14271>
 2021-12-21 01:05:07 +00:00
Francisco Jerez e7470a40c5 intel/fs: Add physical fall-through CFG edge for unconditional BREAK instruction. 
This adds a missing CFG edge that represents a possible physical
control flow path the EU might take under some conditions which isn't
part of the logical CFG of the program.  This possibility shouldn't
have led to problems on platforms prior to Gfx12, since the missing
control flow edge cannot possibly influence liveness intervals.
However on Gfx12+ it becomes the compiler's responsibility to resolve
data dependencies across instructions, and the missing physical
control flow paths may lead to a WaR data hazard currently not visible
to the software scoreboard pass, which could lead to data corruption.

Worse, the possibility for this path to be taken by the EU increases
on Gfx12+ due to a hardware bug affecting EU fusion -- However the
same physical path can be potentially taken on earlier platforms as
well, so this patch extends the CFG on all platforms for consistency,
even though the lack of this edge shouldn't lead to any functional
issues on platforms earlier than Gfx12.  There are no shader-db
changes on earlier platforms, so there seems to be no disadvantage
from using the same CFG representation as on later platforms.

This issue has ben reported on TGL with the following conformance
test, thanks to Ian for bringing the FULSIM dependency check warning
to my attention:

   dEQP-VK.graphicsfuzz.spv-stable-pillars-volatile-nontemporal-store

Fixes: 4d1959e693 ("intel/cfg: Represent divergent control flow paths caused by non-uniform loop execution.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4940
Reported-by: Tapani Pälli <tapani.palli@intel.com>
Reported-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14248>
 2021-12-21 00:43:29 +00:00
Emma Anholt f568d80986 glsl: Retire unused modes for lower_64bit_integer_instructions. 
Unused since 424ac809bf ("i965: Do int64 lowering in NIR")

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14249>
 2021-12-20 14:56:35 -08:00
Emma Anholt 97242b39f9 glsl: Remove comment about non-existing DFREXP_TO_ARITH 
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14249>
 2021-12-20 14:56:35 -08:00
Emma Anholt b82b3a327e glsl: Remove dead prototype for old do_discard_simplification(). 
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14249>
 2021-12-20 14:47:57 -08:00
Emma Anholt 6db1f93699 glsl: Delete the optimize_redundant_jumps pass. 
Nothing here that NIR doesn't do.  No effect on shader-db of hsw or
softpipe.

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14249>
 2021-12-20 14:47:57 -08:00
Emma Anholt c2ead6c9b5 glsl: Delete the vectorization opt pass. 
Nothing uses it, and i965 was the last thing to.  Even if I enable it for
softpipe or crocus, it quickly causes NIR validation failures in shader-db
from swizzles outside the bounds of vectors.  Retire it in favor of
nir_opt_vectorize().

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14249>
 2021-12-20 14:47:57 -08:00
Rob Clark 8a21b2fda0 freedreno/ir3: Dump const state with shader disasm 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14231>
 2021-12-20 19:47:35 +00:00
Rob Clark 9766a5721d freedreno/computerator: Mark shader bo for dumping 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14231>
 2021-12-20 19:47:35 +00:00
Rob Clark d1edc6d9a1 freedreno/computerator: Fix @buf header 
Order is important in the grammar, the more specific match needs to go
first.

Fixes: ba1c989348 ("freedreno/computerator: pass iova of buffer to const register")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14231>
 2021-12-20 19:47:35 +00:00
Rob Clark 78c53f4888 freedreno/ir3: Handle instr->address when cloning 
Without this, a cloned instruction that takes full regs will trigger an
ir3_validate assert.  This can happen, for ex, if an instruction that
writes p0.x and has a relative src gets cloned in ir3_sched.

Fixes an assert in Genshin Impact with a debug build.

Fixes: 9af795d9b9 ("ir3: Make ir3_instruction::address a normal register")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14231>
 2021-12-20 19:47:35 +00:00
Alyssa Rosenzweig 1d21de788d pan/bi: Specialize shaders for IDVS 
We need to compile multiple variants and report them together in a
common shader info. To do so, we split off per-variant shader infos and
combine at the end.

glmark2 is very happy: https://people.collabora.com/~alyssa/idvs-g52.txt
Highlights include -bshading up 41% fps and -bbump:bump-render=high-poly
up 62% faster

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
 2021-12-20 18:21:41 +00:00
Alyssa Rosenzweig c59977c3bf pan/bi: Add helper to decide if IDVS should be used 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
 2021-12-20 18:21:41 +00:00
Alyssa Rosenzweig a211d2b4e4 pan/bi: Use position shader ST_CVT path 
We need to use a preload instead of the LEA_ATTR. Not sure why.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
 2021-12-20 18:21:41 +00:00
Alyssa Rosenzweig fe8ec31114 pan/bi: Split out varying store paths 
This means we don't need to special case IDVS quite so hard.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
 2021-12-20 18:21:41 +00:00
Alyssa Rosenzweig e0771d5832 pan/bi: Remove the "wrong" stores in IDVS variants 
Position shaders should only write gl_Position (and gl_PointSize on
Valhall), varying shaders should only write varyings.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
 2021-12-20 18:21:41 +00:00
Alyssa Rosenzweig fba5936fdb pan/bi: Add IDVS mode to bi_context 
Various parts of the compiler switch behaviour based on IDVS variant.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
 2021-12-20 18:21:41 +00:00
Alyssa Rosenzweig c7fae2c896 pan/bi: Allow UBO pushing to run multiple times 
For IDVS.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
 2021-12-20 18:21:41 +00:00
Alyssa Rosenzweig e2f7871bcf pan/bi: Extract bi_finalize_nir 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
 2021-12-20 18:21:41 +00:00
Alyssa Rosenzweig 62d46c7ee6 panfrost: Add panfrost_compile_inputs->no_idvs option 
panvk will want IDVS support eventually, but not right now. Allow the
driver to opt out of IDVS in the mean time.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
 2021-12-20 18:21:41 +00:00
Alyssa Rosenzweig 2ff3c4a636 panfrost: Align instance size for IDVS 
Hardware requirement. Failing to do this raises a DATA_INVALID_FAULT.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
 2021-12-20 18:21:41 +00:00
Alyssa Rosenzweig 79356b2e5f panfrost: Skip rasterizer discard draws without side effects 
Minor optimization, but more importantly fixes an interaction of IDVS
with rasterizer discard.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
 2021-12-20 18:21:41 +00:00
Alyssa Rosenzweig f5412409db panfrost: Extract panfrost_batch_skip_rasterization 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
 2021-12-20 18:21:41 +00:00
Alyssa Rosenzweig 3a49f4798c panfrost: Emit IDVS jobs 
When trying to draw with an IDVS capable shader.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
 2021-12-20 18:21:41 +00:00
Alyssa Rosenzweig e5b0c514d8 panfrost: Extract panfrost_draw_emit_vertex_section 
To be shared with IDVS.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
 2021-12-20 18:21:41 +00:00
Alyssa Rosenzweig 4d8d987f1a panfrost: Set secondary_* fields for IDVS 
Easy now that we've split everything out nicely.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
 2021-12-20 18:21:41 +00:00