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Author SHA1 Message Date
Nicolai Hähnle
a191e6b719 radeonsi: fix bounds check in si_create_vertex_elements 
This was triggered by
dEQP-GLES3.functional.vertex_array_objects.all_attributes

Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2016-04-12 16:32:46 -05:00
Nicolai Hähnle
4285a97cea docs: mark atomic counters and SSBOs as done for radeonsi 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:51 -05:00
Nicolai Hähnle
bfd11c5996 radeonsi: enable shader buffer pipe caps 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:48 -05:00
Nicolai Hähnle
4e81843b13 radeonsi: add shader buffer support to TGSI_OPCODE_RESQ 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:45 -05:00
Nicolai Hähnle
01109282ce radeonsi: add shader buffer support to TGSI_OPCODE_STORE 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:43 -05:00
Nicolai Hähnle
745014c502 radeonsi: add shader buffer support to TGSI_OPCODE_LOAD 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:41 -05:00
Nicolai Hähnle
68bc25c931 radeonsi: add shader buffer support to TGSI_OPCODE_ATOM* 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:38 -05:00
Nicolai Hähnle
c6f5d000db radeonsi: add offset parameter to buffer_append_args 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:35 -05:00
Nicolai Hähnle
c565466eea radeonsi: adjust buffer_append_args to take a 128 bit resource 
Move the buffer resource extraction code out into its own function.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:32 -05:00
Nicolai Hähnle
e88018ffe5 radeonsi: preload shader buffers in shaders 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:29 -05:00
Nicolai Hähnle
c495c0ad37 radeonsi: implement set_shader_buffers 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:26 -05:00
Nicolai Hähnle
73c8b85b64 radeonsi: move resetting of constant buffers into a separate function 
This will be re-used for shader buffers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 16:30:04 -05:00
Haixia Shi
35ade36c88 dri/i965: fix incorrect rgbFormat in intelCreateBuffer(). 
It is incorrect to assume that pixel format is always in BGR byte order.
We need to check bitmask parameters (such as |redMask|) to determine whether
the RGB or BGR byte order is requested.

v2: reformat code to stay within 80 character per line limit.
v3: just fix the byte order problem first and investigate SRGB later.
v4: rebased on top of the GLES3 sRGB workaround fix.
v5: rebased on top of the GLES3 sRGB workaround fix v2.

Signed-off-by: Haixia Shi <hshi@chromium.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
 2016-04-12 14:06:45 -07:00
Kenneth Graunke
e303e88a9c glsl: Reject illegal qualifiers on atomic counter uniforms. 
This fixes

dEQP-GLES31.functional.uniform_location.negative.atomic_fragment
dEQP-GLES31.functional.uniform_location.negative.atomic_vertex

Both of which have lines like

layout(location = 3, binding = 0, offset = 0) uniform atomic_uint uni0;

The ARB_explicit_uniform_location spec makes a very tangential mention
regarding atomic counters, but location isn't something that makes sense
with them.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
 2016-04-12 14:06:42 -07:00
Kenneth Graunke
929e44099f glsl: Add a method to print error messages for illegal qualifiers. 
Suggested by Timothy Arceri a while back on mesa-dev:
https://lists.freedesktop.org/archives/mesa-dev/2016-February/107735.html

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>
 2016-04-12 14:06:42 -07:00
John Sheu
7f08547248 xlib: fix memory leak on Display close 
The XMesaVisual instances freed in the visuals table on display close
are being freed with a free() call, instead of XMesaDestroyVisual(),
causing a memory leak.

Signed-off-by: John Sheu <sheu@google.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
 2016-04-12 13:56:41 -06:00
Jakob Sinclair
d04bb14d04 st/mesa: Replace GLvoid with void 
GLvoid was used before in OpenGL but it has changed to just using void.
All GLvoids in mesa's state tracker has been changed to void in this patch.

Tested this with piglit and no problems were found. No compiler warnings.

Signed-off-by: Jakob Sinclair <sinclair.jakob@openmailbox.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
 2016-04-12 13:37:16 -06:00
Bas Nieuwenhuizen
126da23d70 radeonsi: Mark ARB_robust_buffer_access_behavior as supported. 
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2016-04-12 20:53:10 +02:00
Bas Nieuwenhuizen
70dcd841f7 gallium: Add capability for ARB_robust_buffer_access_behavior. 
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2016-04-12 20:53:06 +02:00
Bas Nieuwenhuizen
285dc05055 mesa: Expose the ARB_robust_buffer_access_behavior extension. 
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2016-04-12 20:40:26 +02:00
Miklós Máté
aad8707b28 main: rework the compatibility check of visuals in glXMakeCurrent 
Now it follows the compatibility criteria listed in section 2.1 of
the GLX 1.4 specification.
This is needed for post-process effects in SW:KotOR.

Signed-off-by: Miklós Máté <mtmkls@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
 2016-04-12 19:48:01 +02:00
Tim Rowley
df37b06276 swr: [rasterizer core] warning cleanup 
Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
06c59dc417 swr: [rasterizer] Put in rudimentary garbage collection for the global arena allocator 
- Check for unused blocks every few frames or every 64K draws
- Delete data unused since the last check if total unused data is > 20MB

Doesn't seem to cause a perf degridation

Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
b990483de2 swr: [rasterizer core] Put DRAW_CONTEXT on a diet 
No need for 256 pointers per DC.

Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
a939a58881 swr: [rasterizer core] Add experimental support for hyper-threaded front-end 
Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
9a8146d0ff swr: [rasterizer] Avoid segv in thread creation on machines with non-consecutive NUMA topology. 
Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
2c71fd4bf8 swr: [rasterizer core] Replace all naked OSALIGN macro uses with OSALIGNSIMD / OSALIGNLINE 
Future proofing

Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
32a8653ad2 swr: [rasterizer] Ensure correct alignment of stack variables used as vectors 
Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
e1871c4459 swr: [rasterizer core] Quantize depth to depth buffer precision prior to depth test/write. 
Fixes z-fighting issues.

Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
2a19aca05f swr: [rasterizer common] win32 build fixups 
Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:05 -05:00
Tim Rowley
c25244f2f7 swr: [rasterizer core] Affinitize thread scratch space to numa node of worker 
Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:04 -05:00
Tim Rowley
f89f6d562a swr: [rasterizer] Misc fixes identified by static code analysis 
No perf loss detected

Acked-by: Brian Paul <brianp@vmware.com>
 2016-04-12 11:52:04 -05:00
Brian Paul
6c01478213 st/mesa: fix memleak in glDrawPixels cache code 
If the glDrawPixels size changed, we leaked the previously cached
texture, if there was one.  This patch fixes the reference counting,
adds a refcount assertion check, and better handles potential malloc()
failures.

Tested with a modified version of the drawpix Mesa demo which changed
the image size for each glDrawPixels call.

Cc: "11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
 2016-04-12 10:44:45 -06:00
Jose Fonseca
b5105e67a8 gallium: Use STATIC_ASSERT whenever possible. 
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2016-04-12 16:56:15 +01:00
Jose Fonseca
b025c23cfe softpipe: Use STATIC_ASSERT whenever possible. 
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2016-04-12 16:56:15 +01:00
Jose Fonseca
2f13d7543f svga: Use STATIC_ASSERT whenever possible. 
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2016-04-12 16:56:15 +01:00
Jose Fonseca
7279098dc5 mesa: Use STATIC_ASSERT whenever possible. 
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
 2016-04-12 16:56:15 +01:00
Marek Olšák
686b018ab3 r600g: use common scissor and viewport code 
It's the same as radeonsi. This adds guard band support to r600g.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 17:13:25 +02:00
Marek Olšák
87a5b07f90 gallium/radeon: add R600/Evergreen/Cayman support to common viewport code 
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 17:13:25 +02:00
Marek Olšák
2ca5566ed7 radeonsi: move scissor and viewport states into gallium/radeon 
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 17:13:24 +02:00
Marek Olšák
db00f6cc9c radeonsi: use guard band clipping 
Guard band clipping speeds up rasterization for primitives that are
partially off-screen.  This change in particular results in small
framerate improvements in a wide range of games.

Started by Grigori Goronzy <greg@chown.ath.cx>.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 17:12:14 +02:00
Marek Olšák
cb21f8a97c radeonsi: compute scissor from viewport in set_viewport_states 
and clamp it right before emitting. This is a prerequisite for computing
the guard band.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:49 +02:00
Marek Olšák
5b6a0b7fc0 gallium/radeon: set GTT WC on tiled textures 
Just for consistency. This should have no effect, because OpenGL textures
always go to VRAM.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
5a4b74d1ba gallium/radeon: relax requirements on VRAM placements on APUs 
This makes Tonga with vramlimit=128 2x faster in Heaven.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
a57309f807 winsys/amdgpu: remove hack for low VRAM configuration 
A better solution will be used.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
b36f19bf98 r600g: disable aniso filtering for non-mipmap textures on EG 
this is the default behavior of the closed driver when running on VI

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
3bc2d967c4 r600g: clean up aniso state translation 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
b0d4469519 radeonsi: disable aniso filtering for non-mipmap textures on SI-CI 
The closed driver does this, but it looks at base_level and last_level
and uses a conditional assignment, which LLVM can't generate on SGPRs.

That led me to invent this solution that abuses the image descriptor.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
ddd33431c5 radeonsi: clean up aniso state translation 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:48 +02:00
Marek Olšák
f7420ef5b4 radeonsi: enable some sampler fields to match the closed driver 
copied from the Vulkan driver

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-04-12 14:29:48 +02:00