Commit Graph

166843 Commits

Author SHA1 Message Date
Tatsuyuki Ishi ad4b82e192 radv: Pre-mask misaligned_mask for VS prolog.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26023>
2023-11-13 11:47:42 +00:00
Tatsuyuki Ishi 55d21f2f12 radv, aco: Inline struct aco_vs_input_state.
Now that we no longer use the radv_vs_input_state pointer, we can simply
inline all the state-related fields.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26023>
2023-11-13 11:47:42 +00:00
Tatsuyuki Ishi 3fc3a94bce radv, aco: Rework VS prolog key handling.
The main change is to use struct radv_vs_prolog_key directly instead of
the compressed representation to simplify an upcoming rework in prolog /
epilog caching. In doing so the state struct pointer was replaced with
an inline struct.

Care was also taken to pre-mask all the states with the active attribute
mask and other masks when it makes sense; this ensures that we don't
accidentally use information not hashed into the key during compilation.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26023>
2023-11-13 11:47:42 +00:00
Tatsuyuki Ishi 5cc7f54f15 radv: Remove last VS prolog reuse logic.
This was broken as the field was never assigned to. This will also be
dropped from the upcoming prolog/epilog lookup rework, as it adds to
code complexity while the benefit of saving one hash table memory access
seems questionable.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26023>
2023-11-13 11:47:41 +00:00
Tatsuyuki Ishi d8a5b76307 aco: Replace aco_vs_input_state.divisors with bitfields.
Instead of concrete divisor value, we only pass down the information
whether the divisor is zero or nontrivial (>1).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26023>
2023-11-13 11:47:41 +00:00
Samuel Pitoiset 9b840df9f6 radv: add drirc options to force re-compilation of shaders when needed
On Steam Deck, shaders are pre-compiled for better performance (less
stuttering, less CPU usage, etc). But when a compiler fix needs to be
backported, there is currently no way to handle this properly.

This introduces 3 drirc options
radv_override_{graphics,compute,ray_tracing}_shader_version in order to
force the driver to re-compile pipelines when needed. By default, the
shader version is 0 for all pipelines.

When one drirc is set for a specific game, RADV will re-compile all
pipelines only once with the compiler fix included (because the
pipeline key would be different).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26094>
2023-11-13 10:47:26 +00:00
Mary Guillemard fe159c85de zink: Check for VK_EXT_extended_dynamic_state3 before setting A2C
Fix crashes for piglit alpha-to-coverage tests when
VK_EXT_extended_dynamic_state3 is not supported (like on Venus)

Fixes: 736577871b ("zink: check for cbuf0 writes before setting A2C")

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26003>
2023-11-13 10:18:54 +00:00
Samuel Pitoiset 88cbe32048 radv: add support for RGP queue events
This can be used for analysing queue submissions.

This is still experimental and it can be disabled with
RADV_THREAD_TRACE_QUEUE_EVENT=false if you have issues with it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22779>
2023-11-13 08:53:10 +00:00
Samuel Pitoiset 33f4307796 radv: add radv_write_timestamp() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22779>
2023-11-13 08:53:10 +00:00
Samuel Pitoiset aa75538674 ac/rgp: update dumping queue event records to the capture
GPU timestamps are emitted by the GPU to a BO with CPU-access which
means the driver needs to read them back when the submission is done.

Fix this by passing a pointer to that BO, like some other records.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22779>
2023-11-13 08:53:09 +00:00
Samuel Pitoiset 661d28cfec radv: restore sampling CPU/GPU clocks before starting SQTT trace
This was removed by mistake in "radv/rgp: Use common trace trigger"
and it introduced a regression with RGP queue events.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22779>
2023-11-13 08:53:09 +00:00
Samuel Pitoiset 55e48d7e0f radv: enable DGC preprocessing when all push constants are inlined
It's not possible when they aren't all inlined because they need to be
copied to the upload BO and the DGC shader also copies the ones that
come from the indirect layout.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25935>
2023-11-13 08:28:53 +00:00
Samuel Pitoiset d067413a72 radv: optimize emitting inlined push constants with DGC
With DGC, push constants can be set from the cmdbuf (CmdPushConstants())
or from the indirect layout. Instead of always emitting inlined push
constants from the DGC shader, just update the ones that come from the
indirect layout and rely on cmdbuf updates for the other ones.

With that, it should be possible to preprocess push constants with
graphics when all can be inlined in shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25935>
2023-11-13 08:28:53 +00:00
Samuel Pitoiset c8140e4c0e radv: emit individual SET_SH_REG for inlined push constants with DGC
This should allow to preprocess if everything is inlined.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25935>
2023-11-13 08:28:53 +00:00
Samuel Pitoiset 0112a245f5 radv: add a helper to determine if it's possible to preprocess DGC
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25935>
2023-11-13 08:28:53 +00:00
Iago Toral Quiroga d04538653b v3d: implement support for PIPE_CAP_NATIVE_FENCE_FD
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20602>
2023-11-13 06:55:23 +01:00
Rob Clark 4807c1e173 freedreno: Always attach bo to submit
Even if app triggers undefined behaviour by using a rsc on multiple
contexts without a flush, we still should attach the bo to the batch.

Fixes: b43e5aec0d ("freedreno/batch: Move submit bo tracking to batch")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26162>
2023-11-12 23:06:27 +00:00
Rob Clark 3ca5f3bf00 freedreno/drm: Fix mmap leak
In the fd_bo_upload() path, we don't want to trigger duplicate mmap's.

Fixes: 53ccb421a2 ("freedreno/drm: Simplify backend mmap impl")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26162>
2023-11-12 23:06:27 +00:00
Rob Clark 3f3fa5ee0c freedreno/a6xx: Rework wave input size
Rework to match tu.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7464
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26149>
2023-11-12 19:53:01 +00:00
Rob Clark a07705def6 freedreno/a6xx: Don't set patch_vertices if no tess
Don't pollute the cache key with unused fields to avoid potentially
generating pointless shader variants.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26149>
2023-11-12 19:53:01 +00:00
antonino 0976dfeca2 nir/zink: drop NIH helper in favor of mesa_vertices_per_prim
`lower_pv_mode_vertices_for_prim` and `decomposed_primitive_size` return
the same values as `mesa_vertices_per_prim` for the primitives that can
be used as output in geometry shaders.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26117>
2023-11-11 10:27:21 +00:00
Tatsuyuki Ishi 325d650c6e radv: Use sizeof(flags) instead of hardcoded size in radv_hash_shaders.
For consistency.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26145>
2023-11-11 05:26:27 +00:00
Tatsuyuki Ishi ef414a8231 radv: Fix mis-sizing of pipeline_flags in radv_hash_rt_shaders.
pipeline_flags was 64-bit yet only the first 4 bytes were hashed.
Luckily, the mask included no flag above the 32nd bit, so this was
technically working fine. Still, it's better to use explicit sizeof
constructs to be more resilient to accidental type changes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26145>
2023-11-11 05:26:26 +00:00
Qiang Yu 768c5934d0 radeonsi: fix piglit image coherency test when use aco
spec@arb_shader_image_load_store@coherency will write to coherent
image in tess shader and read it in fragmant shader. There is a
geometry shader in between.

When lower ngg for the geometry shader, it will wait memory writes
before pos0 export if there's no param output to prevent fragment
shader start early and read any previous memory writes.

We need to update the memory writes info of GS with ES ones because
ES and GS is merged into one shader but when nir they are separated.
LLVM does not have this problem because it will add memory write
wait at the beginning of GS automatically.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26122>
2023-11-11 03:55:22 +00:00
Phillip Pearson 7dcca9d0ef radeonsi: use PRIu64 instead of %lu for uint64_t formatting
This unbreaks 32-bit builds (i386 and armhf).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26083>
2023-11-11 00:07:43 +00:00
Marek Olšák aff7df717d radeonsi/ci: update failures for gfx103
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25941>
2023-11-10 18:03:57 -05:00
Marek Olšák 09c513a31a radeonsi: don't dma-upload shaders on APUs
We don't have VRAM on APUs, so it's useless.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25941>
2023-11-10 18:03:57 -05:00
Marek Olšák 3f108e7615 radeonsi/gfx11: don't set OREO_MODE to fix rare corruption
This is recommended by hw people.

Fixes: 19a59f05a4 - radeonsi/gfx11: program db render control register

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25941>
2023-11-10 18:03:57 -05:00
Marek Olšák 2ac6816b70 radeonsi/gfx11: use SET_CONTEXT_REG_PAIRS_PACKED for other states
It's used where registers are non-contiguous.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25941>
2023-11-10 18:03:57 -05:00
Marek Olšák 9579503bef radeonsi: adjust the total viewport area
I think these are the correct numbers.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25941>
2023-11-10 18:03:57 -05:00
Faith Ekstrand 3af5af429e nir: Optimize boolean ieq/ine with an immediate
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26120>
2023-11-10 21:46:55 +00:00
antonino 2d49f834b2 vulkan: use instance allocator for object_name in some objects
The allocator passed to VkDevice won't be available once it is destroyed
and thefore it cannot be used to allocate `object_name` for instance
level objects such as `VkInstance` or `VkPhysicalDevice` or else there
would be no way of deallocating it when those objects are destroyed.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26085>
2023-11-10 20:57:19 +00:00
Caio Oliveira fcd025c1ce intel/compiler: Remove is_tex()
The current name doesn't cover all the tex related instructions and
in all usages, we already have a switch statement to dispatch
per instruction type, so is more natural to list the instructions we
care there.

In fs::is_send_from_grf() we can simply ignore them since the
instructions are either lowered directly to SEND (Gfx7+) or use
MRF (Gfx6-).

With this change, the fs_inst::size_read() generated code gets
simplified (the "tex" entries get added to the switch jump table
in gcc) and the default case loses the conditional handling tex.

This reduces shader compilation time, as illustrated by replaying
fossils (tested on my TGL laptop):

```
// Rise of the Tomb Raider (N=13)
Difference at 95.0% confidence
	-1.32231 +/- 0.0170138
	-4.37605% +/- 0.0563054%
	(Student's t, pooled s = 0.0210159)

// Cyberpunk 2077 (N=7)
Difference at 95.0% confidence
	-3.64 +/- 0.114993
	-2.95188% +/- 0.0932544%
	(Student's t, pooled s = 0.09873)
```

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25721>
2023-11-10 15:43:31 +00:00
Molly Sophia 424df6a68d tu: Fix KHR_present_id and KHR_present_wait being used without initialization
KHR_present_id and KHR_present_wait were set in get_device_extensions() but uninitialized
in tu_get_features(). This causes presentId and presentWait to be false at all times. Fix it.

Signed-off-by: Molly Sophia <mollysophia379@gmail.com>
Co-Authored-By: Xilin Wu <wuxilin123@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26097>
2023-11-10 14:13:06 +00:00
Roman Stratiienko 56451ce773 v3d: Don't implicitly clear the content of the imported buffer
v3d driver will implicitly clear the buffer's content on the first write
operation. This clearing operation is helpful for allocated buffers,
initializing them with zeros instead of having memory garbage.

Also, this avoids reading the buffer from the RAM to the GPU cache
before rendering, making the first write operation slightly faster.

The clearing operation should not happen for imported buffers where
the buffer may already contain valuable data and the user may want
to render into the buffer only partially.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26136>
2023-11-10 11:16:53 +00:00
Martin Roukala (né Peres) 781e1a34cf radv/ci: fix vkcts-navi21-valve execution
Fixes: 5e44cee47d ("ci: inject gfx-ci/linux S3 artifacts without rebuilding containers")
Suggested-by: David Heidelberg <david.heidelberg@collabora.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26134>
2023-11-10 04:37:56 +00:00
Connor Abbott 04ffef15da ir3/ra: Don't swap killed sources for early-clobber destination
We have an optimization to try to swap regular live intervals with
killed sources when evicting them fails in order to make a contiguous
space for the destination to fit in, but this doesn't work when the
destination is early-clobber.

Fixes
dEQP-GLES31.functional.synchronization.inter_invocation.image_atomic_read_write
on a650+.

Fixes: d4b5d2a ("ir3/ra: Use killed sources in register eviction")
Closes: #8886
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26004>
2023-11-09 21:27:10 +00:00
Eric Engestrom aba837ef71 radv+zink/ci: add navi10 flakes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26135>
2023-11-09 20:59:36 +00:00
Eric Engestrom 5819e0a527 radv+zink/ci: add polaris10 flakes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26135>
2023-11-09 20:59:36 +00:00
Eric Engestrom 37c7ffb958 radv/ci: add polaris10 flakes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26135>
2023-11-09 20:59:36 +00:00
Eric Engestrom 3af19432e9 radv/ci: add vega10 flakes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26135>
2023-11-09 20:59:36 +00:00
Eric Engestrom d42d2ee3a5 radv/ci: add navi21 flakes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26135>
2023-11-09 20:59:36 +00:00
Lionel Landwerlin d4499c4cb2 isl: disable MCS compression on R9G9B9E5
Not supported according to the docs and will trigger an assert
isl_get_render_compression_format().

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26112>
2023-11-09 20:20:43 +00:00
Tele42 631dc5b5e6 drirc: enable vk_wsi_force_swapchain_to_current_extent for "The Talos Principle VR"
The Talos Principle VR shares the same engine quirk as its non-VR counterpart.

Backport-to: 23.2
Backport-to: 23.3

Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26047>
2023-11-09 19:42:07 +00:00
Connor Abbott 29400a56d5 tu: Fix getting VkDescriptorSetVariableDescriptorCountLayoutSupport
Fix the same mistake that 882fd3c5 fixed which we inherited from radv.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26069>
2023-11-09 19:06:04 +00:00
Paulo Zanoni 17e135d3d4 vulkan: fix potential memory leak in create_rect_list_pipeline()
I was playing around with possible improvements to STACK_ARRAY(), and
one of my experiments made gcc point us that we were not freeing
'stages'.

Fixes: 514c10344e ("vulkan/meta: Add a concept of rect pipelines")
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26041>
2023-11-09 18:22:36 +00:00
Dave Stevenson 4b9e80a925 gallium: Add udl (DisplayLink) to the list of kmsro drivers
The udl is a simple render only driver, so configure it
appropriately in gallium.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26129>
2023-11-09 16:57:08 +00:00
Dave Stevenson 720c829341 gallium: Add more TinyDRM drivers to the list of kmsro drivers
As a follow-up to
8cfc17bdda ("kmsro: Add the rest of the current set of tinydrm drivers.")
and
0a42d5b98b ("kmsro: add _dri.so to two of the kmsro drivers.")
add even more TinyDRM drivers that have been added to the kernel but not
to gallium.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26129>
2023-11-09 16:57:08 +00:00
Connor Abbott b380363938 tu: Make sure copies to half-float formats are bit exact
We previously used the 2d path for single-sampled copies which seems to
canonicalize NaNs when the source format is a 16-bit floating point
format, likely because it implicitly converts to 32 bits. The current 3d
path also implicitly converts and has the same problem. Add a new shader
variant for half-float copies and switch to using it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26042>
2023-11-09 16:24:45 +00:00
Danylo Piliaiev 3d3176aa17 tu/a7xx: Fix occlusion queries on pre-A740 GPUs
CP_EVENT_WRITE7::WRITE_SAMPLE_COUNT is supported only starting from
a740, previous GPUs use RB_SAMPLE_COUNT_ADDR.

See: https://github.com/yuzu-emu/yuzu/issues/11958

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26124>
2023-11-09 15:36:37 +00:00