The values of gl_constants.MaxAtomicBufferBindings and
gl_program_constants.MaxAtomicBuffers are derived from
pipe_shader_caps.max_hw_atomic_counter_buffers, which is
synchronized with the host's GL_MAX_*_ATOMIC_COUNTER_BUFFERS.
Based on the definition of struct virgl_context and other
factors, the current virgl driver can only support a maximum
of 32 atomic buffers. If no restrictions are imposed on
pipe_shader_caps.max_hw_atomic_counter_buffers, an error like
the following will occur in the vm when the host's
GL_MAX_*_ATOMIC_COUNTER_BUFFERS exceeds 32.
Thread 1 "glmark2-drm" received signal SIGABRT, Aborted.
Download failed: Invalid argument. Continuing without source file ./nptl/./nptl/pthread_kill.c.
__pthread_kill_implementation (no_tid=0, signo=6, threadid=<optimized out>) at ./nptl/pthread_kill.c:44
warning: 44 ./nptl/pthread_kill.c: No such file or directory
#0 __pthread_kill_implementation (no_tid=0, signo=6, threadid=<optimized out>) at ./nptl/pthread_kill.c:44
#1 __pthread_kill_internal (signo=6, threadid=<optimized out>) at ./nptl/pthread_kill.c:78
#2 __GI___pthread_kill (threadid=<optimized out>, signo=signo@entry=6) at ./nptl/pthread_kill.c:89
#3 0x00007ffff784527e in __GI_raise (sig=sig@entry=6) at ../sysdeps/posix/raise.c:26
#4 0x00007ffff78288ff in __GI_abort () at ./stdlib/abort.c:79
#5 0x00007ffff782881b in __assert_fail_base (fmt=0x7ffff79d01e8 "%s%s%s:%u: %s%sAssertion `%s' failed.\n%n",
assertion=assertion@entry=0x7ffff63f686a "start + count <= 32", file=file@entry=0x7ffff63f6854 "../src/util/
bitscan.h", line=line@entry=306, function=function@entry=0x7ffff6d4c020 <__PRETTY_FUNCTION__.16> "u_bit_cons
ecutive") at ./assert/assert.c:96
#6 0x00007ffff783b517 in __assert_fail (assertion=assertion@entry=0x7ffff63f686a "start + count <= 32", file
=file@entry=0x7ffff63f6854 "../src/util/bitscan.h", line=line@entry=306, function=function@entry=0x7ffff6d4c020
<__PRETTY_FUNCTION__.16> "u_bit_consecutive") at ./assert/assert.c:105
#7 0x00007ffff5250ef5 in u_bit_consecutive (count=48, start=0) at ../src/util/bitscan.h:306
#8 0x00007ffff5252337 in u_bit_consecutive (count=48, start=0) at ../src/gallium/auxiliary/util/u_inlines.h:75
#9 virgl_set_hw_atomic_buffers (ctx=<optimized out>, start_slot=0, count=48, buffers=0x7fffffffd9b0) at ../src/
gallium/drivers/virgl/virgl_context.c:1351
#10 0x00007ffff4a58faf in st_bind_hw_atomic_buffers (st=<optimized out>) at ../src/mesa/state_tracker/st_atom_
atomicbuf.c:168
#11 0x0000000000000000 in ?? ()
Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35730>
Piglit arb_texture_buffer_object-render-no-bo was generating
gpu resets because the uniform stream was missing the last
Fragment Shader uniform. So it was reading instead of the last
fragment shader uniform the first uniform of the vertex shader.
And using that unrelated VS uniform as the sampler address where
the texture should be read.
So now if a buffer object is not bound for a texture buffer object
we write the texture state base address to 0 (NULL) so the default
texture state is used.
So only is needed to set the 4 lower bits of the tmu_p0 with
the bit-mask of word enables.
Fixes: bb8285c258 ("v3d: add support for no buffer object bound")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35847>
Timestamps are made up of multiple results from the different subqueues,
decided by the target stage for the timestamp. Afterwards, when the
timestamp query is copied, those individual results will be combined
into the final result.
For the computation of the final result, each timestamp query also has
a separate info field, containing the info required to perform the copy.
Timestamps inside a renderpass which cover the fragment subqueue need
to be deferred until after the RUN_FRAGMENT job. This happens via a linked
list of timestamps in the subqueue context.
Once in each primary command buffer, the syncobjs of the queries completed
so far are signalled. The list of those queries is part of the subqueue
context as well.
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34932>
As per the old comment:
"These formats correspond to the similarly named MESA_FORMAT_*
tokens, except in the native endian of the CPU. For example, on
little endian __DRI_IMAGE_FORMAT_XRGB8888 corresponds to
MESA_FORMAT_XRGB8888, but MESA_FORMAT_XRGB8888_REV on big endian."
Fixes: 7e10601786 ("dri: Redeclare __DRI_IMAGE_FORMAT_* as PIPE_FORMAT_*")
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35814>
These appear to be gone and everything works without setting them so
let's just treat them like missing bits for now. According to the CUDA
12.8 disassembler, they still do something but it's not the same thing
they did before and I don't have docs to tell me what they really do.
Best to just not set them.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35843>
Blackwell adds separate depth/stencil support (finally!) and interleaved
depth/stencil no longer seems to work. We employ the same trick as ANV
and several other drivers and put stencil in nil_image::planes[1].
Co-authored-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35843>
Among other things, this actually descriptive of the in-memory layout
whereas the VkFormat can sometimes map to multiple pipe_formats. Also
fix a couple harmless typos while we're here and add some unreachable
cases so packed depth/stencil formats don't fall through to the default
case if we support them in future.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35843>
In https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35802 we will
significantly rework geometry shaders & transform feedback. In the new approach,
transform feedback is executed as part of the hardware vertex shader, meaning
the vertex shader needs to write out all the "copies" of the same value into
different parts of the XFB buffer. In the general case of a GS writing triangle
strips, we get 0-3 copies. This is good and lets us parallelize XFB better with
GS.
In the case of a VS alone with XFB, we insert a passthrough GS. In that case
special case, we can only get at most 1 copy, so if we can prove the length of
the output strip is 3 we can delete 2/3 of the shader.
Anyway, the only thing preventing NIR from doing that optimization is failing to
see through some conditionals, fixed by optimizing with the law of trichotomy.
We could add other variants of this pattern (signed vs unsigned, iand vs
ior/ixor) if we expect anything else to hit this other than my boutique use
case.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35802>
Feng Jiang