This moves the parts of zink_format.c that also operates on zink_screen
into zink_screen.c. This has the benefit that we can start testing the
enum-translation code separately from the state.
This will make the next commit a bit cleaner.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7982>
We've been inconsistent between IID_PPV_ARGS,
__uuidof(var), and __uuidof(type). Since Linux doesn't
support the latter of these, they need to be changed.
While we're at it, switch all __uuidof to the more terse
IIV_PPV_ARGS option.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7937>
MSVC has an extension for getting IIDs (GUIDs) from types. Other
compilers can support this extension when targeting Windows, but
don't support it when targeting Linux. Instead, winadapter.h
defines __uuidof(var) to uuidof<decltype(var)>. Then dxguids.h
provides inline specialized definitions for the known D3D types.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7937>
On some platforms, the authenticate callback may be NULL, e.g. on
surfaceless. If a client tries to send a wl_drm.authenticate request
the handler tries to dereference the NULL pointer.
This can be reproduced with libva which unconditionally tries to use
wl_drm.authenticate even with render nodes [1]. Run a compositor with
a surfaceless context, then try to start e.g. mpv to trigger the
segfault.
[1]: https://github.com/intel/libva/pull/476
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7992>
This uses ralloc for spirv_shader and it's data-payload, which seems a
bit neater than having to remember to free twice. We can now also easily
piggy back on more sophisticated ralloc usage as well.
No need to use rzalloc here, as we'll write all memory in the struct,
and the struct isn't used as a hashmap key, so padding shouldn't matter.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8049>
Using the general layout for samplers can have terrible performance, so
let's use shader-read-only-optimal instead.
This is fairly straight-forward if we use conservative bounds for the
barriers, and assume they are being used in all stages.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7655>
Quoting a comment on the bug report:
I suspect the shader is incorrect.
When a (conditional) discard is executed then control flow
becomes non-uniform, meaning that subsequent implicit
derivatives required for the texture operation are not
computed correctly.
Using glsl_correct_derivatives_after_discard fixes it. Note
that for radeonsi this requires LLVM master to work properly.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1386
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8005>
The spec says:
When disabled, it is as if theline stipple has its default value
(the default value being all 1's)
So treat pattern=0xffff as line stippling = off.
This improves performance in specviewperf13 snx lines tests.
For instance in the last test I get:
* master: 260 fps, gpu-load: ~92%
* with this commit: 280 fps, gpu-load: ~72%
(both tested with d60930c017 reverted)
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8105>
The problem was that the shader constants were based on the framebuffer
sample count and ignored the multisample enable state and the line/polygon
smoothing state, which uses MSAA rasterization that only sets SampleMaskIn
to get the coverage for alpha-blended smoothing (the PS epilog computes
the alpha channel from SampleMaskIn and blending generates the AA results).
- This is a complete rework that adds a new state for NGG cull constants.
- It fixes the same thing for the prim discard compute shader.
- It documents how VS_STATE.SMALL_PRIM_PRECISION is encoded.
It fixes blue corruption in Unigine Heaven with MSAA and Medium details
or better.
Fixes: 7648060dc0 - radeonsi: enable NGG culling by default on gfx10.3 dGPUs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8022>
According to the mali driver output, the Mali-400 GP provides space for
304 vec4 uniforms, globals and temporary variables.
The Mali-PP supports a uniform table up to size 32768 total.
However, indirect access to an uniform only supports indices up to 8192
(a 2048 vec4 array). Trying to access beyond that currently causes a pp
job timeout with both lima and the mali driver. To prevent indices
bigger than that in application uniforms, limit to 8192 for now.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8079>
Dylan Baker