AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
139,776 Commits 1 Branch 0 Tags
a881f2295f87642aeee7e767a598bab56f7e7ee5
Commit Graph

139776 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Jason Ekstrand a881f2295f intel/vec4: Set up push ranges before we emit any code 
In order to avoid switching pull constants to push constants and then
having to back to pull, compute the push ranges up-front.  This way we
know by the time we emit code exactly what ranges are pushable.  This is
a bit inefficient in the case where the "normal" push constants get
compacted.  However, most apps don't use giant piles of dead uniforms
combined with substantial UBO use so this should be ok.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>
 2021-05-19 14:38:13 +00:00
Jason Ekstrand c35501ffe8 intel/vec4: Update nr_params in pack_uniform_registers 
This is where we re-arrange and re-pack the params.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>
 2021-05-19 14:38:13 +00:00
Jason Ekstrand 3d1ac996d0 intel/vec4: Add some asserts to move_push_to_pull 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>
 2021-05-19 14:38:13 +00:00
Jason Ekstrand 2db8867943 intel/vec4: Don't spill fp64 registers more than once 
The way we handle spilling for fp64 in vec4 is to emit a series of MOVs
which swizzles the data around and then a pair of 32-bit spills.  This
works great except that the next time we go to pick a spill reg, the
compiler isn't smart enough to figure out that the register has already
been spilled.  Normally we do this by looking at the sources of spill
instructions (or destinations of fills) but, because it's separated from
the actual value by a MOV, we can't see it.  This commit adds a new
opcode VEC4_OPCODE_MOV_FOR_SCRATCH which is identical to MOV in
semantics except that it lets RA know not to spill again.

Fixes: 82c69426a5 "i965/vec4: support basic spilling of 64-bit registers"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>
 2021-05-19 14:38:13 +00:00
Jason Ekstrand 7138249675 anv: Push at most 32 regs for vec4 shaders 
The vec4 back-end can't push UBOs just yet but it soon will be able.
When it starts pushing UBOs, it will have a lower limit than scalar due
to a crummy register allocator.  Mirror that limit in ANV so we don't
run into asserts due to ANV and the back-end making different choices.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>
 2021-05-19 14:38:13 +00:00
Jason Ekstrand c01354d5c4 anv: Support pushing shader constants 
Usually, nir_opt_constant_folding will get rid of any load_constant
intrinsics which might possibly be pushed but there are rare cases where
we can still end up with them.  Better to handle them.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>
 2021-05-19 14:38:13 +00:00
Jason Ekstrand 24b3e71fa9 anv: Plumb the shader into push constant helpers 
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>
 2021-05-19 14:38:13 +00:00
Rhys Perry 3013670dfd aco: disallow SGPRs on DPP instructions 
They can't be encoded.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10841>
 2021-05-19 14:25:37 +00:00
Jose Fonseca 4191eb291b d3d10umd: Avoid duplication in CreateDevice. 
As suggested by Jesse Natalie.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10687>
 2021-05-19 13:50:07 +00:00
Jose Fonseca bd16133572 d3d10sw: Add a sanity test. 
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10687>
 2021-05-19 13:50:07 +00:00
Jose Fonseca 54b8137141 d3d10umd,d3d10sw: Initial import. 
This change adds a gallium D3D10 state tracker that works as a WDDM UMD
software driver, similar to Microsoft WARP, but using llvmpipe/softpipe.

The final deliverable is a d3d10sw.dll, which is similar to WARP's
d3d10warp.dll.

This has been used to run Microsoft Windows HCK wgf11* tests with
llvmpipe, and they were at one point passing 100%.

Known limitations:
- TGSI (no NIR)
- D3D10 only (no D3D11 support yet)
- no WINE integration (WINE doesn't implement WDDM DDI.)

For further details see:
- src/gallium/frontends/d3d10umd/README.md
- src/gallium/targets/d3d10sw/README.md

v2: Drop the DXBC-based disassembly.  Add missing break statements.
v3: Incorporate Jesse's feedback.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10687>
 2021-05-19 13:50:07 +00:00
Jose Fonseca 3927a2d946 draw: Plug leak when combining tessellation with primitive assembly. 
Another lavapipe leak found with LeakSanitizer.

This happens when using tessellation without geometry shader but with a
fragment shader that consumes primitive ID, therefore requiring
primitive assembler stage.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10835>
 2021-05-19 12:24:05 +00:00
Lionel Landwerlin 790ff1ceac anv: fixup physical device properties of fragment shading rate 
We've only enabled the extension on Gfx11+ so no need to care about
prior values.

Also fixup values of (min|max)FragmentShadingRateAttachmentTexelSize.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 231651fd89 ("anv: implement VK_KHR_fragment_shading_rate")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10607>
 2021-05-19 10:58:01 +03:00
Samuel Pitoiset 1bbbdfe590 radv: enable DCC stores on RDNA2 
It seems this gives 2-3% improvements most of the time. This also
enables DCC for concurrent images.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10454>
 2021-05-19 07:17:29 +00:00
Tomeu Vizoso 7bd88dfaa2 panfrost/ci: Test Panfrost on the Mali G72 GPU 
Make use of some Chromebooks recently added to the Collabora LAVA lab to
test Panfrost on the G72 (Bifrost) GPU.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10785>
 2021-05-19 06:56:19 +00:00
Tomeu Vizoso e77163295a ci: Update kernel to v5.13-rc2 
This version adds support for some Chromebooks with the MT8183 SoC that
we want to use to test Panfrost.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10785>
 2021-05-19 06:56:19 +00:00
Jose Fonseca 250605c57d draw: Allocate extra padding for extra shader outputs. 
This prevents read buffer overflows in dup_vertex(), when draw stages
allocate extra shader outputs after the vertex buffers are allocated.

The original issue can be exercised with upcoming
piglit/tests/general/vertex-fallbacks.c test.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: 21.0 21.1 <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10836>
 2021-05-19 06:31:31 +00:00
Mike Blumenkrantz 0df249f542 util/primconvert: add C++ guards to header 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10868>
 2021-05-19 00:05:56 +00:00
Alyssa Rosenzweig de40016d8b panfrost: Express viewport in terms of the batch 
Easier to say the state dependencies.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig c2d571934d panfrost: Simplify panfrost_bind_sampler_states 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig a9a3f55519 panfrost: Mark job_index > 10000 as unlikely 
By definition this is happening <= 0.02% of the time.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 24eccad4a7 panfrost: Remove silly assertion 
We don't assert the rest of the Gallium contract here either.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 35dfaaf1c3 panfrost: Pass batch to panfrost_get_index_buffer_bounded 
Calling batch_for_fbo outside of Gallium entrypoints is an antipattern.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 7561cd5825 panfrost: Deduplicate some code from indirect/direct draws 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 4b3ac29bb9 panfrost: Move batch_set_requirements to the CSO 
Much of the per-draw work can be precomputed.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig bfd76ab501 panfrost: Pack draw-time RSD all-at-once 
Manually inline the functions, delete the duplicates, and use GenXML the
way it's meant to be used. Template structs should **never** cross
function boundaries.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 8f2b2bcff4 panfrost: Hoist part of shader_reads_tilebuffer 
The other part is |'d together. Do the happy path at compile time, and
reserve the draw time fixup for a v5 silicon issue.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 876de2831f panfrost: Pull erratum workaround into own function 
This _does_ need to be draw-time, but it doesn't need to be in the
monster routine.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 672079e592 panfrost: Distribute masks for FPK selection 
We can calculate these at much lower frequencies and just & together at
draw time.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 974709c51c panfrost: Partially determine FPK state 
This might be disabled at draw-time, but we can merge part of the state
check to compile-time.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 0dd3d32141 panfrost: Hoist allow_forward_pixel_to_be_killed 
Only a function of the shader code.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 997c1c84f3 panfrost: Streamline the !fs_required case 
Takes some complexity out of the per-draw path.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 00e3705f60 panfrost: Move early-z decision earlier 
These were already grouped nicely, just never got used. I also added
coverage writes to the list of reasons not to use early-z for
completeness. At the moment this doesn't do anything since this is a
Midgard flag and we haven't hooked up coverage writes on Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig c05e04d530 panfrost: Fill out the rasterizer CSO 
The RSD state is all over the place but let's try to collect what we
can.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 88b9e5e471 panfrost: Correct the type of sample_mask 
Let's not encode impossible masks.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig aee43b8cb0 panfrost: Preset evaluate_per_sample 
Even though this isn't totally known at compile-time, at least one case
is, so let's handle that one ahead-of-time.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 04f2cb8ec5 panfrost: Move depth/stencil/alpha to CSO create 
Now that we can merge RSD state, there's no reason to pack this at
draw-time. This is fun!

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig ca690579b8 panfrost: Prepack partial RSD at compile time 
Even for fragment shaders! Just need to merge the partial descriptors.

Fixes: c21c6d134b ("panfrost: Use the pan_shader_prepare_rsd() helper")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 398e65693b panfrost: Add draw-time merge helper 
The famous GenXML "OR" trick. Will be *essential* to packing RSDs.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 5a8e1dfaf3 panfrost: Precompute bifrost_blend_type_from_nir 
Needed in the draw call hot path. Do it at compile time.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 87256d335b panfrost: Split Bifrost BLEND emit by word 
This allows the GenXML packs to be effectively inlined and folded,
skipping over the Midgard pieces.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 9ad1403747 panfrost: Remove unused dither flag 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig bb0b3fde10 panfrost: Streamline fixed-function get_blend path 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 2984d3bf1f panfrost: Pass batch to panfrost_get_blend 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig b98c40ce36 panfrost: Simplify blend_final 
Now that we've moved everything but the blend shader up to the CSO, we
can just return a blend shader pointer (or zero to indicate the absence
thereof), and remove a source of name conflicts.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 6ca84265e4 panfrost: Distribute out constant colour code 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig b82ac27ec3 panfrost: Pack blend equations at CSO create time 
These are large. Get them out of the per-draw path.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig aa85a64821 panfrost: Garbage collect Gallium blend includes 
Got moved to common blend handling.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig ffeeda3414 panfrost: Translate fixed-function blend at CSO create 
Fixes: 93824b6451 ("panfrost: Move the blend logic out of the gallium driver")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig 3943adbd91 panfrost: Move blend properties to CSO create 
Fixes: 93824b6451 ("panfrost: Move the blend logic out of the gallium driver")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00