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Author SHA1 Message Date
Faith Ekstrand
a4a5fe2270 nak: Add Rust bindings for NIR 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24998>
 2023-11-14 00:48:06 +00:00
Faith Ekstrand
771d9c8856 nak: Add the core IR 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24998>
 2023-11-14 00:48:06 +00:00
Faith Ekstrand
62695614d7 nvk: Run shaders through NAK 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24998>
 2023-11-14 00:48:06 +00:00
Faith Ekstrand
79ff2d9a33 nak: Add initial stubs for rust code 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24998>
 2023-11-14 00:48:06 +00:00
Faith Ekstrand
c778d39fa4 nak: Add a bunch of shader lowering code in NIR 
The nifty thing about the way NVIDIA hardware does inputs and outputs is
that it maps really well to how we do them in NIR.  We can make the
driver_locations match exactly to the attribute address space.  For
fragment shader outputs, we make them register numbers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24998>
 2023-11-14 00:48:06 +00:00
Faith Ekstrand
1b70f39ef6 nak: Copy the optimization loop from Intel 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24998>
 2023-11-14 00:48:06 +00:00
Faith Ekstrand
40f9327c8a nouveau: Add initial headers and meson for the new compoiler 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24998>
 2023-11-14 00:48:06 +00:00
Jesse Natalie
9ef621ec2e d3d12: ARB_query_buffer_object and GL4.4 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
 2023-11-14 00:18:53 +00:00
Jesse Natalie
6384ccd1cd d3d12: Reference count queries in a batch 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
 2023-11-14 00:18:53 +00:00
Jesse Natalie
9caea4c3e9 d3d12: Enable ARB_enhanced_layouts and ARB_texture_mirror_clamp_to_edge 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
 2023-11-14 00:18:53 +00:00
Jesse Natalie
707cdac7e7 d3d12: Fix GS variant I/O slot counts 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
 2023-11-14 00:18:53 +00:00
Jesse Natalie
9fe88dd9b9 d3d12: Support enhanced layouts for VS inputs 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
 2023-11-14 00:18:53 +00:00
Jesse Natalie
72341747f4 d3d12: Split dvec3 interpolatns into devc2 and double 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
 2023-11-14 00:18:53 +00:00
Jesse Natalie
1aa56d486c d3d12: Fix location_frac_mask bitfield size 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
 2023-11-14 00:18:53 +00:00
Jesse Natalie
c77f8b4db0 microsoft/compiler: Stop lowering all I/O to temps 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
 2023-11-14 00:18:53 +00:00
Jesse Natalie
d6dea13231 microsoft/compiler: When packing fractional inputs, find a row with space for it 
Enables vertex attributes to overlap (as GL requires) when using
enhanced layouts with explicit component packing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
 2023-11-14 00:18:52 +00:00
Jesse Natalie
d7bc277726 microsoft/compiler: Don't use 64-bit types for signature entries 
HLSL can't declare these, and the DXIL accesses them as i32 anyway.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
 2023-11-14 00:18:52 +00:00
Jesse Natalie
2334ff67b7 microsoft/compiler: Don't declare PS output registers split across variables 
DXIL doesn't support that. Color targets need to be float4s.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
 2023-11-14 00:18:52 +00:00
Jesse Natalie
adc7caa3ec microsoft/compiler: Bump signature limits for 32 rows of 4 components 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26156>
 2023-11-14 00:18:52 +00:00
Sagar Ghuge
ee48b12a8f anv: Avoid emitting PIPE_CONTROL command for copy/video queue 
Avoid emitting PIPE_CONTROL instruction since Copy/Video doesn't support
it.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26121>
 2023-11-13 23:43:27 +00:00
Sagar Ghuge
8c9a7f7730 anv: Write timestamp using MI_FLUSH_DW on blitter 
On Blitter engine, we don't support PIPE_CONTROL, we have to update
memory locations using the MI_FLUSH_DW command.

v2:
- Handle video queue (Lionel)

Fixes: 056b0cb87f ("anv: add video engine support in various places")
Fixes: 5112b42146 ("anv: Handle end of pipe with MI_FLUSH_DW on transfer queue")

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26121>
 2023-11-13 23:43:27 +00:00
Caio Oliveira
dcb68de656 intel/compiler: Clear up block instructions before re-adding them 
Avoids fixing up list pointers that we don't care about anymore -- since
all the instructions will be re-added in a different order anyway.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira
a9f95bf687 intel/compiler: Reuse same scheduler for all pre-RA scheduling modes 
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira
0dd5378ffe intel/compiler: Make scheduler classes take an external mem_ctx 
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira
04aa2df461 intel/compiler: Separate schedule_node temporary data 
Some fields in schedule_node will need to be reset each time they are
used.  The `cand_generation` needs to be back to zero, and both
`unblocked_time` and `parent_count` need to be back to their initial
values, which were pre-calculated.

Rename the initial data fields and add new ones for the temporary data.

Note the helper function is `per node` to allow it "tag along" with an
existing loops.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira
81594d0db1 intel/compiler: Move earlier scheduler code that is not mode-specific 
This will be useful later on when we reuse the same scheduler for
multiple modes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira
73d4e4118a intel/compiler: Tidy up code in scheduler related to reads_remaining 
- Just assert in functions we expect it to exist
- Predicate usage with `!post_reg_alloc` to avoid suggest there are more
  combinations.
- Reuse an existing loop to call the count function.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira
4f246cf4e7 intel/compiler: Merge child/latency arrays in schedule_node 
Values are used together, saves one pointer in schedule_node,
reduces amount of reallocations when children count grows.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira
e59a054203 intel/compiler: Move FS specific fields to fs_instruction_scheduler 
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira
a6297d05ca intel/compiler: Remove virtual calls from scheduler 
Pull run() and schedule_instructions() for fs, and pull a very
simplified version of those into a run() for vec4.  Because of the
previous patches the duplication is small.

Since we are touching these, change run() implementations to use the
cfg from the existing reference to the visitor/shader instead of taking
one as argument.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira
d76d58cf50 intel/compiler: Cache issue_time information 
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira
ecd7ffcf78 intel/compiler: Extract scheduling related basic functions 
Those will be used in multiple places later.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira
8a8dd2db0c intel/compiler: Add only available instructions to scheduling list 
The list was used for iterating through all instructions and then
later also to track the available ones.  Now that the array iteration
is used, change how we fill it and rename it to reflect its only job.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira
ddff6428c5 intel/compiler: Use array to iterate the scheduler nodes 
For all the preparation data collection before the scheduling
actually happens, it is possible to walk the schedule nodes
in order by iterating on the range of the array dedicated to
a given block.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira
fe6ac5a184 intel/compiler: Allocate all schedule_nodes at once 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira
be012055da intel/compiler: Remove reference to brw_isa_info from schedule_node 
It is always the same for all nodes, so use the one available in the
scheduler itself.

Also, per Matt's suggestion, collect is_haswell from devinfo instead of
from a function argument.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Caio Oliveira
6987571737 intel/compiler: Use linear allocator in parts of brw_schedule_instructions 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25841>
 2023-11-13 23:05:47 +00:00
Friedrich Vock
61203f6078 radv/ci: Update skips comments 
dEQP-VK.api.device_init.create_instance_device_intentional_alloc_fail.basic
doesn't fail anymore, but it takes nearly 5 minutes to run, so keep
skipping it.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26164>
 2023-11-13 20:09:31 +00:00
Friedrich Vock
8ffdad731c vulkan: Don't use set_foreach_remove when destroying pipeline caches 
set_foreach_remove assumes no entries have been removed. That assumption
only holds if no errors occur, since pipeline cache objects can get
removed if an error occurs during deserialization.

This fixes
dEQP-VK.api.device_init.create_instance_device_intentional_alloc_fail.basic
crashing on RADV.

Cc: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26164>
 2023-11-13 20:09:31 +00:00
Eric Engestrom
1cb3c349ff bin/gitlab_gql: give a better name to the --print-job-manifest argument value than PRINT_JOB_MANIFEST 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26143>
 2023-11-13 20:03:44 +00:00
Eric Engestrom
22961fc45a bin/gitlab_gql: deduplicate fetch_merged_yaml() logic between print branches 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26143>
 2023-11-13 20:03:44 +00:00
Eric Engestrom
ef63cc6017 bin/gitlab_gql: rename get_job_final_definition() to print_...() since that's what it actually does 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26143>
 2023-11-13 20:03:44 +00:00
Eric Engestrom
c6ef161bc1 bin/gitlab_gql: only allow a single --print-* argument per invocation 
Printing multiple things as the same time is not really usable, so let's
be explicit and only allow one at a time, which allows a few cleanups in
the code.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26143>
 2023-11-13 20:03:44 +00:00
José Roberto de Souza
08f851f436 anv: Bring back the non optimized version of build_load_render_surface_state_address() 
Commit 50c29e1ffa ("anv: simplify buffer address+size loads from descriptor buffer")
is making use of AuxiliarySurfaceBaseAddress field to store buffer
lenght as it was not used but a LNL workaround will make use of it
so we need to bring back this non optimized version of
build_load_render_surface_state_address().

There is some conflicts so a simple revert do not works.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26152>
 2023-11-13 18:11:39 +00:00
Eric Engestrom
c5ccd55a8e v3d/ci: add new failures 
Possibly a regression from 56451ce773 ("v3d: Don't implicitly
clear the content of the imported buffer"), but not bisected to confirm.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26176>
 2023-11-13 16:10:41 +00:00
Ruijing Dong
8e03c18914 frontends/va: add intra-refresh in VAAPI interface 
Row and column modes are enabled, not the mixed mode,
application should have a logic of sending a period
of intra-refresh sequence to complete the intra-refresh
cycle.

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26133>
 2023-11-13 14:29:40 +00:00
Ruijing Dong
7fae1c46ad radonesi/vcn: enable intra-refresh in vcn encoders 
Enable intra-fresh in vcn encoders and support avc/hevc/av1 codecs.
Just if B frames is enabled or the number of temporal layers is
larger than 1, intra-refresh will be disabled, because it doesn't
support intra-refresh on B frames, and on sub-temporal layers.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26133>
 2023-11-13 14:29:40 +00:00
Ruijing Dong
5524faa22c radeonsi/vcn: change intra-ref name 
1. change structure name from intra-ref to intra-refresh
2. add need_sequence_header variable
3. add intra-refresh cap enum

Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26133>
 2023-11-13 14:29:40 +00:00
Ruijing Dong
66c75b0ca2 radeonsi/vcn: preparation for enc intra-refresh 
This is a prepration for adding intra-refresh
in vcn encoders. Intra-refresh is a feature for
smoothing out fluctuation in bitrate by replacing
a whole intra frame by several intra strips distributed
in several continous frames, it is also used in
suppressing error propagation situation.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26133>
 2023-11-13 14:29:40 +00:00
Hans-Kristian Arntzen
f69863fd5a radv/radeonsi: Forward correct GPU instance to umr. 
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24578>
 2023-11-13 13:37:27 +00:00