a21b925caa
anv: Rename anv_shader_bin to anv_shader_internal
...
It is now only used by internal shaders to the rename make it more clear.
Suggested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37749 >
2025-10-08 19:58:30 +00:00
5c8d7c30f5
anv: Simply anv_shader_set_relocs() parameters
...
Now that we only have one caller for anv_shader_set_relocs() we can simply most
of parameter by struct anv_shader.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37749 >
2025-10-08 19:58:29 +00:00
d5b8c7c17e
anv: Drop shader relocs from anv_shader_bin_create()
...
Acording to Lionel anv_shader_bin_create() is only used now for internal shaders
and those don't use relocs so we can drop this lines.
Suggested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37749 >
2025-10-08 19:58:29 +00:00
62a746b353
anv: Replace duplicated code set shader relocs by a function
...
This code was duplicated and with a assert mistake in one of the copies, so
here moving it to function and calling it from both places.
Also I have removed anv_shader_bin_rewrite_embedded_samplers() as it is already
being done in anv_shader_set_relocs().
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37749 >
2025-10-08 19:58:28 +00:00
379617b77d
anv: Define bt_block only in the block that uses it in anv_cmd_buffer_alloc_binding_table()
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669 >
2025-10-08 17:26:42 +00:00
d728c97022
anv: Add comment to anv_state->offset
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669 >
2025-10-08 17:26:42 +00:00
a90d8fc08e
anv/allocator: Subtract start_offset in chunk_offset
...
anv_state::offset in the context of anv_state_pool is equal to the offset from
the begining of block_pool + start_offset.
Like it is set in anv_state_pool_alloc_no_vg() in the path that allocs a new
block in anv_block_pool.
As anv_state_pool_return_chunk() expects only the offset from the begining of
anv_block_pool so here subtracting to make the path that grabs a larger chunk of
memory of the pool and split into smaler chunks to properly work.
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669 >
2025-10-08 17:26:42 +00:00
4ca18c09c1
anv/allocator: Don't call anv_block_pool_map() with an offset that includes start_offset
...
Only 3 pools sets a value different than zero to start_offset so that might be
a issue that was being hidden by luck.
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669 >
2025-10-08 17:26:42 +00:00
ad62911683
anv/allocator: Change some parameters and variables from 32bit to 64bits
...
struct anv_state::offset and struct anv_block_pool::max_size are 64bits so these
parameters should also be 64bit or risk overflow.
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669 >
2025-10-08 17:26:41 +00:00
27074cb48b
anv/allocator: Drop uncessary function
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669 >
2025-10-08 17:26:41 +00:00
4aee4f0975
anv/allocator: Move definition of ANV_FREE_LIST_EMPTY to anv_allocator
...
While at it also renaming EMPTY to ANV_FREE_LIST_EMPTY_VAL to be more explicit.
No changes in behavior expected here.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669 >
2025-10-08 17:26:41 +00:00
bb5eb9a096
intel/ds: disable draw/blorp tracepoints by default on android
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Tim Van Patten <timvp@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37740 >
2025-10-08 16:00:50 +00:00
c4061b96f0
intel/ds: lump all the draw under the same toggle
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Tim Van Patten <timvp@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37740 >
2025-10-08 16:00:50 +00:00
cb822a323f
anv/blorp: add missing cs stall on compute pipe control
...
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37715 >
2025-10-08 04:49:27 +00:00
c15b8329fd
anv: add cs stall for any pipe control on compute
...
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37715 >
2025-10-08 04:49:27 +00:00
e2697d717f
intel/blorp: add restriction for gfx12
...
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37731 >
2025-10-08 04:26:46 +00:00
a9ea7c542c
anv: report maint5::earlyFragment*SampleCounting correctly
...
The HW bug was fixed on Xe2, report so accordingly.
Can test behavior with dEQP-VK.fragment_operations.early_fragment.*_maintenance5
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37730 >
2025-10-07 22:21:48 +00:00
b75e0462ec
intel: unify parameters for the exec ioctl retries
...
Add the common magic numbers in a header file and make the functions
use them.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559 >
2025-10-07 19:48:36 +00:00
6d6b22b734
intel/xe: unify behavior with i915.ko regarding ENOMEM on DRM_IOCTL_XE_EXEC
...
When the system is under memory pressure (which can happen, for
example, during CI runs), don't immediately give up the exec ioctl
(which, for Vulkan, will result in the device being declared lost).
Instead, retry a little bit just like we do for i915.ko.
This is a trade-off.
One of the reasons to *not* have unified behavior regarding ENOMEM
between i915.ko and xe.ko is the fact that xe.ko uses vm_bind, so if
the user tried to bind more memory than it is able to, we'll just keep
getting ENOMEM as long as we retry the ioctl. We now have a retry
limit, so we'll eventually return the error.
On the other hand, if the problem is other applications consuming all
the memory, having the retry loop may really help avoid unnecessarily
marking the device as lost, since one of our retries may eventually
succeed.
I believe the tradeoff of "we'll now eventually succeed in some cases
where it's possible to succeed, at the expense of retrying for a few
seconds until giving up in cases where we would never be able to
succeed" is an improvement.
If xe.ko ever gives us a way to differentiate between the two
different reasons for ENOMEM, we'll be able to make things much
better. We can also tune our timeouts if needed.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559 >
2025-10-07 19:48:36 +00:00
680daeea63
intel/i915: warn the user about repeated execbuf ENOMEM after ~2s
...
By this point, the user may have noticed their game is not drawing any
new frames, so perhaps an error message might help.
This would also, of course, help identifying ENOMEM problems in our CI
runs.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559 >
2025-10-07 19:48:36 +00:00
dc1877a0a1
intel/i915: give up the execbuf ioctl after ~16s of ENOMEMs
...
If nothing has freed memory until that point, return the error, which
may make the upper layers report the device as lost. It could be that
the system is under very very heavy swapping and that waiting a little
more would make it work, but let's try 16s for now.
v2: Bring down the timeout from ~60s to ~16s (José).
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559 >
2025-10-07 19:48:36 +00:00
7b1e9af900
intel/i915: sleep a little bit between retries of the execbuf ioctl
...
If the ioctl is returning ENOMEM, incessantly retrying does not seem
to be the best way to proceed. After the second retry, sleep 0.1ms,
then more each time, giving the CPU some time to run the other threads
and processes, in the hope that whatever is eating all the memory
might eventually return it.
If the problem is the current thread, then busy looping won't help
either, so here we at least save some power before the user kills the
app.
v2: Adjust the control flow and the sleep time.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559 >
2025-10-07 19:48:36 +00:00
d19a051714
intel/i915: add i915_gem_execbuf_ioctl()
...
Unify the common code for i915.ko execbuf submission between Iris and
Anv. I plan to add more code to this function in the next patches.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559 >
2025-10-07 19:48:36 +00:00
0c638d08e5
anv: we never set I915_EXEC_FENCE_OUT
...
Don't check something that will never be there, just assert() it.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559 >
2025-10-07 19:48:36 +00:00
5e67acbedc
anv/xe: set the queue as lost instead of the device on execbuf failure
...
The i915.ko backend calls vk_queue_set_lost(), let's unify behavior.
v2: Adjust patch due to series reordering.
Reviewed-by: Rohan Garg <rohan.garg@intel.com > (v1)
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559 >
2025-10-07 19:48:36 +00:00
0176c877d5
anv/i915: rework set_lost handling in anv_gem_execbuffer()
...
Move the handling to inside anv_gem_execbuffer(), and also rework
things in a way where we can tell from which caller the error is
coming from.
v2: properly return VkResult (José).
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559 >
2025-10-07 19:48:36 +00:00
0932d0c7e0
anv/xe: rework set_lost handling in xe_exec_ioctl()
...
Move the handling to inside xe_exec_ioctl() and also rework things in
a way where we can tell from which caller the error is coming from.
v2:
- properly return VkResult (José).
- adjust the patch due to reordering the series.
Reviewed-by: Rohan Garg <rohan.garg@intel.com > (v1)
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559 >
2025-10-07 19:48:36 +00:00
e694c7e84e
anv/xe: extract xe_exec_ioctl()
...
For now, this just simplifies checking for devinfo->no_hw, but we're
planning to add more code that everybody calling the XE_EXEC ioctl
will run.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559 >
2025-10-07 19:48:36 +00:00
bca75a8484
anv/i915: bring info->no_hw handling to anv_gem_execbuffer()
...
Every single caller does the same check.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559 >
2025-10-07 19:48:36 +00:00
2bfc62e825
isl: Fix noncoherent framebuffer fetch when base_level != 0
...
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37736 >
2025-10-07 13:35:40 +00:00
9cefd2ddf8
brw: avoid looking at variables to get image formats
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36773 >
2025-10-07 08:54:26 +00:00
63d3c6379e
anv: run image/intrinsic update pass
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36773 >
2025-10-07 08:54:26 +00:00
7b75bf0759
intel/executor: Expose extra command line arguments to script
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37647 >
2025-10-06 23:39:37 +00:00
d775f3b608
ci: uprev VKCTS to 1.4.3.3
...
Reviewed-by: Eric Engestrom <eric@igalia.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37620 >
2025-10-06 21:53:39 +00:00
911f033058
elk: Set lower_txd_data to devinfo
...
Otherwise data will be NULL, and there will be an instant segfault.
Closes : #14035
Fixes: a49cf90e14lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37698 >
2025-10-06 19:24:34 +00:00
ef4f4d3f84
intel/isl: Update the aux-state of zeroed HiZ
...
By dumping the contents of a HiZ buffer before and after fast-clearing,
I've observed that a zeroed HiZ block corresponds to the CLEAR state
until gfx12. The fast-clearing application was piglit's bin/hiz. I ran
this test on a couple bare metal platforms (ICL and BDW) and many
simulated ones (SKL, TGL, DG2, and LNL).
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36383 >
2025-10-06 13:50:39 +00:00
a13aab1859
intel/isl: Update the initial HiZ state for Xe2+
...
Avoids ambiguating in iris and anv.
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36383 >
2025-10-06 13:50:39 +00:00
b709d7dd39
intel: Delete the has_illegal_ccs_values bool
...
This was only used in one location.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36383 >
2025-10-06 13:50:39 +00:00
d41bff3836
anv: Query ISL for the aux-state of undefined layouts
...
For CCS_E on gfx12+, this will cause us to perform full resolves when
transitioning from undefined to a layout which does not support
compression. We don't currently perform such transitions because
compression is always enabled.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36383 >
2025-10-06 13:50:38 +00:00
7d284fe399
intel/isl: Define initial state of non-zeroed CCS on gfx9-11
...
isl_aux_get_initial_state() will soon be used for non-zeroed CCS on
gfx9+. Update the function to avoid hitting an unreachable().
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36383 >
2025-10-06 13:50:37 +00:00
69771e4bfe
brw: fix render target indexing in FS output reads
...
I forgot that the base indice is actually a more complex value that
encodes the render target index and other things.
Also fix the 1d-layered accesses by checking the size of the
framebuffer.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14008
Fixes: d4ab2087cfalyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37653 >
2025-10-06 13:24:16 +00:00
7ef5653b11
Uprev ANGLE to 538129c6b3c17dc864101c7a4af4b74b00706f82
...
https://github.com/google/angle/compare/1df3b59f8730b56b4770595d4d69f36d5283333f...538129c6b3c17dc864101c7a4af4b74b00706f82
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37356 >
2025-10-04 07:14:50 +00:00
a49cf90e14
elk: use the new lower_txd_cb
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37692 >
2025-10-03 20:19:03 +00:00
a14fee571b
elk: remove txd bindless sampler lowering
...
The bindless sampler heap was introduced in Gfx11 which ELK doesn't
support.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37692 >
2025-10-03 20:19:03 +00:00
bc8251673d
brw: use the new lower_txd_cb
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37692 >
2025-10-03 20:19:03 +00:00
ac182d6045
brw/mesh: drop brw_tue_map::per_task_data_start_dw
...
It's always set to a fixed value and not used in many places. Use the
value directly where it's needed.
Suggested-by: Lucas Fryzek <lfryzek@igalia.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37648 >
2025-10-03 17:36:43 +00:00
e624174134
anv: handle compiling of mesh shader separately from task shader
...
With EXT_shader_object, it became possible to compile shaders
independently and then use them together later, so we cannot rely on the
lack of task shader data to decide that no task shader will be used. The
flag VK_SHADER_CREATE_NO_TASK_SHADER_BIT_EXT exists for that purpose,
but it doesn't really make any difference for us. Always assume that if
the mesh shader is reading the task payload, it's going to be used with
one, as otherwise the application is doing it wrong.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13983
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37648 >
2025-10-03 17:36:43 +00:00
29d30c6f3d
brw: Only skip SIMD widths based on pressure if an smaller one compiled
...
Sometimes the compute shader workgroup size requires a larger SIMD width
than the minimum in order to fit in the available threads. In that case
we'll skip the SIMD8 shader, and need to try SIMD16 regardless of how
the register pressure estimate looks.
Fixes: 3af4e63061ian.d.romanick@intel.com >
Tested-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37649 >
2025-10-02 16:17:26 -07:00
c2ae207e80
brw,anv: use XML-based stats
...
I didn't bother switching either iris or elk/hasvk but one could.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37517 >
2025-10-02 20:22:00 +00:00
c008d21947
intel/brw: Move brw_s0() to brw_reg.h
...
It remove a duplication and also it will be used in a future patch
from other file.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37670 >
2025-10-02 10:46:10 -07:00
José Roberto de Souza