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Author SHA1 Message Date
Rob Clark 96b37b9546 freedreno/ir3: Remove used unused 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13160>
 2021-10-04 15:10:07 +00:00
Rob Clark 748583d808 freedreno: Fix some indentation 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13160>
 2021-10-04 15:10:07 +00:00
Rob Clark 6223f29a87 freedreno: Optimize no-op submits 
In some cases we need to emit a no-op batch/submit, just to get a fence.
No need to emit all the boilerplate state-resture and flushing in this
case.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13160>
 2021-10-04 15:10:07 +00:00
Rob Clark 383df59987 freedreno: Get shader variant msgs in perf debug output 
We want FD_MESA_DEBUG=perf to also tell us about variants.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13160>
 2021-10-04 15:10:07 +00:00
Icecream95 ad60fffd49 pan/mdg: Use the correct swizzle for condition moves 
Fixes: 70072a20e0 ("pan/midgard: Refactor swizzles")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13173>
 2021-10-04 14:55:07 +00:00
Boris Brezillon d34c1dc93d panvk: Support clearing ZS attachments 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13137>
 2021-10-04 14:34:55 +02:00
Boris Brezillon c3ebd8ddac panvk: Allow clear_attachment of RTs > 0 
It's just a matter of skipping unused BLEND descriptors and emitting
the one we want to clear.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13137>
 2021-10-04 14:34:55 +02:00
Boris Brezillon 555e6626c2 panvk: Pass the render target index to panvk_meta_clear_attachment() 
The attachment index and render target don't necessarily match. We need
to explicitly pass the render target index to
panvk_meta_clear_attachment() so it can select the correct shader and
emit a valid RSD.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13136>
 2021-10-04 12:17:07 +00:00
Boris Brezillon 3ba34f6633 panvk: Fix wls_size retrieval 
Fix a typo in wls_size assignment leading to a wrong wls_size.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13136>
 2021-10-04 12:17:07 +00:00
Boris Brezillon 4692baacfb panvk: Don't use panfrost_get_default_swizzle() on v7+ 
This helper produces invalid component order values on v7. Use the
MALI_RGB_COMPONENT_ORDER_xxx definitions instead.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13136>
 2021-10-04 12:17:07 +00:00
Boris Brezillon 8acc8f6a0e panvk: Fix allocation of BOs bigger than the slab size 
We can pick a BO from the pool if the BO size exceeds the pool size. In
that case, allocate a BO and save it in a separate array so we can free
it when the memory pool is reset or released.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13136>
 2021-10-04 12:17:07 +00:00
Joshua Ashton 4e58d30d98 radv: Add force_emulate_rt perftest option 
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12974>
 2021-10-04 11:52:40 +00:00
Joshua Ashton 26826a7d60 radv: Enable raytracing extensions on older generations 
We have shader-based bvh traversal for this on older generations now.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12974>
 2021-10-04 11:52:40 +00:00
Joshua Ashton 548382de42 radv: Implement software emulation for intersect_ray 
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12974>
 2021-10-04 11:52:40 +00:00
Joshua Ashton a0f51921a6 radv: Implement build_node_to_addr for GFX8 and below 
Removes the nir_ prefix also given it no longer acts like a typical builder function.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12974>
 2021-10-04 11:52:40 +00:00
Joshua Ashton ff087dd601 radv: Do not pass result to insert_traversal_aabb_case 
This is unused as it performs the tests itself.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12974>
 2021-10-04 11:52:40 +00:00
Joshua Ashton e30a714ad9 radv: Remove assert in radv_rt_bind_tables 
Not necessary anymore.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12974>
 2021-10-04 11:52:40 +00:00
Samuel Pitoiset 87c732bfee radv: determine the ES type (VS or TES) for GS earlier 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13170>
 2021-10-04 12:13:10 +02:00
Samuel Pitoiset 75e5795d41 radv: remove useless loads_dynamic_offsets when emitting push constants 
It's always TRUE if loads_push_constants is TRUE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13170>
 2021-10-04 12:13:10 +02:00
Samuel Pitoiset f901294c0a radv: remove redundant check of needs_multiview_view_index for PS 
layer_input is always TRUE if needs_multiview_view_index is TRUE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13170>
 2021-10-04 12:13:10 +02:00
Samuel Pitoiset 69e656dae4 radv: move use of NGG to the graphics pipeline key 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13099>
 2021-10-04 10:05:18 +00:00
Samuel Pitoiset 0fa431087c radv: move forcing VRS rates to the graphics pipeline key 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13099>
 2021-10-04 10:05:18 +00:00
Samuel Pitoiset 5bacc668fa radv: move forcing MRT output NaN fixup to the graphics pipeline key 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13099>
 2021-10-04 10:05:18 +00:00
Samuel Pitoiset fb453d80a4 radv: move forcing invariant geometry to the graphics pipeline key 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13099>
 2021-10-04 10:05:18 +00:00
Samuel Pitoiset 421b5379df radv: move forcing discard to demote to the graphics pipeline key 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13099>
 2021-10-04 10:05:18 +00:00
Samuel Pitoiset 38c34bf132 radv: constify radv_shader_info for radv_lower_{io_to_mem,ngg}() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13134>
 2021-10-04 08:55:19 +00:00
Samuel Pitoiset b52aaea630 radv: remove unnecessary ac_nir_ngg_config output struct 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13134>
 2021-10-04 08:55:19 +00:00
Samuel Pitoiset 52e91f7640 radv: move ngg passthrough determination earlier 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13134>
 2021-10-04 08:55:19 +00:00
Samuel Pitoiset 2ce78a30ff move: move ngg lds bytes determination earlier 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13134>
 2021-10-04 08:55:19 +00:00
Samuel Pitoiset 90858dd718 radv: move ngg early prim export determination earlier 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13134>
 2021-10-04 08:55:19 +00:00
Rhys Perry 24501b5452 radv: move ngg culling determination earlier 
Co-Authored-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13134>
 2021-10-04 08:55:19 +00:00
Samuel Pitoiset 5896bf41ca radv: do not declare an extra user SGPR for sample positions and PS 
This is part of the scratch buffer.

No fossils-db change on Sienna.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13140>
 2021-10-04 08:30:38 +00:00
Pierre-Eric Pelloux-Prayer dfa4a85ddf radeonsi: don't clear G_028644_OFFSET 
Before 11d1309d82 this field was updated even when G_028644_PT_SPRITE_TEX was 0.

See https://gitlab.freedesktop.org/mesa/mesa/-/issues/5423

Fixes: 11d1309d82 ("radeonsi: restructure si_get_ps_input_cntl for future refactoring")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13105>
 2021-10-04 08:04:37 +00:00
Samuel Pitoiset 19a71e79b8 radv: get the float controls execution mode from NIR for LLVM 
No need to duplicate it. Though, I think it was already broken
for merged shaders, but it doesn't matter.

No CTS regressions anyways with LLVM.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12989>
 2021-10-04 07:42:19 +00:00
Samuel Pitoiset 55e6a68f69 radv: disable the DX10 diamond test for better line rasterization perf 
Ported from RadeonSI. PAL also doesn't enable it for Vulkan.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13066>
 2021-10-04 07:21:51 +00:00
Andreas Baierl 1e9f18008f lima/parser: add shader disassembly to dump 
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13138>
 2021-10-04 08:37:50 +02:00
Lionel Landwerlin 445996379b clc: let user specify the targetted SPIRV version 
This version is given to the LLVM-SPIRV translator. On the SPIRV-Tools
side of things, we want to use the highest available version to be
sure to be able to parse back what was generated.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13113>
 2021-10-03 19:32:54 +00:00
Lionel Landwerlin 72fd81d0ac clc: print warnings/errors on their own line 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13113>
 2021-10-03 19:32:54 +00:00
Lionel Landwerlin 3c8c817ae7 clc: add allowed extension for compile parameter 
The LLVM-SPIRV translator can include a bunch of capabilities into the
generated SPIRV which is not what you always want. That include
internal Intel specific capabilities from the translator.

v2: Rename options
    Fixup checks (Jesse)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13113>
 2021-10-03 19:32:54 +00:00
Mike Blumenkrantz 9e3293bcd4 zink: ensure fences are released before reusing them 
at this point it's guaranteed that the cmdbuf has completed since the
timeline id has passed, but vulkan hasn't technically "released" the fence
until it's been waited upon, so cut down on some validation spam by waiting
here like in get_batch_state()

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13144>
 2021-10-03 14:57:03 +00:00
Mike Blumenkrantz 477855fce4 zink: stop using VK_COMMAND_POOL_CREATE_RESET_COMMAND_BUFFER_BIT 
the pool is reset anyway so this is unnecessary

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13145>
 2021-10-03 10:43:39 -04:00
Bas Nieuwenhuizen 0dd0f6cf75 radv: Don't invalidate VCACHE after clear_htile_mask. 
radv_src_access_flush sets all the required flags (which doesn't include VCACHE. The
flush after write is implicit. The invalidate happens for any user that needs it
with the radv_dst_access_flush).

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12274>
 2021-10-03 12:16:55 +00:00
Lionel Landwerlin 9667539b96 anv: honor INTEL_DEBUG=sync 
Useful debug option for hangs.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13161>
 2021-10-03 11:01:18 +00:00
Bas Nieuwenhuizen c6b8702eb4 radv: Fix Android build for common functions. 
Fixes: 9fc16b66d0 ("radv: use common vkGetPhysicalDevice{Image}FormatProperties()")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5328
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12764>
 2021-10-03 00:36:58 +00:00
Marek Olšák edc8a4a037 ac/surface: enable DCC image stores for all displayable DCC on gfx10.3 
Co-authored-by: Joshua Ashton <joshua@froggi.es>
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13153>
 2021-10-02 22:56:48 +00:00
Joshua Ashton e76956b9e0 radeonsi: Use common DCC image store check 
We need to keep RADV and RadeonSI on the same page about this due to modifiers.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13153>
 2021-10-02 22:56:48 +00:00
Joshua Ashton fccdebd64d radv: Use common DCC image store check 
We need to keep RADV and RadeonSI on the same page about this due to modifiers.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13153>
 2021-10-02 22:56:48 +00:00
Joshua Ashton e6fcf65578 ac/surface: Add helper for checking if a surface supports DCC Image stores 
We need to keep RADV and RadeonSI on the same page about this due to modifiers.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13153>
 2021-10-02 22:56:48 +00:00
Kenneth Graunke 0a9e46e535 iris: Delete the MI_COPY_MEM_MEM resource_copy_region implementation. 
The MI_COPY_MEM_MEM version of resource_copy_region has known bugs:

- It's failing to set valid_buffer_range correctly
- It's missing iris_emit_buffer_barrier_for() for the
  source/destination, so there may be missing flushes.
- There are some bad interactions with the tile cache and VF using L3.

Even with those fixed, if you expand the "no more than 16 bytes"
restriction to allow copies up to 1024 bytes, then it starts failing
Piglit tests on Icelake.

We could probably fix this.  However, I had originally only measured a
0.689096% +/- 0.473968% (n=4) speedup in Shadow of Mordor's OpenGL
port, which is already fairly small, especially before adding missing
flushes.  Further, some of that likely came from not switching between
render and compute...which we'll soon be able to avoid thanks to BLOCS.

Folks were also worried that MI_COPY_MEM_MEM can't be pipelined, and
that stalling the command streamer may actually slow things down,
especially as the GPUs become more powerful.  We aren't really sure
about this, but it's another concern.

So, let's just get rid of this optimization.  It seemed like a good
idea at the time, but it's just causing issues for very little gain.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12863>
 2021-10-02 01:48:59 -07:00
Emma Anholt b40d070ab9 freedreno: Move the headergen2 test to be meson unit tests. 
Now all the freedreno build-time testing is just "meson test -C build"

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6360>
 2021-10-01 23:16:04 +00:00