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Author SHA1 Message Date
Marek Olšák 9538b9a68e radeonsi: add support for Sienna Cichlid 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
 2020-06-09 16:17:36 +00:00
Marek Olšák 789cdab3b6 ac: align num_vgprs for gfx10.3 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
 2020-06-09 16:17:36 +00:00
Marek Olšák 2cc4bfbe01 radeonsi: don't set any XNACK options on gfx10.3 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
 2020-06-09 16:17:36 +00:00
Marek Olšák 430d384c31 radeonsi: set BIG_PAGE fields on gfx10.3 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
 2020-06-09 16:17:36 +00:00
Marek Olšák 7edf15ad47 radeonsi: move L2_CACHE_CONTROL registers into si_emit_framebuffer_state 
the next commit will set more fields.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
 2020-06-09 16:17:36 +00:00
Marek Olšák 788696c7b2 radeonsi: implement R9G9B9E5 render target and image store support on gfx10.3 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
 2020-06-09 16:17:36 +00:00
Marek Olšák a54bcb9429 radeonsi: enable larger SDMA clears and copies on gfx10.3 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
 2020-06-09 16:17:36 +00:00
Marek Olšák c4b5fd9ab0 radeonsi: honor a user-specified pitch on gfx10.3 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
 2020-06-09 16:17:36 +00:00
Marek Olšák abe89e1329 ac/surface: add displayable DCC code for gfx10.3 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
 2020-06-09 16:17:36 +00:00
Marek Olšák a23802bcb9 ac,radeonsi: start adding support for gfx10.3 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
 2020-06-09 16:17:36 +00:00
Marek Olšák a1602516d7 ac,radeonsi: replace == GFX10 with >= GFX10 where it's needed 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383>
 2020-06-09 16:17:36 +00:00
Marek Olšák ceaf848c56 radeonsi: enable ARB_sparse_buffer 
This seems to be working now, but it wasn't working before.
I don't know what fixed this. Tested on Raven and Navi14.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5402>
 2020-06-09 16:00:38 +00:00
Connor Abbott 334204823e tu: Fix context faults loading unused descriptor sets 
The app is allowed to never bind descriptor sets that are statically
unused by the pipeline, which would've caused a context fault since
CP_LOAD_STATE6 would try to load the descriptors that don't exist. Fix
this by not preloading descriptors from unused descriptor sets. We could
do more fine-grained accounting of which descriptors are used, but this
is enough to fix the problem.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5400>
 2020-06-09 15:35:29 +00:00
Danylo Piliaiev a751051248 i965: Work around incorrect usage of glDrawRangeElements in UE4 
Unreal Engine 4 has a bug in usage of glDrawRangeElements,
causing it to be called with a number of vertices in place
of "end" parameter (which specifies the maximum array index
contained in indices).

Since there is unknown amount of games affected and we
could not identify that a game is built with UE4 - we are
forced to make a blanket workaround, disregarding max_index
in range calculations. Fortunately all such calls look like:
  glDrawRangeElements(GL_TRIANGLES, 0, 3, 3, ...);
So we are able to narrow down this workaround.

This was uncovered after b684030c3a
broke a bunch of UE4 games.

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2917
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5203>
 2020-06-09 15:04:35 +00:00
Connor Abbott 487aa807bd tu: Rewrite flushing to use barriers 
Replace the various ad-hoc flushes that we've inserted, copied from
freedreno, etc. with a unified system that uses the user-supplied
information via vkCmdPipelineBarrier() and subpass dependencies.

There are a few notable differences in behavior:

- We now move setting RB_CCU_CNTL up a little in the gmem case, but
hopefully that won't matter too much. This matches what the Vulkan blob
does.

- We properly implement delayed setting of events, completing our
implementaton of events.

- Finally, of course, we should be a lot less flush-happy. We won't emit
useless CCU/cache flushes with multiple copies, renderpasses, etc. that
don't depend on each other, and also won't flush/invalidate the cache
around renderpasses unless we actually need to.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4964>
 2020-06-09 14:40:52 +00:00
Connor Abbott 29abf49886 tu: Remove useless event_write helpers 
tu6_emit_cache_flush() was wrongly named, and with the removal of the
last parameter both are useless.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4964>
 2020-06-09 14:40:52 +00:00
Connor Abbott f4f6a9be9f tu: Don't actually track seqno's for events 
We just dropped the last user which actually cared about the seqno.
This never worked anyway, since the seqno was never reset between
multiple executions of the same command buffer. Turn the part of the
control buffer which used to track the seqno into a dummy dword, and
figure out automatically whether we need to include it. We will
implement seqnos again eventually, with timline semaphores, but that
will likely be totally different.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4964>
 2020-06-09 14:40:52 +00:00
Connor Abbott dfb176a0ac tu: Remove useless post-binning flushes 
The Vulkan blob doesn't do this, and based on my understanding of how
the blob works this is unnecessary. CACHE_FLUSH is already serialized
against all 3d commands so you don't need to wait for rendering commands
to finish before issuing it, and the subsequent wfi + WAIT_FOR_ME will
cause the CP to wait for the CACHE_FLUSH to finish, so there's also no
need to wait for it to complete. The CACHE_INVALIDATE also seems
unnecessary, and also isn't done by the blob.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4964>
 2020-06-09 14:40:51 +00:00
Icecream95 18c067f9f0 panfrost: Mark PIPE_BUFFER BOs as not renderable 
Without this, memory usage explodes by 16x due to height alignment.

Closes: #2715
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4451>
 2020-06-09 13:52:52 +00:00
Pierre-Eric Pelloux-Prayer db57624c0c winsys/radeon: do not cast bo->va as void* 
Using a util_hash_table_create_ptr_keys to store bo->va address doesn't
work on 32 bits.
This commit makes radeon_drm_winsys::bo_vas a hash_table_u64 instead.

Tested by Miklós Máté.

CC: 20.1 <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3056
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5380>
 2020-06-09 11:28:16 +02:00
Christian Gmeiner 839bc2daa9 ci: use separate docker images for baremetal builds 
Using arm_test-base as a separate base layer as well for storage &
network bandwidth efficiency.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5381>
 2020-06-09 06:29:30 +00:00
Christian Gmeiner 408b36a11d ci: add arm_test-base docker image 
Similar to x86_build-base.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5381>
 2020-06-09 06:29:30 +00:00
Samuel Pitoiset d7923c74d4 radv/llvm: expose VK_EXT_shader_demote_to_helper_invocation with LLVM 9+ 
It should already work with the LLVM backend.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5361>
 2020-06-09 08:04:23 +02:00
Marek Olšák d76e8131ac glthread: sync in glFlush for multiple contexts 
See the code comment.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5382>
 2020-06-09 05:07:01 +00:00
Marek Olšák 90c34aed1d gallium/u_vbuf: add a faster path for uploading non-interleaved attribs 
+1% higher FPS in torcs.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5304>
 2020-06-09 00:45:26 -04:00
Marek Olšák 88e8f1a38d gallium/u_vbuf: get rid of some pointer dereferences 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5304>
 2020-06-09 00:45:23 -04:00
Ben Skeggs a6c747e8e0 nir: use bitfield_insert instead of bfi in nir_lower_double_ops 
NVIDIA hardware doesn't have an equivilant to bfi, but we do already have
a lowering for bitfield_insert->bfi.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5373>
 2020-06-09 08:38:22 +10:00
Jonathan Marek 7b4f0eadc1 turnip: fix VFD_CONTROL for binning pass 
Fixes some cases with TU_DEBUG=forcebin, specifically the failures in:
dEQP-VK.glsl.*_vertex

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5370>
 2020-06-08 16:28:48 -04:00
Jonathan Marek ab72c07aef turnip: use common emit_xs_cntl to fill a6xx_sp_xs_ctrl_reg0 
Note this changes the value of SP_GS_CTRL_REG0, by using FOUR_QUADS and
setting MERGEDREGS. ir3 expects MERGEDREGS, and using FOUR_QUADS instead
of TWO_QUADS doesn't seem to hurt.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5370>
 2020-06-08 16:28:43 -04:00
Jonathan Marek e16608e233 turnip: fix HW binning with geometry shader 
Fixes failures with TU_DEBUG=forcebin and geometry shaders, for example:
dEQP-VK.binding_model.*geometry*
dEQP-VK.transform_feedback.simple.query*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5370>
 2020-06-08 16:23:05 -04:00
Jonathan Marek 6ac4d778fa turnip: correctly emit non-binning vs in transform feedback case 
The offset given to tu6_emit_shader_object was wrong, binning_vs_offset
should only be used when using the binning pass vs.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5370>
 2020-06-08 16:23:05 -04:00
Jonathan Marek 6cc95abb27 freedreno/a6xx: use nonbinning VS when GS is used 
The current "ds = state->bs" seems broken, and the "vs = state->bs" is
unnecessary (already set above). Since it was added as part of a GS-related
patch, I think this is what was intended.

Note: tesselation disables GMEM rendering so we shouldn't have to worry
about hs/ds + binning interaction.

Fixes: 0eebedb619 ("freedreno/a6xx: Emit program state for GS")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5370>
 2020-06-08 16:23:05 -04:00
Jonathan Marek 88d5917cc1 turnip: clamp sampler minLod/maxLod 
Otherwise A6XX_TEX_SAMP_1_{MIN,MAX}_LOD silently overflows.

This fixes these tests:
dEQP-VK.texture.explicit_lod.2d.derivatives.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5375>
 2020-06-08 19:52:41 +00:00
Jonathan Marek fecd83a0e8 turnip: update some properties based on blob driver 
subTexelPrecisionBits/mipmapPrecisionBits change fixes some failures in:
dEQP-VK.texture.explicit_lod.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5375>
 2020-06-08 19:52:41 +00:00
Jonathan Marek 8c26c9eed8 turnip: move HLSQ_UPDATE_CNTL write to before xs config writes 
This matches the blob and gallium driver more closely, and fixes a
rendering issue observed on a650.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5376>
 2020-06-08 18:08:23 +00:00
Caio Marcelo de Oliveira Filho d1f6d2f3e8 nir: Fix logic that ends combine barrier sequence 
The combination must stop when we see a scoped barrier that have
execution scope, i.e. it has control barrier behavior.  The code was
mistakenly looking at the wrong scope.

Fixes: 345b5847b4 ("nir: Replace the scoped_memory barrier by a scoped_barrier")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5365>
 2020-06-08 15:49:24 +00:00
Caio Marcelo de Oliveira Filho fe214d60bc intel/fs: Add Fall-through comment 
Just to clarify the missing break is intentional.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5365>
 2020-06-08 15:49:24 +00:00
Caio Marcelo de Oliveira Filho e5bb4b1ee8 spirv: Memory semantics is optional for OpControlBarrier 
Fixes: 3ed2123d77 ("spirv: Use scoped barriers for SpvOpControlBarrier")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5365>
 2020-06-08 15:49:24 +00:00
Caio Marcelo de Oliveira Filho b7a3821a5c nir: Fix printing execution scope of a scoped barrier 
Fixes: 345b5847b4 ("nir: Replace the scoped_memory barrier by a scoped_barrier")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5365>
 2020-06-08 15:49:24 +00:00
Christian Gmeiner 7ec2582087 etnaviv: drop translate_blend(..) 
PIPE_BLEND_* matches 1:1 the hardware defines.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4187>
 2020-06-08 15:35:13 +00:00
Danylo Piliaiev 9f1cf0e491 glsl: inline functions with unsupported return type before converting to nir 
glsl_to_nir doesn't expect non-vector/scalar return types in functions.

Fixes: 7e60d5a501
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3058
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3060
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Witold Baryluk <witold.baryluk@gmail.com>
Reviewed-by: Witold Baryluk <witold.baryluk@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5333>
 2020-06-08 15:01:50 +00:00
Rhys Perry 43e69475ad aco: use v_xor3_b32 
fossil-db (Navi):
Totals from 334 (0.26% of 128321) affected shaders:
CodeSize: 3345532 -> 3345484 (-0.00%); split: -0.00%, +0.00%
Instrs: 624662 -> 622778 (-0.30%); split: -0.30%, +0.00%

Mostly affects some parallel-rdp shaders

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5357>
 2020-06-08 13:20:01 +00:00
Rhys Perry 1234faa7bf ac/gpu_info, radv: set max_wave64_per_simd to 20 on GFX10 
Fixes RADV max_waves reporting for GFX10

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5356>
 2020-06-08 10:26:59 +00:00
Samuel Pitoiset 86f21e4eba nir/lower_explicit_io: fix NON_UNIFORM access for UBO loads 
Make sure to propagate the NON_UNIFORM access for UBO loads, so
that non-uniform loads are correctly lowered.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5311>
 2020-06-08 07:35:43 +00:00
Arcady Goldmints-Orlov b38d3cdcea nir/spirv/glsl450: increase asin(x) precision 
asin(x) is now implemented using a piecewise approximation, which
improves the precision for |x| < 0.5
Previously, we were using a polynomial approximation for both the
asin() and acos() functions. Unfortunately, for asin(), this polynomial
does not have enough precision to satisfy the Vulkan CTS requiremenents,
which define the asin() precision based on the precision of
atan2(x, sqrt(1.0 - x*x)). The piecewise approximation gives the needed
precision in the problematic range.

v2: Skip the piecewise approximation for acos

Closes: #1843

Acked-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3809>
 2020-06-08 07:10:17 +00:00
Samuel Pitoiset 008b0d1701 ac/nir: adjust an assertion for D16 on GFX6-GFX7 
16-bit types can be used with MUBUF on GFX6-GFX7.

Fixes: c3e0ba52a0 ("ac/nir: support 16-bit data in buffer_load_format opcodes")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5325>
 2020-06-08 08:45:32 +02:00
Peter Seiderer b3beb6207f v3d_bufmgr: fix time_t printf 
Fixes:

  error: format ‘%ld’ expects argument of type ‘long int’, but argument 3 has type ‘time_t’ {aka ‘long long int’}

Signed-off-by: Peter Seiderer <ps.report@gmx.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4279>
 2020-06-07 18:08:47 +02:00
Peter Seiderer d512028d06 pan_bo.h: add time.h include for time_t 
Fixes:

  ../src/gallium/drivers/panfrost/pan_bo.h:93:9: error: unknown type name ‘time_t’

Signed-off-by: Peter Seiderer <ps.report@gmx.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4279>
 2020-06-07 18:08:17 +02:00
Peter Seiderer 07ba5e47e6 vc4_bufmgr: fix time_t printf 
Fixes:

  error: format ‘%ld’ expects argument of type ‘long int’, but argument 3 has type ‘time_t’ {aka ‘long long int’}

Signed-off-by: Peter Seiderer <ps.report@gmx.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4279>
 2020-06-07 18:07:47 +02:00
Timothy Arceri e43ab7bb05 glsl: fix potential slow compile times for GLSLOptimizeConservatively 
See code comment for full description of the change.

Fixes: 0a5018c1a4 ("mesa: add gl_constants::GLSLOptimizeConservatively")

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3034

Tested-by: Witold Baryluk <witold.baryluk@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5346>
 2020-06-07 03:28:30 +00:00