AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
202,363 Commits 1 Branch 0 Tags
901f1ea8bd0400ac6004618da2ddeb907370dfd4
Commit Graph

202363 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Yogesh Mohan Marimuthu 901f1ea8bd winsys/radeon: struct radeon_cmdbuf is rcs instead of cs for consistency 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33661>
 2025-02-26 13:53:44 +00:00
Yogesh Mohan Marimuthu 06691b9f39 winsys/amdgpu: amdgpu_cs_context is csc, amdgpu_cs is acs 
radeon_cmdbuf is rcs instead of rws, probably earlier renaming of
rws was agressive.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33661>
 2025-02-26 13:53:44 +00:00
Yogesh Mohan Marimuthu fc36840c04 winsys/amdgpu: make csc context as array 
Instead of csc1 and csc2, make it as an array. Use current_cs_index
to point to csc that will be getting filled with commands.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33661>
 2025-02-26 13:53:44 +00:00
Yogesh Mohan Marimuthu eb5bd057a1 winsys/amdgpu: do not use rcs->csc 
Use amdgpu_cs(rcs)->csc. This will give more code readability with
next cleanup patches.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33661>
 2025-02-26 13:53:43 +00:00
Valentine Burley fe4d8d422f anv/ci: Remove fixed test from xfails 
This Vulkan Video test was fixed in the commit referenced below.

Fixes: ee52885aec ("anv: Add one more flag of VideoCapability for encoding.")
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33765>
 2025-02-26 13:32:24 +00:00
David Rosca 0e68a2655f radeonsi/vcn: Rework decode ref handling 
The issue with using video buffer associated data is that the data will
not be cleared when the buffer is removed from DPB. This will cause
issues if application tries to reuse such buffer (buffer that was
valid buffer in DPB in the past, but is currently not active in DPB)
as a dummy buffer for missing reference.
With Tier2 this works correctly because we allocate the DPB buffers
internally, but with UDT we use the video buffers directly for
references and so we need to make sure to only use the valid buffer
for a given index.

Instead of storing the buffer index as video buffer associated data,
use the render_pic_list array that we already have for keeping track
of active buffers in DPB.

Acked-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33641>
 2025-02-26 13:07:10 +00:00
David Rosca fd3f297eb5 radeonsi/vcn: Add UDT support for VCN5 
UDT uses decode target buffers directly as references.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33641>
 2025-02-26 13:07:10 +00:00
Juan A. Suarez Romero 826acf5dce Revert "v3dv/ci: disable rpi5 job" 
This reverts commit 68db5481f4.

Now that we are skipping tests causing OOM, we shouldn't have the
original problems that motivated the disablement.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33763>
 2025-02-26 12:39:36 +00:00
Juan A. Suarez Romero 167347212a v3dv/ci: Skip tests causing OOM 
There are some tests that reaches out of memory (OOM) on purpose to
cover some fail cases.

But others that shouldn't are actually causing OOM too because we run
multiple tests in parallel, which increases the memory pressure.

This can affects other tests running in parallel, causing an increase of
the flakiness.

It is better to skip all of them

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33763>
 2025-02-26 12:39:36 +00:00
David Rosca 7f7206f1a9 radeonsi/video: Allocate video buffers with modifiers 
This enables tiling (and DCC on GFX12) for video buffers.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33598>
 2025-02-26 11:31:28 +00:00
David Rosca 58a6be0f1e radeonsi/vcn: Fix chroma pitch for JPEG decode 
This used to work fine with linear only, but now we need to use the
actual chroma surface pitch. For JPEG this value is in bytes.
Also swap 64KB_R_X addr mode with 256KB_S_X.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33598>
 2025-02-26 11:31:27 +00:00
David Rosca 6695eeaf42 ac/surface: Allow DCC for multi-plane formats on GFX12 
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33598>
 2025-02-26 11:31:27 +00:00
David Rosca e9341be246 ac/surface: Only allow linear modifier for subsampled 422 formats 
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33598>
 2025-02-26 11:31:27 +00:00
Benjamin Lee 094177b9b5 meson: update wayland-protocols source_hash 
This was missed when updating to 1.41.

Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Fixes: 53b40a40f4 ("increase required wayland-protocols version to 1.41")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33752>
 2025-02-26 10:53:25 +00:00
Mary Guillemard e9d1e2b61e pan/genxml: Use DCD Flags in Draw struct on v9+ 
The first bits of the Draw struct were moved to DCD flags since v10.
To keep things in sync, we now use DCD flags instead on v10 and define
it on v9 to avoid uneeded PAN_ARCH if/else in preload logics.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33736>
 2025-02-26 10:17:11 +00:00
Mary Guillemard 3aa1687829 panfrost: Rename CS ADD_IMMEDIATEXX to ADD_IMMXX 
This is required map more closely to newer generation definition and avoid
needless PAN_ARCH blocks.

As the opcode is actually named ADD_IMMEDIATEXX on v12 and lower, this
wasn't changed.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33736>
 2025-02-26 10:17:11 +00:00
Mary Guillemard e970d440a2 panfrost: Fix FLUSH_CACHE2 other definition 
This actually use the same format as L2/LSC flush mode.

This change is here to ease new generation definitions.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33736>
 2025-02-26 10:17:11 +00:00
Mary Guillemard 0eca4b87f0 panfrost: Rename CSF MOVE into MOVE48 
We name it move48 on our helpers and new generations renamed it too.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33736>
 2025-02-26 10:17:11 +00:00
Mary Guillemard 6603e519c9 panfrost: Avoid hard crash when major arch is unknown 
This allows enumerating other Gallium screens.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33736>
 2025-02-26 10:17:11 +00:00
Mary Guillemard 9a70754ebd panfrost: Use CSIF info for CSF registers count 
Instead of hardcoding 96 everywhere, we can get that information from
the kernel. This is useful for newer generations that increased the
count of registers present.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33736>
 2025-02-26 10:17:11 +00:00
Mary Guillemard 90bf48829a panfrost: Switch Gallium driver to use cs_sr_regXX 
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33736>
 2025-02-26 10:17:11 +00:00
Mary Guillemard 4c2e2eb445 panfrost: Rework cs_sr_regXX to be a macro 
This move cs_sr_regXX in cs_builder.h and make usage less verbose.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33736>
 2025-02-26 10:17:11 +00:00
Mary Guillemard bbecaacc3f pan/genxml: Define RUN_FRAGMENT staging registers in an enum 
This makes it more clear what is what.

It will also reduce the pain of migration on newer gen.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33736>
 2025-02-26 10:17:11 +00:00
Mary Guillemard c8882d83fd pan/genxml: Define RUN_COMPUTE staging registers in an enum 
This makes it more clear what is what.

It will also reduce the pain of migration on newer gen.

RUN_COMPUTE_INDIRECT also use the same SRs so we also map to RUN_COMPUTE
there.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33736>
 2025-02-26 10:17:11 +00:00
Mary Guillemard 11beea6242 panfrost: Remove write to TSD_3 in Gallium driver 
This was set but never actually used.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33736>
 2025-02-26 10:17:11 +00:00
Mary Guillemard e0696b80d0 pan/genxml: Define RUN_IDVS staging registers in an enum 
This makes it more clear what is what.

It will also reduce the pain of migration on newer gen as most values
only moved place.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33736>
 2025-02-26 10:17:11 +00:00
Juan A. Suarez Romero 6f4af54aac vc4/ci: update expected results 
Add new flakes

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33760>
 2025-02-26 09:52:51 +00:00
Eric Engestrom 007998db14 ci/build: build-test the dri2 code 
To prevent things like https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33669

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33692>
 2025-02-26 09:14:39 +00:00
Tapani Pälli 41a7b58214 iris: wait for imported fences to be available in iris_fence_await 
This ensures shared fence is available before we submit (and fail)
a batch with it, this fixes following issue on iris driver:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/12650

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33662>
 2025-02-26 04:32:29 +00:00
Hyunjun Ko ee52885aec anv: Add one more flag of VideoCapability for encoding. 
Adds VK_VIDEO_ENCODE_H264/5_CAPABILITY_PER_PICTURE_TYPE_MIN_MAX_QP_BIT_KHR.
This also fixes dEQP-VK.video.capabilities.h265_encode_capabilities_query.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33729>
 2025-02-26 01:38:55 +00:00
Rebecca Mckeever b85c94fc89 panvk: Allow 3-byte formats 
We are now using the vk_meta buffer <-> image copy helpers, which do
support 3-byte formats.

Fixes: 50679213 ("panvk: Switch to vk_meta")

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33437>
 2025-02-26 01:17:51 +00:00
Simon Ser 26d90674c2 vulkan/wsi/x11: replace dup() with os_dupfd_cloexec() 
dup() will leak the new FD into any child process after fork().

Signed-off-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26203>
 2025-02-26 00:45:51 +00:00
Simon Ser e4ff98bacb libsync: replace dup() with os_dupfd_cloexec() 
dup() will leak the new FD into any child process after fork().

Signed-off-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26203>
 2025-02-26 00:45:51 +00:00
Simon Ser 42509180d4 panvk: replace dup() with os_dupfd_cloexec() 
dup() will leak the new FD into any child process after fork().

Signed-off-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26203>
 2025-02-26 00:45:51 +00:00
Simon Ser 8f9a390f33 venus: replace dup() with os_dupfd_cloexec() 
dup() will leak the new FD into any child process after fork().

Signed-off-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26203>
 2025-02-26 00:45:51 +00:00
Simon Ser d951ca056a lavapipe: replace dup() with os_dupfd_cloexec() 
dup() will leak the new FD into any child process after fork().

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26203>
 2025-02-26 00:45:51 +00:00
Simon Ser 0be6b65f41 iris: replace dup() with os_dupfd_cloexec() 
dup() will leak the new FD into any child process after fork().

Signed-off-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26203>
 2025-02-26 00:45:51 +00:00
Simon Ser bbb3069d05 freedreno: replace dup() with os_dupfd_cloexec() 
dup() will leak the new FD into any child process after fork().

Signed-off-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26203>
 2025-02-26 00:45:51 +00:00
Simon Ser 9859283aa0 pvr: replace dup() with os_dupfd_cloexec() 
dup() will leak the new FD into any child process after fork().

Signed-off-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26203>
 2025-02-26 00:45:51 +00:00
Sagar Ghuge 6f7a76e9d9 intel/compiler: Zero out the header for texel fetch 
It looks like even if we pass the header not present in the sampler descriptor,
it's not helping with the correct behavior of texelFetch.

Experiment on real HW shows that if we just zero out the header and include it
in the message, it helps with the correct behavior. I'm not sure if there is a
valid HW workaround for this one.

We can skip masking the sampler message header bits 4:0 but masking them out
doesn't hurt in this case.

Increasing number of parameter impact sampler performance, For example,
a sample message using 5 parameters will not be able to sustain the same
throughput as a sample message with only 4 valid parameters. We should
look out for any perf impact with respect to texel fetch.

This patch fixes ~3k tests involving texelFetch instruction on Xe3+

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33562>
 2025-02-26 00:23:49 +00:00
Alyssa Rosenzweig c0beb79145 hk: drop silly 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33743>
 2025-02-26 00:03:52 +00:00
Alyssa Rosenzweig c8ee0895e3 asahi: drop silly 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33743>
 2025-02-26 00:03:52 +00:00
Alyssa Rosenzweig 1100c2328a asahi: rename wip modifier 
this is gpu-tiled, not twiddled.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33743>
 2025-02-26 00:03:52 +00:00
Alyssa Rosenzweig 42bc9f6400 ail: split compression up 
this better describes the hw.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33743>
 2025-02-26 00:03:52 +00:00
Alyssa Rosenzweig 99e346ef15 ail: rename twiddled -> gpu tiled 
got the names flipped >_<

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33743>
 2025-02-26 00:03:52 +00:00
Alyssa Rosenzweig 9da6e99b99 docs/asahi: clarify twiddled vs GPU-tiled 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33743>
 2025-02-26 00:03:52 +00:00
Lionel Landwerlin 91f36ba5b6 anv: fix missing 3DSTATE_PS:Kernel0MaximumPolysperThread programming 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 815d2e3e8b ("anv: move 3DSTATE_PS to partial packing")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33712>
 2025-02-25 23:42:01 +00:00
Benjamin Lee 3b5d5c072a panfrost: remove NIR_PASS_V usage for noperspective lowering 
The rest of the NIR_PASS_V usage in panfrost was dropped in
34beb93635, but this one was added in an
MR that was merged after.

Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Fixes: 081438ad39 ("panfrost: add nir pass to lower noperspective varyings")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33728>
 2025-02-25 23:17:43 +00:00
Caio Oliveira a030acd7c3 brw: Reformat brw_gram.y and brw_lex.l 
Change to use Mesa space indentation.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33739>
 2025-02-25 22:57:51 +00:00
Vasily Khoruzhick 2eb34c86f2 lima: ppir: add compactification pass 
If we have a single instruction that uses only combiner unit and previous
instruction doesn't use this unit, two instructions can be safely merged.

Implement compactification pass to do that.

The pass doesn't update instruction dependencies, so it should be run
right before codegen.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33570>
 2025-02-25 21:59:18 +00:00