Karol Herbst
8d7f682bdb
nv50/ir/nir: Fix zero source handling of tex instructions.
...
For TXQ we know make sure that we at least add one source. If the nir
instruction however didn't had any sources, we inserted a fake 0 source
ending up with two 0s for TXQ.
It's unclear to me if we have other ops where this would be necessary.
Fixes: 85a31fa1fc ("nv50/ir/nir: fix txq emission on MS textures")
Signed-off-by: Karol Herbst <git@karolherbst.de >
Acked-by: M Henning <drawoc@darkrefraction.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24373 >
2023-07-29 19:01:40 +00:00
Jordan Justen
5df97c27dc
intel/compiler: Use nir SUBGROUP_INVOCATION for RT TOPOLOGY_ID
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21774 >
2023-07-28 22:54:59 +00:00
Jordan Justen
dbf19b76e8
intel/isl: Use intel_needs_workaround() for MTL CCS WA
...
Also use parent WA number of 14017240301 instead of 14017353530.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22401 >
2023-07-28 15:23:47 -07:00
Eric Engestrom
23b45c5a29
lavapipe/ci: use tighter changes: rules
...
This removes src/{egl,glx,loader,mapi,mesa}/* from the match.
Signed-off-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24372 >
2023-07-28 21:20:38 +00:00
Faith Ekstrand
0831f93e5f
nir/builder: Add a nir_txs_deref() helper
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24375 >
2023-07-28 20:39:07 +00:00
Faith Ekstrand
ee0942f7a6
nir/builder: Allow tex helpers on image types
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24375 >
2023-07-28 20:39:07 +00:00
Connor Abbott
e690d88d69
freedreno/afuc: Initial a7xx support
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949 >
2023-07-28 18:41:58 +00:00
Connor Abbott
6fd0007447
afuc: Fix writing $00
...
This is valid and should do nothing. Don't make the PC overlap $00 in
the reg file, so that we can print out "writes" to $00 but they're still
discarded.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949 >
2023-07-28 18:41:58 +00:00
Connor Abbott
7d7aa2251e
afuc: Add setbit/clrbit
...
First introduced in a660_sqe.fw.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949 >
2023-07-28 18:41:58 +00:00
Connor Abbott
1046ebbb89
afuc: Convert to isaspec
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949 >
2023-07-28 18:41:58 +00:00
Connor Abbott
7376af0eef
afuc: Fix xmov lexer typo
...
This happened to work by luck, but was caught with the isaspec encoding
assertions.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949 >
2023-07-28 18:41:58 +00:00
Connor Abbott
038680c2f6
isaspec: Add initial decoding support
...
This reuses the <map> entries in the <encode> block to go in the reverse
direction and parse an instruction into a machine-readable structure. It
currently assumes that <map> entries are simple l-values like
"src->src[0]" or "src->flag", which is enough for afuc, but the plan for
the future is to use the <decode> block to allow us to override that for
more complex cases.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949 >
2023-07-28 18:41:58 +00:00
Connor Abbott
2faf344f03
isaspec: Rename isa_decode() to isa_disasm()
...
This actually disassembles the binary, and we will add a function that
actually decodes it to the same structure that the encoder uses.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949 >
2023-07-28 18:41:58 +00:00
Connor Abbott
26cce0a133
isaspec: Add callback after decoding an instruction
...
This will be used by afuc for printing register decodings in a comment.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949 >
2023-07-28 18:41:58 +00:00
Connor Abbott
b63782da16
isaspec: Add "custom" field type
...
Add support for a field which is decoded by a user callback. This will
be used for decoding control registers in cread/cwrite by afuc.
In order for this to interact well with the align feature, we need to
pull print() out of the decode implementation so that the callback can
call it and keep track of the line column.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949 >
2023-07-28 18:41:58 +00:00
Connor Abbott
dc874e4654
isaspec: Add support for function and entrypoint labels
...
Functions (i.e. labels reached from call instructions) should be printed
differently from normal labels. In addition we also need to add support
for entrypoints with user-defined names in order to show packet names in
afuc.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949 >
2023-07-28 18:41:58 +00:00
Connor Abbott
569d3ac5a1
isaspec: Add support for "absolute" branches
...
afuc has branches which use an absolute offset in instructions from the
microcode base. Add another type to support them.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949 >
2023-07-28 18:41:57 +00:00
Connor Abbott
86b17d96b3
isaspec: Add "displayname" for altering {NAME} when decoding
...
In afuc, we have the situation where there are a number of ALU
instructions with two (almost) completely different encodings, including
a different opcode location, etc. These need to be different leaf
bitsets with different names for the encoder to work, because otherwise
the encoder has no way of descriminating between them, but when
displaying them we want to use the same name. This adds a small facility
to make the name used for {NAME} when displaying and for the opcode
when encoding different, so that e.g. OPC_ADDI can display as "add"
instead of "addi".
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23949 >
2023-07-28 18:41:57 +00:00
Adam Jackson
c237539d62
egl: Implement EGL_EXT_explicit_device
...
Implement support for EGL_EXT_explicit_device[1].
[1] https://registry.khronos.org/EGL/extensions/EXT/EGL_EXT_explicit_device.txt
Signed-off-by: Adam Jackson <ajax@redhat.com >
Signed-off-by: Robert Foss <rfoss@redhat.com >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23873 >
2023-07-28 18:00:34 +00:00
Roman Stratiienko
41e664f825
egl: android: Remove legacy name-based shared buffers support
...
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3415
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com >
Reviewed-by: Adam Jackson <ajax@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16578 >
2023-07-28 17:09:14 +00:00
José Roberto de Souza
2b7599dc49
intel: Rename intel_gem_add_ext() to intel_i915_gem_add_ext()
...
gem_add_ext() is i915 specific so adding it to the name.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23905 >
2023-07-28 15:36:52 +00:00
José Roberto de Souza
c9950786f6
intel/common: Move functions inside of C++ ifdef
...
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23905 >
2023-07-28 15:36:52 +00:00
José Roberto de Souza
4198a301b3
intel: Move i915_drm.h specific code from common/intel_gem.h to common/i915/intel_gem.h
...
This allow us to remove one more i915_drm.h include from code shared
by both backends.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23905 >
2023-07-28 15:36:52 +00:00
José Roberto de Souza
0579627f21
iris: Replace I915_EXEC_FENCE_SIGNAL by IRIS_BATCH_FENCE_SIGNAL in common code
...
This I915_EXEC_FENCE_SIGNAL was missed in the conversion from i915_drm.h
types to IRIS ones.
Both have the same value, so it was not causing any issues.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23905 >
2023-07-28 15:36:52 +00:00
José Roberto de Souza
1174e7412e
intel/dev: Port intel_dev_info tool to Xe KMD
...
Only hwconfig was calling i915 specifc function, so it was only
necessary split the function that fetches it from backends and call it
from intel_get_and_print_hwconfig_table() depending on the KMD loaded.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23905 >
2023-07-28 15:36:52 +00:00
Illia Polishchuk
56e0aff530
anv, drirc: Add workaround to speed up Cyberpunk 2077 reg allocation
...
Calling the ra_allocate function after each register spill can take
several minutes. This option speeds up shader compilation by spilling
more registers after the ra_allocate failure.Required for
Cyberpunk 2077, which uses a watchdog thread to terminate the process
in case the render thread hasn't responded within 2 minutes.
Execution time of my Cyberpunk2077 shader compilation test:
https://gitlab.freedesktop.org/illia.a.polishchuk/cyberpunk-vulkan-compute-hang-test-anv
Before the patch:
real 1m28,738s
user 1m28,329s
sys 0m0,400s
After the patch
real 0m33,245s
user 32m,835s
sys 0m0,404s
I think it's acceptable patch because Cyberpunk benchmarks has
the same FPS with and without patch. (I started
it without patch with a patched binary with disabled watchdog thread)
Signed-off-by: Illia Polishchuk <illia.a.polishchuk@globallogic.com >
Requires: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24228
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9241
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24299 >
2023-07-28 14:51:42 +00:00
Jason Ekstrand
739e21fa9a
intel/fs: Add a parameter to speed up register spilling
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24299 >
2023-07-28 14:51:42 +00:00
Timur Kristóf
be11fee2a7
aco: Refactor select_program to smaller functions.
...
This prepares for allowing to compile 1 shader at a time
for merged shader stages.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23874 >
2023-07-28 14:27:29 +00:00
José Roberto de Souza
623d704de8
iris/xe: Call iris_lost_context_state() when batch engine is replaced
...
This is necessary to initialize context and mark all the state as
dirty so it is re submitted.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24336 >
2023-07-28 14:04:20 +00:00
Mike Blumenkrantz
e68e612826
nir: add a helper for calculating variable slots
...
this will maybe avoid future bugs, but probably not
Reviewed-by: Connor Abbott <cwabbott0@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24163 >
2023-07-28 13:14:35 +00:00
Mike Blumenkrantz
330f728cc4
lavapipe: use the component offset directly for xfb
...
the mask is only indicative of the components being used, not the offset
from which they start
cc: mesa-stable
Reviewed-by: Connor Abbott <cwabbott0@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24163 >
2023-07-28 13:14:35 +00:00
Mike Blumenkrantz
59396eefe6
nir: fix slot calculations for compact variables with location_frac
...
a variable with a component offset may span multiple slots, and this cannot
be inferred from its type alone (e.g., compacted clip+cull distances)
cc: mesa-stable
Reviewed-by: Connor Abbott <cwabbott0@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24163 >
2023-07-28 13:14:35 +00:00
Eric Engestrom
42021b4d13
bin/ci_run_n_monitor: get git sha from pipeline if specified, instead of requiring --rev to match
...
Fixes: 9ce717ab31 ("ci_run_n_monitor: add ability to specify the pipeline to use, instead of auto-detecting it")
Signed-off-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24366 >
2023-07-28 13:10:41 +00:00
Daniel Stone
f4d24ca414
egl/drm: Assume modern DRI interface versions
...
We know we always have modern versions of DRI_IMAGE and DRI_FLUSH as
we're version-locked to our same Mesa version.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24347 >
2023-07-28 12:25:19 +00:00
Daniel Stone
3d59f4cfcb
egl/drm: Use IMAGE_DRIVER instead of DRI2_LOADER
...
We always have this extension available to us, since we demand matching
Mesa builds, and it's much better. Just use it always when we're not on
swrast.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24347 >
2023-07-28 12:25:19 +00:00
Daniel Stone
0b976bd48d
egl/wayland: Assume modern DRI interface versions
...
We know what version the DRI_IMAGE extension is, and it's higher than 7.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24347 >
2023-07-28 12:25:19 +00:00
Daniel Stone
b3ec7c2a9e
egl/wayland: Never use DRI2_LOADER extension
...
We don't need this anymore; the image loader extension does everything
we want it to and more, and is mandatory when we load.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24347 >
2023-07-28 12:25:19 +00:00
Daniel Stone
45b9b0ba32
egl/wayland: Add image loader extension for swrast
...
It doesn't hurt to have it here, so might as well.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24347 >
2023-07-28 12:25:19 +00:00
Daniel Stone
449e5bad7c
egl/wayland: Always initialise fd_display_gpu
...
Set it to an invalid value, rather than leaving it to be stdout or
something.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24347 >
2023-07-28 12:25:19 +00:00
Daniel Stone
08bfc7395e
egl/dri2: Don't look up image extension twice
...
We already look up the image driver extension inside
dri2_core_extensions, so don't do it again in the optional extensions -
just do it in the swrast path so we have it covered for both.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24347 >
2023-07-28 12:25:19 +00:00
Daniel Stone
00aa095d53
dri: Support 1555/4444 formats
...
Add support for 1555 and 4444 formats, both in RGB/BGR ordering, with
and without alpha.
These are already supported by Gallium and drivers, but not yet for
winsys surfaces. Adding these is enough to make them renderable when
using Weston on iris.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24331 >
2023-07-28 12:44:01 +01:00
Konstantin Seurer
0a07431e9a
llvmpipe: Zero extend vectors in widen_to_simd_width
...
Extending using the first element vould extend the exec_mask (-1, 0, 0,
0) to (-1, 0, 0, 0, -1, -1, -1, -1).
Fixes: 573b8f2 ("gallivm: Implement vulkan textures")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9435
Reviewed-by: Dave Airlie <airlied@redhat.com >
Reviewed-by: Roland Scheidegger <sroland@vmware.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24340 >
2023-07-28 11:05:06 +00:00
Samuel Pitoiset
0d75fc8e42
radv: remove radv_shader_info::tes::num_linked_patch_inputs
...
It's never used.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346 >
2023-07-28 08:21:40 +00:00
Samuel Pitoiset
f04577b789
radv: add support for dynamic TCS vertices out for TES
...
With shader object, if TES is compiled without a TCS, the number of
TCS vertices out might not be known at compile time and it needs to be
loaded from a user SGPR.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346 >
2023-07-28 08:21:40 +00:00
Samuel Pitoiset
faa756b3ba
radv: copy the number of TCS vertices out to TES shader info
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346 >
2023-07-28 08:21:40 +00:00
Samuel Pitoiset
e855c7dd3d
radv: stop checking if patch control points is dynamic everywhere
...
Check that the values are non-zero instead.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346 >
2023-07-28 08:21:40 +00:00
Samuel Pitoiset
a50cec9e18
radv: use a packed user SGPR for the TES state
...
It only contains the number of tessellation patches for now, but it
will be used to pass the number of TCS vertices out for shader object.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346 >
2023-07-28 08:21:40 +00:00
Samuel Pitoiset
7ee74881d9
radv: prevent linking TCS<->TES when TES is NULL
...
This can happen with shader object.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346 >
2023-07-28 08:21:40 +00:00
Samuel Pitoiset
54414a2121
radv: initialize tcs.tes_{patch}_inputs_read to a default value
...
For shader object when a TCS is not linked to a TES at compile time.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346 >
2023-07-28 08:21:40 +00:00
Samuel Pitoiset
afa5b83152
radv: do not always copy the number of tess patches to TES
...
This is only needed when the number of patch control points is known
at compile time. Adding a check makes it less confusing.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346 >
2023-07-28 08:21:40 +00:00