AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
193,707 Commits 1 Branch 0 Tags
8b93d1dbbb64846c19f34a897defc1d0baf1c85b
Commit Graph

179471 Commits

Author SHA1 Message Date
Boris Brezillon 8b93d1dbbb pan/decode: Interpret LOAD_MULTIPLE opcode when decoding a command stream 
This way we can support decoding of descriptors that are passed through
context registers, which we will need for panvk, where the tiler/FB
descriptors come from the VkQueue object, and are passed to command
buffers.

Of course, that means we can only see the latest version of such
indirectly passed data, but that's already the case for most descriptors
that are used several times in a command buffer anyway.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30695>
 2024-08-20 13:20:51 +00:00
Boris Brezillon 9e7091352c pan/decode: Select the right registers when dumping local storage descriptors 
Leads to invalid mappings when the selected register is not matching the
one hardcoded in pandecode_run_idvs().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30695>
 2024-08-20 13:20:51 +00:00
Boris Brezillon 867aa82e6f pan/genxml: Fix Resource descriptor alignment 
The resource table passed to the shaders needs to be aligned on 64-byte.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30695>
 2024-08-20 13:20:51 +00:00
Eric Engestrom aebebe5381 nvk/ci: mark a bunch of tests as fixed 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30741>
 2024-08-20 13:04:30 +00:00
Eric R. Smith 0598fc4419 panfrost: fix crash when disassembling shader for trace 
During disassembly triggered by PAN_MESA_DEBUG=trace,
the upper bits of the blend shader address are set from the passed
in frag_shader. However, this is 0 for some blend shaders. In this case,
skip the blend shader disassembly.

This fixes a failing assert at line 86 of panfrost/lib/genxml/decode.h.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30603>
 2024-08-20 12:41:15 +00:00
Eric R. Smith 1ae8ac35c0 panfrost: split pseudo instructions from Bifrost and Valhall 
Make pseudo instructions for the IR separate from real Bifrost and
Valhall instructions, which are kept in their own ISA.xml files.

Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30179>
 2024-08-20 12:18:19 +00:00
Eric R. Smith 4cd09ce5e8 panfrost: refactor valhall ISA parser 
Make the valhall ISA parser valhall.py have a functional interface
returning a tuple, rather than making users directly access variables
within it.

Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30179>
 2024-08-20 12:18:19 +00:00
Eric R. Smith c7308b19a0 panfrost: Update bifrost_isa.py to handle some Valhall constructs 
Updates the ISA.xml parser to be able to handle some of the constructs
from the Valhall ISA.xml (which differs in significant ways from the
Bifrost ISA.xml). The eventual intent is to avoid duplicating instructions
in the two files, although that isn't enabled in this patch.

The new features aren't used yet, that will be in a future commit.

Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30179>
 2024-08-20 12:18:19 +00:00
Eric R. Smith 470c2637fb panfrost: Make the unit to use for instructions explicit 
We were using the first character of names to indicate the execution unit
('+' for add, '*' for fma). Change the ISA.xml file to have an explicit
`unit` attribute for instructions; this makes the XML more flexible
for future architectures and matches what the valhall ISA.xml does.

Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30179>
 2024-08-20 12:18:19 +00:00
Boris Brezillon f4bd99fb0d panvk: Make sure we emit blend descriptors even if no FS shader is provided 
This way we avoid complaints from pandecode.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30740>
 2024-08-20 13:30:29 +02:00
Mary Guillemard ce8b07d726 panvk/ci: Update G52 fail list to represent current state 
Forgot to remove those two entries when merging previous MR.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: 091df61138 ("panvk: Skip blend descriptors when no fragment shader is present")
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30740>
 2024-08-20 13:29:00 +02:00
Rohan Garg 1f06e70bdc anv: migrate indirect mesh draws to indirect draws on ARL+ 
Backport-to: 24.2
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30690>
 2024-08-20 09:41:51 +00:00
Rohan Garg f69c74b6d5 anv: dispatch indirect draws with a count buffer through the XI hardware on ARL+ 
ARL+ can dispatch indirect draws through the hardware.

Backport-to: 24.2
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30690>
 2024-08-20 09:41:51 +00:00
Rohan Garg 74cd70841d anv: refactor indirect draw support into it's own function 
ARL+ supports some form of indirect draws, instead of trying to mash
support for indirect draws across various generations, let's make things
cleaner by factoring out XI support into it's own function.

Backport-to: 24.2
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30690>
 2024-08-20 09:41:51 +00:00
Rohan Garg c1af71c9c2 anv,iris: prefix the argument format with XI for a upcoming refactor 
Backport-to: 24.2
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30690>
 2024-08-20 09:41:51 +00:00
Rohan Garg dc23db2a0d anv: program a custom byte stride on Xe2 for indirect draws 
Xe2 allows us to program in a custom byte stride for indirect draws

Backport-to: 24.2
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30690>
 2024-08-20 09:41:50 +00:00
Mary Guillemard b6b6296519 bi: Rewrite dead code elimination 
Apply the same optimisation as ACO and AGX.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30484>
 2024-08-20 10:03:30 +02:00
Mary Guillemard 7c694d5342 bi: Add loop_header in bi_block 
Will be used for some DCE changes

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30484>
 2024-08-20 10:03:23 +02:00
Mary Guillemard 71a01e33d4 bi: Use nir_opt_shrink_stores 
This trim vector srcs to the appropriate component count
based on the write mask.

This also should help with image store as the vector srcs
will be trimed according to the format if its known.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30484>
 2024-08-20 10:03:19 +02:00
Mary Guillemard 3904cfabd6 bi: Use nir_opt_load_store_vectorize 
Ensure we vectorize load/store when possible.
Also move lower pack after loop optimization.

This drastically reduce the shader size of
"dEQP-VK.graphicsfuzz.spv-stable-maze-flatten-copy-composite" and allow
it to pass instead of timing out but it might greatly help others.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30484>
 2024-08-20 10:03:06 +02:00
Mary Guillemard 33fef27356 bi: Do not mark tex ops as skip when dest is used by control flow 
Previously, it was possible to have a texture operation marked as SKIP
while one of the dests was in use in conditional control flow.
If an helper thread was to execute that instruction, it would result
in an undefined value being used.

This fix
"dEQP-VK.graphicsfuzz.cov-nested-loops-sample-opposite-corners" where
helper threads would get stuck inside a loop depending on the result of
a TEXS_2D invocation.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30484>
 2024-08-20 10:02:53 +02:00
Mary Guillemard 749287610d bi: Use bi_foreach_src in bi_foreach_ssa_src 
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30484>
 2024-08-20 10:02:49 +02:00
Mary Guillemard 90d6457eba bi: Add bi_foreach_ssa_dest 
Will be used for DCE and helper invocations pass changes.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30484>
 2024-08-20 10:02:45 +02:00
Mary Guillemard 091df61138 panvk: Skip blend descriptors when no fragment shader is present 
Fix "dEQP-VK.pipeline.*.empty_fs.*" tests crashes.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30484>
 2024-08-20 09:53:15 +02:00
Tapani Pälli d4e8c8f874 anv: move setting 3DSTATE_CLIP::MaximumVPIndex from loop 
Loop iterates viewports but for MaximumVPIndex we only need viewport
count and last stage that writes viewport.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30732>
 2024-08-20 06:48:50 +00:00
Louis-Francis Ratté-Boulianne 3967b4bf22 panfrost: add support for ASTC decode mode extension 
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30560>
 2024-08-20 05:36:15 +00:00
Louis-Francis Ratté-Boulianne a4a51f22b1 gallium: add PIPE_CAP_ASTC_DECODE_MODE and expose extension 
mesa will expose GL_EXT_texture_compression_astc_decode_mode
extension if the cap is enabled by the driver.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30560>
 2024-08-20 05:36:15 +00:00
Tapani Pälli 35a6824e88 gbm: depend on libdrm indepedent of dri2 setting 
Suggested-by: @stefan11111
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10585
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30716>
 2024-08-20 04:55:58 +00:00
Valentine Burley 679477d83b freedreno/ci: Re-enable Adreno 630 for Vulkan nightly jobs 
Currently these jobs take just over 2 hours, so they can be re-enabled for nightly
and manual jobs.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30708>
 2024-08-20 01:55:05 +00:00
Valentine Burley f98e91f9b3 freedreno/ci: Move and document last remaining failures 
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30708>
 2024-08-20 01:55:05 +00:00
Valentine Burley 0a15493429 freedreno/ci: Skip tests that might time out during pre-merge jobs 
These tests that may hit the 60s timeout in pre-merge jobs. They pass during full runs
with longer timeouts, so only skip them here.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30708>
 2024-08-20 01:55:05 +00:00
Valentine Burley 81c2581e4a freedreno/ci: Update expectations 
These failures were previously fixed, but this was missed due to fractional runs.
The skips are no longer necessary either.
Add some flakes seen in various pipelines.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30708>
 2024-08-20 01:55:05 +00:00
Valentine Burley c73b22d4c5 ci: Backport two fixes tor the Vulkan CTS 
These fix a good chunk of the failures on Turnip.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30708>
 2024-08-20 01:55:05 +00:00
David Heidelberg 6d85cd6a3b freedreno: Implement get_compute_state_info for Adreno 6xx/7xx 
Preparation for OpenCL (rusticl) support.

Based on freedreno/a6xx: implement get_compute_state_info from
Dmitry Baryshkov, but uses max_waves to determine the sizes.

Reviewed-by: Rob Clark <robclark@freedesktop.org>
Co-authored-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30616>
 2024-08-20 01:30:30 +00:00
Jianxun Zhang 72925f59e6 Revert "iris: Disable PAT-based compression on depth surfaces (xe2)" 
This reverts commit b6f9702cf1.

With the progress on Xe2 platforms, we are not seeing many issues
caused by compression on depth buffers.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11361

Backport-to: 24.2
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30653>
 2024-08-19 17:53:10 -07:00
Jianxun Zhang 8c623b6a7e Revert "anv: Disable PAT-based compression on depth images (xe2)" 
This reverts commit 6073f091bb.

With the progress on Xe2 platforms, we are not seeing many issues
caused by compression on depth buffers.

Backport-to: 24.2
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30653>
 2024-08-19 17:50:10 -07:00
Timothy Arceri d681cf96fb nir/glsl: set deref cast mode during function inlining 
See code comment for details.

Issue: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11535
Fixes: c6c150b4cd ("glsl_to_nir: support conversion of opaque function params")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30338>
 2024-08-19 23:54:49 +00:00
Samuel Pitoiset aad503ecfa aco: fix bogus assert in RT prolog on GFX11+ 
in_scratch_offset isn't defined on GFX11+ and only useful on < GFX9.

Fixes: bd525f4282 ("aco: Fix 1D->2D dispatch conversion on <gfx9")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30717>
 2024-08-19 21:07:31 +00:00
José Roberto de Souza 48e46c71c0 iris/gfx20: Enable depth buffer write through for multi sampled images 
BSpec: 56419
Backport-to: 24.2
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29615>
 2024-08-19 20:04:36 +00:00
Nanley Chery b78273c66c iris: Add and use want_hiz_wt_for_res 
Backport-to: 24.2
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29615>
 2024-08-19 20:04:36 +00:00
José Roberto de Souza 12656571fd anv/gfx20: Enable depth buffer write through for multi sampled images 
BSpec: 56419
Backport-to: 24.2
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29615>
 2024-08-19 20:04:36 +00:00
Nanley Chery ebe3eabda6 anv: Add want_hiz_wt_for_image() 
Backport-to: 24.2
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29615>
 2024-08-19 20:04:36 +00:00
José Roberto de Souza 2553878fba intel/isl/gfx20: Alow hierarchial depth buffer write through for multi sampled surfaces 
BSpec: 56419
Backport-to: 24.2
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29615>
 2024-08-19 20:04:36 +00:00
Mike Blumenkrantz 7930fe5f01 glx: unify dri screen init 
lot of duplication

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
 2024-08-19 17:43:59 +00:00
Mike Blumenkrantz 520572eb25 glx: inline __GLXDRIscreen onto base glx_screen 
this is much less awkward

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
 2024-08-19 17:43:59 +00:00
Mike Blumenkrantz 2c50ee4398 glx: determine is_direct_capable from driver type 
indirect contexts have no driver type

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
 2024-08-19 17:43:59 +00:00
Mike Blumenkrantz 912090fa96 glx: unify more extension setup 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
 2024-08-19 17:43:59 +00:00
Mike Blumenkrantz 0af723ea44 glx/dri3: delete driScreenRenderGPU 
this is redundant

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
 2024-08-19 17:43:59 +00:00
Mike Blumenkrantz 407a9094f7 glx: move base screen destroy to glx_screen_cleanup 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
 2024-08-19 17:43:59 +00:00
Mike Blumenkrantz b89cf3bbaa glx: rework screen destroy 
all the destroy functions call free, but also the caller function calls
free anyway, so just change destroy -> deinit and let there be one free
call

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30619>
 2024-08-19 17:43:59 +00:00