AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
124,566 Commits 1 Branch 0 Tags
8a4efe2d730cc61d42eefffd01ee0ae4f853ec0c
Commit Graph

114945 Commits

Author SHA1 Message Date
Alyssa Rosenzweig
8a4efe2d73 pan/bi: Pack second argument of F32_TO_F16 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5307>
 2020-06-03 17:35:10 +00:00
Alyssa Rosenzweig
323eecaf13 pan/bi: Fix SEL.16 swizzle 
2 scalar arguments, not 1 vector.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5307>
 2020-06-03 17:35:10 +00:00
Alyssa Rosenzweig
9ed1ae4724 pan/bi: Handle SEL with vec3 16-bit 
Otherwise we end up with a missing argument.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5307>
 2020-06-03 17:35:10 +00:00
Alyssa Rosenzweig
afc18c62d7 panfrost: Passthrough NATIVE loads/stores 
Now that we handle load_output directly, this works for e.g. RGB565 on
Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
 2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
36af05bbde pan/mdg: Handle regular nir_intrinsic_load_output 
Instead of the vendored version. Only for blend shaders at the moment,
frag shaders fb_fetch has a lot more going on.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
 2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
293d37e19d pan/mdg: Allow f2u8 and friends thru 
Now that we can handle destination sizes directly, this keeps us from
needing to chew through so many conversions.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
 2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
0ae0141f5b pan/mdg: Handle f2u8 
This is similar to f2u16.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
 2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
f8b881f161 pan/mdg: Fold roundmode into applicable instructions 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
 2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
93513cd9ff pan/mdg: Implement *_rtz conversions with roundmode 
Use rte as the canonical type.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
 2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
6290e83190 pan/mdg: Lower roundmodes 
So now we can use the IR field semantically.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
 2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
1bef784867 pan/mdg: Add opcode roundmode property 
When the output is rounded in a specified direction.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
 2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
2eb4c85e42 pan/mdg: Add roundmode enum 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
 2020-06-03 15:36:57 +00:00
Alyssa Rosenzweig
014d2e46a7 pan/mdg: Distinguish blend shaders in internal shader-db 
Since these shaders are purely internal, the optimization criteria are a
bit different, so it's worth calling attention to this when dumping.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5285>
 2020-06-03 15:36:57 +00:00
Icecream95
99446c9f7d panfrost: Only use AFBC YTR with RGB and RGBA 
The "lossless colorspace transform" is lossy for R and RG formats.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5293>
 2020-06-03 15:19:43 +00:00
Icecream95
9ac106defe panfrost: Decode AFBC flag bits 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5293>
 2020-06-03 15:19:43 +00:00
Timothy Arceri
a34cc97ca3 glsl: when NIR linker enable use it to resize uniform arrays 
Here we turn on uniform array resizing in the NIR linker and disable
the GLSL IR resizing pass when the NIR linker is enabled.

This will potentially make uniform arrays smaller due to NIR
optimising away more uniform uses.

Shader-db results (SKL):

total instructions in shared programs: 14947192 -> 14944093 (-0.02%)
instructions in affected programs: 138088 -> 134989 (-2.24%)
helped: 822
HURT: 4

total cycles in shared programs: 324868402 -> 324794597 (-0.02%)
cycles in affected programs: 3904170 -> 3830365 (-1.89%)
helped: 2333
HURT: 1485

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4910>
 2020-06-03 10:34:22 +00:00
Timothy Arceri
7d1eadb790 glsl: gather uniform dereference info before main linking loop 
We want to gather information for all stages here before the main
linking loop. In the following patch we will use to information
to reduce the size of uniform arrays where possible.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4910>
 2020-06-03 10:34:22 +00:00
Timothy Arceri
a13d8d48ce glsl: add update_array_sizes() helper to the NIR uniform linker 
This will be used to reduce the size of uniform arrays and replace
the current glsl ir pass. Doing this in NIR allows us to better
optimise the size of uniform arrays.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4910>
 2020-06-03 10:34:22 +00:00
Timothy Arceri
6aea287b0a glsl: add struct to gather more info about uniform array access 
This will be used in the following patches to allow the linker
to resize uniform arrays based on array dereferences.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4910>
 2020-06-03 10:34:22 +00:00
Timothy Arceri
d6d78f9b7f util: add BITSET_LAST_BIT() helper 
This is the reverse of BITSET_FFS()

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4910>
 2020-06-03 10:34:22 +00:00
Timothy Arceri
f518508a81 i965: call brw_nir_lower_uniforms() after uniform linking is complete 
i965 currently uses the NIR uniform linker for spirv support. Until
now the only reason there has been no issue with calling the
lowering pass before the linker is because no garbage collection
is done between the calls.

An upcoming change to the linker will add an optimisation to resize
unform arrays where possible. Because lowering causes the array
defs to no longer be used the new optimisation ends up resizing the
arrays to 0. To fix this we move the lowering call after the
linking calls.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4910>
 2020-06-03 10:34:22 +00:00
Simon Ser
907bacea13 gbm: document that gbm_bo_map exposes a linear view 
Drivers (Gallium, i965) expose a linear view of the buffer via
gbm_bo_map.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Daniel Stone <daniel@fooishbar.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5238>
 2020-06-03 10:09:52 +00:00
Danylo Piliaiev
9f3956fea0 glsl: Don't replace lrp pattern with lrp if arguments are not floats 
We don't have "lrp(int, int, int)" and validation of ir_triop_lrp
fails down the road.

Fixes: 8d37e991
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3059
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Witold Baryluk <witold.baryluk@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5257>
 2020-06-03 09:06:25 +00:00
Boris Brezillon
3ed2123d77 spirv: Use scoped barriers for SpvOpControlBarrier 
If use_scoped_barrier is set to true, we don't have to split the control
and memory barriers.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4900>
 2020-06-03 07:39:52 +00:00
Boris Brezillon
689acc7398 intel/compiler: Extract control barriers from scoped barriers 
Add a lowering pass extracting all control barriers embedded in scoped
barriers into proper control barriers so we can get rid of the logic
inserting control barriers when an SpvOpControlBarrier with WorkGroup
scope is parsed in spirv_to_nir().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4900>
 2020-06-03 07:39:52 +00:00
Boris Brezillon
345b5847b4 nir: Replace the scoped_memory barrier by a scoped_barrier 
SPIRV OpControlBarrier can have both a memory and a control barrier
which some hardware can handle with a single instruction. Let's
turn the scoped_memory_barrier into a scoped barrier which can embed
both barrier types. Note that control-only or memory-only barriers can
be supported through this new intrinsic by passing NIR_SCOPE_NONE to the
unused barrier type.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Suggested-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4900>
 2020-06-03 07:39:52 +00:00
Boris Brezillon
94438a64bf spirv: Split the vtn_emit_scoped_memory_barrier() logic 
We are about to add support for scoped control+memory barriers. Let's
move the convert from SPIRV to NIR enums logic in helpers so we can
easily re-use them.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4900>
 2020-06-03 07:39:52 +00:00
Samuel Pitoiset
d3c937c0e4 radv: enable zero VRAM for all VKD3D (DX12->VK) games 
To fix rendering issues with Metro Exodus, RE2 and 3 and probably
more titles. It seems the default behaviour of DX12 anyways.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3064
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5262>
 2020-06-03 08:00:19 +02:00
Samuel Pitoiset
fd5ffd3a83 radv: enable zero VRAM for Doom Eternal 
That fixes some rendering issues. Probably some unitialized data
from the game.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3064
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5262>
 2020-06-03 07:59:57 +02:00
Timothy Arceri
7873276f68 glsl/spirv: remove dead uniforms in spirv nir linker 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4797>
 2020-06-03 02:22:23 +00:00
Timothy Arceri
a494b62410 glsl: remove dead uniforms in the nir linker 
This is now possible as we do uniform linking via a nir based linker.

Shader-db results for IRIS (SKL):

total instructions in shared programs: 14947192 -> 14946397 (<.01%)
instructions in affected programs: 39498 -> 38703 (-2.01%)
helped: 230
HURT: 18

total cycles in shared programs: 324868402 -> 324847058 (<.01%)
cycles in affected programs: 706701 -> 685357 (-3.02%)
helped: 599
HURT: 449

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4797>
 2020-06-03 02:22:23 +00:00
Timothy Arceri
60bee4c70c glsl: add can_remove_uniform() helper to the NIR linker 
This helper reflects the rules we follow in the GLSL IR linker when
deciding if we can remove a dead uniform. This check is required to
avoid regressions when turning on NIR dead uniform clean up in the
following patch.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4797>
 2020-06-03 02:22:23 +00:00
Timothy Arceri
04dbf709ed nir: add callback to nir_remove_dead_variables() 
This allows us to do API specific checks before removing variable
without filling nir_remove_dead_variables() with API specific code.

In the following patches we will use this to support the removal
of dead uniforms in GLSL.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4797>
 2020-06-03 02:22:23 +00:00
Timothy Arceri
bc79442f3f nir: add glsl_get_ifc_packing() helper 
This will be used in the following patch.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4797>
 2020-06-03 02:22:23 +00:00
Alyssa Rosenzweig
7ac617c117 pan/mdg: Don't double-replicate blend on T720 
We already do this unconditionally in NIR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5305>
 2020-06-03 00:32:24 +00:00
Bas Nieuwenhuizen
edd56bad94 radv: Use common gfx10_format_table.h 
Save some python code and build time, as well as some code duplication.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291>
 2020-06-03 00:17:00 +00:00
Bas Nieuwenhuizen
560f095dd5 radv: Include gfx10_format_table.h only from a single source file. 
The radeonsi variant has everything in the header, so lets not
include it everywhere.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291>
 2020-06-03 00:17:00 +00:00
Bas Nieuwenhuizen
b351a50763 radeonsi: Define gfx10_format in the common header. 
So we don't have to have multiple definitions of the struct when
sharing with radv.

While at it put the table properly in a C file so we don't have to
deal with multiple definitions, and the struct definition isn't
in generated source.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291>
 2020-06-03 00:17:00 +00:00
Bas Nieuwenhuizen
c98e52f88a amd/common,radeonsi: Move gfx10_format_table to common. 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291>
 2020-06-03 00:17:00 +00:00
Bas Nieuwenhuizen
d936f69677 radeonsi: Explicitly map Z16_UNORM_S8_UINT to None for GFX10. 
We should always use separate planes for textures with this format.

Fixes: 273ead81f1 "util/format: Add VK_FORMAT_D16_UNORM_S8_UINT."
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291>
 2020-06-03 00:17:00 +00:00
Erik Faye-Lund
a21966837a zink: Use store_dest_raw instead of storing an uint 
I cleaned up the other similar call-sites, but somehow missed this one.
There's nothing different with this, so let's also fix this.

Fixes: 16339646f0 ("zink/spirv: rename functions a bit")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5250>
 2020-06-02 21:45:30 +00:00
Oschowa
c310677a75 radv: Explicitly cast TIMESTAMP_NOT_READY value to uin32_t where needed. 
Fixes a clang warning.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5228>
 2020-06-02 21:31:17 +00:00
Oschowa
663e8cb4e6 aco: Use correct reference type in for-range-loop. 
Fixes a clang warning.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5228>
 2020-06-02 21:31:17 +00:00
Oschowa
7b1bc460fd aco: Don't std::move temporary object. 
Fixes the following clang warning:

mesa/src/amd/compiler/aco_optimizer.cpp:2928:15: warning: moving a temporary object prevents copy elision [-Wpessimizing-move]
   ctx.uses = std::move(dead_code_analysis(program));

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5228>
 2020-06-02 21:31:17 +00:00
Oschowa
536339b0dd aco: Don't declare 'Block' as class, but define as struct. 
Fixes clang warnings.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5228>
 2020-06-02 21:31:17 +00:00
Oschowa
c2a778ef0f radv: Don't take absolute value of unsigned type. 
Fixes clang warnings.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5228>
 2020-06-02 21:31:17 +00:00
Timur Kristóf
7d2fe60f1c radv/aco: Always enable subgroup shuffle. 
It is now supported by both backends on all hw.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5223>
 2020-06-02 21:12:13 +00:00
Timur Kristóf
045c9ffa7d aco: Implement subgroup shuffle on GFX6-7. 
GFX6 and GFX7 don't have the ds_bpermute (or permute) instruction,
but we would like to support subgroup shuffle on these old GPUs.

So we introduce a new pseudio instruction which will be lowered
to an "unrolled loop" that emulates bpermute on GFX6 and GFX7
using readlane instructions, while also respecting the exec mask
thanks to v_cmpx.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5223>
 2020-06-02 21:12:12 +00:00
Timur Kristóf
14a5021aff aco/gfx10: Refactor of GFX10 wave64 bpermute. 
The emulated GFX10 wave64 bpermute no longer needs a linear_vgpr,
so we don't consider it a reduction anymore. Additionally, the
code is slightly reorganized in preparation for the GFX6 emulated
bpermute.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5223>
 2020-06-02 21:12:12 +00:00
Marek Olšák
fe3947632c radeonsi: add a hack to disable TRUNC_COORD for shadow samplers 
This fixes dEQP-GLES3.functional.shaders.texture_functions.textureprojlodoffset.sampler2dshadow_vertex.

This is probably a dEQP bug.

Fixes: d573d1d825

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5209>
 2020-06-02 20:47:49 +00:00