86aa241c66
brw: Rename brw_nir_trig build target to brw_nir_workarounds
...
Matches the recent file rename.
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755 >
2025-10-09 07:01:46 +00:00
b15b83f43f
brw: Drop ir_expression_operation_h from build system
...
This is from the pre-NIR era where we used GLSL IR expression opcodes
directly. We haven't done that in years.
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755 >
2025-10-09 07:01:46 +00:00
a7c2b87874
intel: Move intel_shader_reloc to common code and drop elk_shader_reloc
...
We want to be able to emit load_reloc_const_intel intrinsics from common
NIR passes (such as printf lowering). In order to do that, we need to
have the enum with the meaning of values in common code. Once you have
that, it's easy to see the (identical) data structures as a way for the
driver to communicate about relocations, rather than a compiler backend
specific thing. So we move it all up to common code, and re-unify.
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755 >
2025-10-09 07:01:46 +00:00
116c65cd3d
brw: Rename brw_shader_reloc to intel_shader_reloc
...
In preparation for moving out of brw to common code.
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755 >
2025-10-09 07:01:46 +00:00
b458140b75
elk: Delete ELK_SHADER_RELOC_DESCRIPTORS_ADDR_HIGH
...
This is leftover brw code that nobody uses.
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755 >
2025-10-09 07:01:46 +00:00
f448ad3adf
freedreno/layout: gen8 descriptor support
...
Add support to build gen8 descriptors. The parameters/logic is largely
the same as a6xx/a7xx, but the layout is reshuffled.
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:32 +00:00
ed6f0b982b
freedreno/layout: Convert fd6_view to c++
...
The descriptor format changes for gen8, so we'll want a template param
to control which descriptors we build.
This also lets us drop the chip arg from fdl_view_args.
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:32 +00:00
344486d583
freedreno/a6xx: Slight re-org of sampler descriptor building
...
A bit of re-org to make it easier to slot in the gen8 case.
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:32 +00:00
6195826826
freedreno/registers: pm4 updates for gen8
...
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:32 +00:00
8a68c6684b
freedreno/registers: Add gen8 descriptor layout
...
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:32 +00:00
1d2895b232
freedreno/registers: Add gen8 regs
...
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:32 +00:00
8edd6eb42e
freedreno/registers: Common-ize PIPE definitions
...
PIPE enum definitions are backward compatible. So move its definition
to adreno_common.xml.
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com >
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:31 +00:00
6959bd9f54
freedreno/decode: Move enum lookup out of snapshot
...
Some of these enums change between gens, which will be easier to deal
with if we move them out of the snapshot serialization helpers.
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:31 +00:00
d7db333b0e
freedreno/decode: Add gen8 support
...
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:31 +00:00
c1d1ba613b
freedreno/registers: Extract out bitset for roq_avail
...
De-duplication.
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:31 +00:00
99b3283a5a
freedreno/registers: Fix a couple reg names
...
Fix typo in reg names.
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:31 +00:00
ed2e8d57e9
freedreno/registers: x_ADDR_MODE_CNTL is a6xx and earlier
...
a5xx and a6xx could operate in either 32b or 64b mode (the former
untested upstream). It appears that a7xx and later drop this back-
wards compat.
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:31 +00:00
30e32c9c78
freedreno/registers: Rename some unknowns
...
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:31 +00:00
50ab38092f
freedreno/registers: More register prep
...
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:31 +00:00
67caa784cd
freedreno/afuc: Add missing varset check
...
Make sure afuc properly handles register variants.
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:30 +00:00
f7ce548d78
freedreno/decode/crashdec: Limit snapshot BO size
...
Internal tooling has a 100MB limit. But ascii85 can do a good job of
compressing BOs that have lots of zero's, so the resulting snapshot file
can be much bigger than the devcoredump. Avoid this by skipping BOs
that are large enough to probably not be cs/shader/descriptor.
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:30 +00:00
1a8a16f99d
freedreno/a6xx: Move reg to static-non-context
...
RB_UNKNOWN_8E09 is a non-context reg, we just need to set it and forget
it, so move it to static-regs.
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:30 +00:00
cb86341829
meson: remove '--outdir' argument in script
...
Usage of '--outdir' argument in python scripts makes it very
complicated for tools like ninja-to-soong to generate the Android
equivalent build file.
This is because the option is less clear on what will be generated.
Instead, change it for '--out' where we give the full path of the file
to generate. This has the good point of deduplicating the locations of
the file name to have it only in 'meson.build'.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37741 >
2025-10-08 20:51:20 +00:00
acf953757e
brw: prevent LOAD_REG modifications on MOV_INDIRECT/BROADCAST
...
Due to those opcode reading variable amount of data in src0, it's not
possible to easily figure out what builder SIMD size should be used to
produce the LOAD_REG replacement.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 2d13acf9d993996c07e2https://gitlab.freedesktop.org/mesa/mesa/-/issues/14054
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37756 >
2025-10-08 20:17:22 +00:00
a21b925caa
anv: Rename anv_shader_bin to anv_shader_internal
...
It is now only used by internal shaders to the rename make it more clear.
Suggested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37749 >
2025-10-08 19:58:30 +00:00
5c8d7c30f5
anv: Simply anv_shader_set_relocs() parameters
...
Now that we only have one caller for anv_shader_set_relocs() we can simply most
of parameter by struct anv_shader.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37749 >
2025-10-08 19:58:29 +00:00
d5b8c7c17e
anv: Drop shader relocs from anv_shader_bin_create()
...
Acording to Lionel anv_shader_bin_create() is only used now for internal shaders
and those don't use relocs so we can drop this lines.
Suggested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37749 >
2025-10-08 19:58:29 +00:00
62a746b353
anv: Replace duplicated code set shader relocs by a function
...
This code was duplicated and with a assert mistake in one of the copies, so
here moving it to function and calling it from both places.
Also I have removed anv_shader_bin_rewrite_embedded_samplers() as it is already
being done in anv_shader_set_relocs().
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37749 >
2025-10-08 19:58:28 +00:00
16458f756e
ci/panfrost: udpate panfrost-g610-fails to reflect latest stats
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37776 >
2025-10-08 19:29:29 +00:00
aeec53f020
radv,radeonsi: use new ac_cmdbuf macros
...
But keep them behind existing macros for consistency until all macros
are moved to common code.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36292 >
2025-10-08 18:00:15 +00:00
902f5a8618
radv: replace radeon_cmdbuf by ac_cmdbuf completely
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36292 >
2025-10-08 18:00:15 +00:00
377f50129b
radeonsi: replace radeon_cmdbuf_chunk by ac_cmdbuf
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36292 >
2025-10-08 18:00:14 +00:00
9ff4750eaf
ac/cmdbuf: introduce ac_cmdbuf
...
This will be shared by both drivers.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36292 >
2025-10-08 18:00:14 +00:00
a7ae26c96c
ac/sqtt: use void pointers for start/stop CS
...
Similar to BOs which are different structs between drivers.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36292 >
2025-10-08 18:00:14 +00:00
12cccb2f75
radv: remove useless radeon_cmdbuf forwarded declaration
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36292 >
2025-10-08 18:00:13 +00:00
379617b77d
anv: Define bt_block only in the block that uses it in anv_cmd_buffer_alloc_binding_table()
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669 >
2025-10-08 17:26:42 +00:00
d728c97022
anv: Add comment to anv_state->offset
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669 >
2025-10-08 17:26:42 +00:00
a90d8fc08e
anv/allocator: Subtract start_offset in chunk_offset
...
anv_state::offset in the context of anv_state_pool is equal to the offset from
the begining of block_pool + start_offset.
Like it is set in anv_state_pool_alloc_no_vg() in the path that allocs a new
block in anv_block_pool.
As anv_state_pool_return_chunk() expects only the offset from the begining of
anv_block_pool so here subtracting to make the path that grabs a larger chunk of
memory of the pool and split into smaler chunks to properly work.
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669 >
2025-10-08 17:26:42 +00:00
4ca18c09c1
anv/allocator: Don't call anv_block_pool_map() with an offset that includes start_offset
...
Only 3 pools sets a value different than zero to start_offset so that might be
a issue that was being hidden by luck.
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669 >
2025-10-08 17:26:42 +00:00
ad62911683
anv/allocator: Change some parameters and variables from 32bit to 64bits
...
struct anv_state::offset and struct anv_block_pool::max_size are 64bits so these
parameters should also be 64bit or risk overflow.
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669 >
2025-10-08 17:26:41 +00:00
27074cb48b
anv/allocator: Drop uncessary function
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669 >
2025-10-08 17:26:41 +00:00
4aee4f0975
anv/allocator: Move definition of ANV_FREE_LIST_EMPTY to anv_allocator
...
While at it also renaming EMPTY to ANV_FREE_LIST_EMPTY_VAL to be more explicit.
No changes in behavior expected here.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37669 >
2025-10-08 17:26:41 +00:00
950459d95f
mesa: copy NumSamples in reuse_framebuffer_texture_attachment
...
this otherwise breaks msrtt
cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37766 >
2025-10-08 16:58:52 +00:00
8f0ac427b3
glsl: fix gl_ViewID_OVR type to uint
...
the spec defines this as a uint, and having it as an int breaks anyone
trying to actually use it
cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37766 >
2025-10-08 16:58:52 +00:00
390b5e6150
iris: Fix potential null deref in debug archiver
...
We currently pass the NIR field directly from the iris_uncompiled_shader
struct, which works in most cases, however, in the caes where we create
a passthrough TSC shader, the uncompiled shader is nullptr, which would
create a null dereference. Instead, pass the NIR shader directly to the
function, so we can pass the passthrough shader.
CID: 1666496
Fixes: dedbe0e826paulo.r.zanoni@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37751 >
2025-10-08 16:39:45 +00:00
bb5eb9a096
intel/ds: disable draw/blorp tracepoints by default on android
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Tim Van Patten <timvp@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37740 >
2025-10-08 16:00:50 +00:00
c4061b96f0
intel/ds: lump all the draw under the same toggle
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Tim Van Patten <timvp@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37740 >
2025-10-08 16:00:50 +00:00
3df4d86409
u_trace: use os_get_option instead of getenv
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Tim Van Patten <timvp@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37740 >
2025-10-08 16:00:49 +00:00
05cd676287
gfxstream: delete magma-over-gfxstream
...
This was always meant to a be transitional approach.
Reviewed-by: Aaron Ruby <aruby@qnx.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37728 >
2025-10-08 15:42:13 +00:00
5080f2b6f5
zink: disable msrtss handling when blitting
...
this avoids weirdness when e.g., flushing clears
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37767 >
2025-10-08 10:16:37 -04:00
Kenneth Graunke