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Author SHA1 Message Date
Kenneth Graunke
868377e4c7 brw: Delete program_string_id from brw program keys 
This is strictly a GL thing.  iris can manage it in its own program keys
without polluting the compiler with stuff nobody else cares about.

We can also drop a lot of padding that was introduced in commit
a18835a9ca which doesn't appear to be
necessary.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38556>
 2025-11-20 14:10:38 -08:00
Kenneth Graunke
fbd9bf6aeb iris: Use iris_any_prog_key, not brw_any_prog_key 
We're storing iris keys here, not brw keys.  This worked because brw
keys are larger so you could fit any iris key in the memory.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38556>
 2025-11-20 14:10:34 -08:00
Matt Turner
ad14942300 meson: Fix sysprof-capture-4 dependency 
The versioning scheme changed in v45.0 (the previous version was
3.48.0). As such, this version check would wrongly accept e.g. 48.0.

Fixes: e9341568fa ("meson: require sysprof-capture-4 >= 4.49.0")
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38557>
 2025-11-20 20:53:36 +00:00
Yurii Kolesnykov
8cc06191a8 apple_cgl.c: Fix error: call to undeclared function 'os_get_option' 
Signed-off-by: Yurii Kolesnykov <root@yurikoles.com>
Fixes: 222b85328e ("mesa: replace most occurrences of getenv() with os_get_option()")
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38429>
 2025-11-20 18:39:19 +00:00
Yurii Kolesnykov
4913177b14 loader: Wrap nouveau_zink_predicate with HAVE_LIBDRM 
Signed-off-by: Yurii Kolesnykov <root@yurikoles.com>
Fixes: 265afd9bfd ("loader: Don't fall back to nouveau GL without zink")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14290
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38429>
 2025-11-20 18:39:19 +00:00
Marek Olšák
d7f03c649e nir/lower_io_passes: only sort variables for nir_lower_io_vars_to_temporaries 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38470>
 2025-11-20 12:17:31 -05:00
Marek Olšák
02148dc6bc nir/lower_io_passes: fold bool lower_indirect_inputs 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38470>
 2025-11-20 12:17:30 -05:00
Marek Olšák
9b4fc64324 nir/lower_io_passes: simplify conditions for when to lower IO to temps 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38470>
 2025-11-20 12:17:28 -05:00
Marek Olšák
edfa3fdfbc nir/lower_io_passes: lower indirect TCS outputs sooner and clarify the behavior 
We don't have to enter the lower-IO-to-temps block for TCS at all.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38470>
 2025-11-20 12:17:26 -05:00
Anna Maniscalco
3e01031f10 radv: consistently use the value in bytes for esgs_itemsize 
Previosuly this value was in bytes for vs/tes and in dwords for gs.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38514>
 2025-11-20 16:45:37 +00:00
Anna Maniscalco
5e8885a339 radv: recalculate legacy_gs_info on bind 
Previously legacy_gs_info calculated based on
gs_info->legacy_gs_info.esgs_itemsize which is calculated based on gs
input varyings.

However, when using ESO vs/tes can have outputs not read by gs, which
leads to underestimating LDS usage.

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38514>
 2025-11-20 16:45:37 +00:00
Karmjit Mahil
36f6cf8a35 freedreno/registers: Clarify bit 64B of CP_REG_TO_MEM 
One might think that the `64B` bit might be affecting just the
memory size, but that's not the case as it affects the register
count too. Setting `64B` with `CNT` of `1` actually copies 2
registers, and not 1.

Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38535>
 2025-11-20 16:20:43 +00:00
Samuel Pitoiset
9c34567a4a vulkan: stop excluding Shader64BitIndexingEXT SPIR-V cap 
The SPIRV spec has been fixed since
3853dc11e5 ("spirv: Update the JSON and headers").

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38543>
 2025-11-20 15:44:04 +00:00
José Roberto de Souza
334ffcda14 iris: Release global_bufmgr_list_mutex on missing error paths 
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: stable
Reported-by: Taketo Kabe
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13692
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38537>
 2025-11-20 14:24:25 +00:00
Karmjit Mahil
bfdccc7563 freedreno/registers: Mark functions as constexpr where possible 
This makes it possible for these to be used in static_asserts or if
we want to get a register offset (gen agnostic) and have it be
marked as constexpr. E.g.
```
constexpr uint32_t src_reg = __TPL1_A2D_SRC_TEXTURE_BASE<CHIP>({}).reg;
```

Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38549>
 2025-11-20 13:56:18 +00:00
Rob Clark
a9c64b737d freedreno: Collapse A6XXProps/A7XXProps 
Now that they are the same thing, simplify the py code a bit.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38515>
 2025-11-20 13:16:11 +00:00
Rob Clark
1574ddffb7 freedreno: Move magic/magic_raw out of props 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38515>
 2025-11-20 13:16:11 +00:00
Rob Clark
43dd11ca6a freedreno: Flatten fd_dev_info props 
Attempting to separate things out by gen is a bit arbitrary.  And gets
increasingly awkward as we introduce gen8 support, which builds on gen7
but changes some a6xx values.

Just move it all into a single 'props' struct.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38515>
 2025-11-20 13:16:10 +00:00
Rob Clark
062e90f19b freedreno: Move RB_CCU_DBG_ECO_CNTL to raw_magic_regs 
This only needs to be programmed by UMD for a7xx.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38515>
 2025-11-20 13:16:09 +00:00
Rob Clark
231ff1c14d freedreno: Move UCHE_UNKNOWN_0E12 to raw_magic_regs 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38515>
 2025-11-20 13:16:08 +00:00
Rob Clark
17a6456b84 freedreno: Move VPC_DBG_ECO_CNTL to raw_magic_regs 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38515>
 2025-11-20 13:16:06 +00:00
Rob Clark
f9d3f6f95c freedreno: Move HLSQ_DBG_ECO_CNTL to raw_magic_regs 
This reg only exists in a6xx.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38515>
 2025-11-20 13:16:05 +00:00
Rob Clark
39cd8d6d24 freedreno: Move SP_DBG_ECO_CNTL to raw_magic_regs 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38515>
 2025-11-20 13:16:03 +00:00
Rob Clark
1c8b9ad594 freedreno: Move PC_MODE_CNTL to raw_magic_regs 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38515>
 2025-11-20 13:16:02 +00:00
Rob Clark
d18d75a236 freedreno: Move UCHE_CLIENT_PF to raw_magic_regs 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38515>
 2025-11-20 13:16:01 +00:00
Rob Clark
bc4bdf58ec freedreno: Move SP_CHICKEN_BITS to raw_magic_regs 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38515>
 2025-11-20 13:15:59 +00:00
Rob Clark
6d13e0a4cc freedreno: Move GRAS_DBG_ECO_CNTL to raw_magic_regs 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38515>
 2025-11-20 13:15:58 +00:00
Rob Clark
8f0c920a52 freedreno: Move TPL1_DBG_ECO_CNTL to raw_magic_regs 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38515>
 2025-11-20 13:15:57 +00:00
Rob Clark
e81defa52d freedreno: Move *_POWER_CNTL to raw_magic_regs 
These two regs only exist in a6xx.  And only need a static value.  So
move them to raw_magic_regs and drop the fd_dev_info field and
corresponding driver code.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38515>
 2025-11-20 13:15:57 +00:00
Michal Krol
31d69602d8 lavapipe: Bump maxGeometryInputComponents to 128. 
D3D11's minimum requirement is 32 GS input registers.

venus: Triage unexpected passes.

Reviewed-by: Brian Paul brian.paul@broadcom.com
Reviewed-by: Roland Scheidegger <roland.scheidegger@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38519>
 2025-11-20 11:16:02 +00:00
Pierre-Eric Pelloux-Prayer
bac9d17ead radeonsi/sqtt: clear out sqtt bo on resize 
If the resizing fails, we shouldn't use the destroyed bo anymore.

Fixes: 5794a86f19 ("radeonsi/sqtt: support sqtt buffer auto-resizing")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38529>
 2025-11-20 10:21:47 +00:00
Pierre-Eric Pelloux-Prayer
9e76f5f2a2 radv: enable global BO list if vm_always_valid is supported 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38529>
 2025-11-20 10:21:47 +00:00
Pierre-Eric Pelloux-Prayer
cf4c55a20f ac/info: get vm_always_valid support through ac_linux_drm 
For virtio it depends on the host support in virglrenderer.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38529>
 2025-11-20 10:21:47 +00:00
Pierre-Eric Pelloux-Prayer
f57993b71d ac/virtio: fix incorrect NULL check 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38529>
 2025-11-20 10:21:47 +00:00
Pierre-Eric Pelloux-Prayer
51365585e2 ac/virtio: remove dead code 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38529>
 2025-11-20 10:21:47 +00:00
Samuel Pitoiset
3889695e9f aco/tests: switch to drm-shim 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38536>
 2025-11-20 09:53:29 +00:00
Samuel Pitoiset
a729b0ebaa meson: require drm-shim for ACO tests 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38536>
 2025-11-20 09:53:29 +00:00
Samuel Pitoiset
b4121a30df amd/drm-shim: export a function that allows to select a different device 
To be used by ACO tests. Need to remove gnu_symbol_visibility for
exporting the symbol.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38536>
 2025-11-20 09:53:29 +00:00
Lionel Landwerlin
07b7de35cc anv: Wa_18040903259 only applies to RCS when in GPGPU mode 
Sadly this probably won't change anything in terms of perf as the CCS
engine has a bunch of other restrictions.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 243c01c703 ("anv/iris: implement Wa_18040903259")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38484>
 2025-11-20 08:17:35 +00:00
Samuel Pitoiset
168a8d0b52 radv: fix RB+ for depth-only with unused attachments 
When there are no color outputs in the rendering state, but color write
enable/write aren't masked out (which seems legal with
VK_EXT_dynamic_rendering_unused_attachments), the driver must emit
CB_DISABLE to disable CB rendering completely.

Otherwise, if there is also a depth/stencil attachment in the rendering
state, CB0 is always set to 32_R for RB+. That means, the pixel shader
would still export fragments but to the previously bound color
attachment.

VKCTS is missing coverage.

Fixes: 4580293ab2 ("radv: implement RB+ depth-only rendering for better perf")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14319
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38509>
 2025-11-20 07:37:17 +00:00
Eric Engestrom
5db246a5ba perfetto: use the new upstream repo 
The old one was abandoned without so much as a README note.

This will also allow using newer releases than 47; the current one being
53, but this MR doesn't address that, as it aims to be a simple no-op
change.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38525>
 2025-11-20 07:07:42 +00:00
Yiwei Zhang
829bd406c0 venus: fix racy semaphore feedback counter update 
Previously, we update the sfb dst slot upon vn_SignalSemaphore so that
vn_GetSemaphoreCounterValue can poll just the feedback slot itself.
However, that can race with pending sfb cmds that are going to update
the slot value, ending up with stuck sync progression.

This change fixes it by disallowing vn_SignalSemaphore to touch the sfb
dst slot. To ensure counter query being monotonic, vn_GetSemaphoreCounterValue
now takes the greater of signaled counter and the sfb counter read.

Test with dEQP-VK.synchronization* group:
- w/o this: stuck shows up within 2 min with 8 parallel deqp runs
- with this: no stuck for multiple full runs of the same

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14304
Fixes: 5c7e60362c ("venus: enable timeline semaphore feedback")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38516>
 2025-11-20 06:29:16 +00:00
Faith Ekstrand
0bd5734349 panvk: Set primitive_index_override when prim ID is written by IDVS 
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38504>
 2025-11-20 06:09:16 +00:00
Faith Ekstrand
333ca9133a pan/genxml: Rename Primitive Index Override 
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38504>
 2025-11-20 06:09:16 +00:00
Faith Ekstrand
652a5f41bf pan/bi: Add support for writing gl_PrimitiveID from IDVS 
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38504>
 2025-11-20 06:09:16 +00:00
Faith Ekstrand
5700c87db6 pan/bi: Add some helpers an an info field for needing the extended FIFO 
The logic here is a bit scattered around and is about to get more
complicated.  This adds a helper which better documents the interactions
as well as an info field to make the driver's life easier.

Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38504>
 2025-11-20 06:09:16 +00:00
Marek Olšák
9e339f4b32 nir: rename nir_lower_indirect_derefs -> nir_lower_indirect_derefs_to_if_else_trees 
This describes better what it does.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38471>
 2025-11-20 05:42:11 +00:00
Marek Olšák
22871fb8bd nir: for nir_shift_channels, fill undefined components with undef instead of .x 
This potentially results in better code because we don't add def uses where
undef is allowed.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38468>
 2025-11-20 04:26:55 +00:00
Marek Olšák
65837d8289 ac,radeonsi: remove gfx11 FW-based MCBP 
It's too slow to be usable. User queues could replace it.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38338>
 2025-11-20 03:31:47 +00:00
Sagar Ghuge
f0aad5bd7e anv: Convert indirect to direct dispatch 
Saves unncessary PC and stall during encode phase.

Thanks to Felix for pointing out that CCS always needs a CS stall once
we add a pipe control, that will kill the performance for BVH
construction.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38513>
 2025-11-20 03:11:55 +00:00