AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
166,006 Commits 1 Branch 0 Tags
853f8eb9300f03e341c97d4938e3f1237b0ea4e9
Commit Graph

166006 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Samuel Pitoiset 853f8eb930 radv: remove redundant zero initialization of pipeline layout 
It's already zeroed in radv_pipeline_layout_init().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21048>
 2023-02-01 23:25:52 +00:00
Samuel Pitoiset 1f67782eb2 radv: optimize radv_pipeline_layout_add_set() slightly 
That value is already computed when a descriptor set layout is created.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21048>
 2023-02-01 23:25:52 +00:00
Yiwei Zhang a73a5915fb venus: log upon device creation 
Log the deviceName and driverInfo gated behind VN_DEBUG=log_ctx_info

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21030>
 2023-02-01 22:04:41 +00:00
Pavel Ondračka 7e6acfd587 nir: mark progress when removing trailing unused load_const channels 
When the unused channels were at the end and so no reswizzling was
needed, we wouldn't correctly mark the progress.

Fixes: 3305c960
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21014>
 2023-02-01 20:33:31 +00:00
Pavel Ondračka fe56dd9c42 nir: mark progress when removing trailing unused alu channels 
When the unused channels were at the end and so no reswizzling was
needed, we wouldn't correctly mark the progress.

Fixes: cb7f2012
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21014>
 2023-02-01 20:33:31 +00:00
Pavel Ondračka ef800da3f7 nir: nir opt_shrink_vectors whitespace fix 
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21014>
 2023-02-01 20:33:31 +00:00
Amber ab4c2990ed intel/compiler: use lower_image_samples_to_one 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewer-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Amber Amber <amber@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20813>
 2023-02-01 19:52:49 +00:00
Amber e8bfb71660 ir3: use lower_image_samples_to_one 
This is necessary to properly support ARB_shader_texture_image_samples
fixes crash in KHR-GL45.shader_texture_image_samples_tests.image_functional_test

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Reviewer-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Amber Amber <amber@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20813>
 2023-02-01 19:52:49 +00:00
Amber c384690ab7 nir: support lowering nir_intrinsic_image_samples to a constant load 
This can be used by multiple drivers that do not support ms images

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Reviewer-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Amber Amber <amber@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20813>
 2023-02-01 19:52:49 +00:00
Konstantin Seurer a568a5492f radv: Fix creating accel structs with unbound buffers 
If the buffer hasn't been bound to memory yet, we will dereference a
NULL pointer in radv_CreateAccelerationStructureKHR.

cc: mesa-stable

Closes: #8199
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21019>
 2023-02-01 19:31:43 +00:00
Sil Vilerino 37652da616 d3d12: Honor suggested driver profile/level for H264/HEVC encode 
Fixes some H264 <-> HEVC transcode cases where the wrong level/profile was assigned to the output bitstream

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21043>
 2023-02-01 19:17:21 +00:00
Rhys Perry bfd4ac4581 aco: limit VALUPartialForwardingHazard search 
Complicated CFG and lots of SALU can cause this to take an extremely long
time to finish.

Fixes
dEQP-VK.graphicsfuzz.cov-value-tracking-selection-dag-negation-clamp-loop
and Monster Hunter Rise demo compile times.

fossil-db (gfx1100):
Totals from 57 (0.04% of 134574) affected shaders:
Instrs: 170919 -> 171165 (+0.14%)
CodeSize: 860144 -> 861128 (+0.11%)
Latency: 961466 -> 961505 (+0.00%)
InvThroughput: 127598 -> 127608 (+0.01%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8153
Fixes: 5806f0246f ("aco/gfx11: workaround VALUPartialForwardingHazard")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20941>
 2023-02-01 18:52:40 +00:00
José Roberto de Souza 8092bc2158 intel/ds: Fix crash when allocating more intel_ds_queues than u_vector was initialized 
u_vector_add() don't keep the returned pointers valid.
After the initial size allocated in u_vector_init() is reached it will
allocate a bigger buffer and copy data from older buffer to the new
one and free the old buffer, making all the previous pointers returned
by u_vector_add() invalid and crashing the application when trying to
access it.

This is reproduced when running
dEQP-VK.synchronization.signal_order.timeline_semaphore.* in DG2 SKUs
that has 4 CCS engines, INTEL_COMPUTE_CLASS=1 is set and of course
perfetto build is enabled.

To fix this issue here I'm moving the storage/allocation of
struct intel_ds_queue to struct anv_queue/iris_batch and using
struct list_head to maintain a chain of intel_ds_queue of the
intel_ds_device.
This allows us to append or remove queues dynamically in future if
necessary.

Fixes: e760c5b37b ("anv: add perfetto source")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20977>
 2023-02-01 18:31:29 +00:00
Faith Ekstrand 1b3c746eec hasvk: Let spirv_to_nir() set UBO/SSBO base cast alignments 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21027>
 2023-02-01 17:54:40 +00:00
Faith Ekstrand 85d44b0f97 anv: Let spirv_to_nir() set UBO/SSBO base cast alignments 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21027>
 2023-02-01 17:54:40 +00:00
Faith Ekstrand f78e4cec32 vtn: Set alignment on initial UBO/SSBO casts 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21027>
 2023-02-01 17:54:40 +00:00
Rob Clark e29001d0e7 freedreno/a6xx: Remove excess CS flushing 
Also requires fixing where we emit barriers, and flushing pending
barriers at the end of the batch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20975>
 2023-02-01 17:28:41 +00:00
Rob Clark 9b22bdc956 freedreno/a6xx: Also FLUSH_CACHE on image barrier 
For the same reason we need to on an UPDATE_BUFFER barrier.  Fixes
KHR-GLES31.core.compute_shader.pipeline-post-fs once the hard-coded
cache-flush is removed from launch_grid path.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20975>
 2023-02-01 17:28:41 +00:00
Rob Clark 23e65c6084 freedreno/a6xx: Make shader state independent of grid info 
Eventually we want to move this into a state group, so we can pre-bake
the cmdstream and re-emit it via CP_SET_DRAW_STATE when it is dirty.
But in order to do that it needs to not depend on grid info.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20975>
 2023-02-01 17:28:41 +00:00
Rob Clark 1faf7133d4 freedreno: Don't open-code setting dirty CS state 
There is actually no issue with setting FD_DIRTY_PROG, since all state
is marked dirty when we switch from compute to 3d.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20975>
 2023-02-01 17:28:41 +00:00
Rob Clark 5a37cd8569 freedreno/a6xx: Don't double-write SP_CS_OBJ_START 
Also SP_CS_INSTRLEN.  This is already done in fd6_emit_shader().

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20975>
 2023-02-01 17:28:41 +00:00
Rob Clark a063caa46a freedreno: Skip flush_resource with explicit sync 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20975>
 2023-02-01 17:28:41 +00:00
Rob Clark 2503e22717 freedreno: nondraw-batch 
Allow multiple compute grids to be combined into a single non-draw
batch.  This will allow us to optimize state emit and remove excess
flushing between compute jobs.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20975>
 2023-02-01 17:28:41 +00:00
Rob Clark 0e3f2646dd freedreno/a6xx: Add CS instrlen workaround 
Based on !19023.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20975>
 2023-02-01 17:28:41 +00:00
Rob Clark bfd7d9e22e freedreno/a6xx: Add missing CS_BINDLESS mapping 
Fixes: e51975142c ("freedreno/a6xx: Add bindless state"
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20975>
 2023-02-01 17:28:41 +00:00
Rob Clark 13fe9c3e63 freedreno/ir3: Scalarize load_ssbo 
The benefits of turning it into isam (which needs to be scalar as the
SSBO is sampled as a single component R32 texture) outweigh the benefits
of vectorizing.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20975>
 2023-02-01 17:28:41 +00:00
Rob Clark 951d963565 freedreno/a6xx: LRZ for MSAA 
We don't need to fall off the LRZ path when we fall back to clearing
depth with a u_blitter draw, since u_blitter uses zsa state to achieve
the depth/stencil clear and this is entirely compabile with LRZ.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20975>
 2023-02-01 17:28:41 +00:00
Rob Clark 5eb85ef756 freedreno/decode: Increase size of offsets table 
The offsets table stores offsets of a buffer (such as cmdstream) that
we've already dumped.  The suballoc pool results in more suballocated
cmdstream allocated from a single backing buffer, meaning that we need
to increase the size of this table.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20975>
 2023-02-01 17:28:41 +00:00
Georg Lehmann 2b264455b5 aco: use s_pack_ll_b32_b16 for constant copies 
Totals from 2 (0.00% of 134913) affected shaders:
CodeSize: 28636 -> 28628 (-0.03%)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20970>
 2023-02-01 17:07:25 +00:00
Georg Lehmann 9ee9b0859b aco: use s_bfm_64 for constant copies 
Foz-DB Navi21:
Totals from 1025 (0.76% of 134913) affected shaders:
CodeSize: 1436752 -> 1432412 (-0.30%)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20970>
 2023-02-01 17:07:25 +00:00
Rhys Perry bbc5247bf7 aco/spill: always end spill vgpr after control flow 
To fix a hypothetical issue:

v0 = start_linear_vgpr
if (...) {

} else {
   use_linear_vgpr(v0)
}
v0 = phi

We need a p_end_linear_vgpr to ensure that the phi does not use the same
VGPR as the linear VGPR.

This is also much simpler.

fossil-db (gfx1100):
Totals from 1195 (0.89% of 134574) affected shaders:
Instrs: 4123856 -> 4123826 (-0.00%); split: -0.00%, +0.00%
CodeSize: 21461256 -> 21461100 (-0.00%); split: -0.00%, +0.00%
Latency: 62816001 -> 62812999 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 9339049 -> 9338564 (-0.01%); split: -0.01%, +0.00%
Copies: 304028 -> 304005 (-0.01%); split: -0.02%, +0.01%
PreVGPRs: 115761 -> 115762 (+0.00%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20621>
 2023-02-01 15:45:22 +00:00
Rhys Perry 850d945baf aco/tests: add setup_reduce_temp.divergent_if_phi 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20621>
 2023-02-01 15:45:22 +00:00
Rhys Perry 44fdd2ebcb aco: end reduce tmp after control flow, when used within control flow 
In the case of:

v0 = start_linear_vgpr
if (...) {

} else {
   use_linear_vgpr(v0)
}
v0 = phi

We need a p_end_linear_vgpr to ensure that the phi does not use the same
VGPR as the linear VGPR.

fossil-db (gfx1100):
Totals from 3763 (2.80% of 134574) affected shaders:
MaxWaves: 90296 -> 90164 (-0.15%)
Instrs: 6857726 -> 6856608 (-0.02%); split: -0.03%, +0.01%
CodeSize: 35382188 -> 35377688 (-0.01%); split: -0.02%, +0.01%
VGPRs: 234864 -> 235692 (+0.35%); split: -0.01%, +0.36%
Latency: 47471923 -> 47474965 (+0.01%); split: -0.03%, +0.04%
InvThroughput: 5640320 -> 5639736 (-0.01%); split: -0.04%, +0.03%
VClause: 93098 -> 93107 (+0.01%); split: -0.01%, +0.02%
SClause: 214137 -> 214130 (-0.00%); split: -0.00%, +0.00%
Copies: 369895 -> 369305 (-0.16%); split: -0.31%, +0.15%
Branches: 164996 -> 164504 (-0.30%); split: -0.30%, +0.00%
PreVGPRs: 210655 -> 211438 (+0.37%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20621>
 2023-02-01 15:45:22 +00:00
Marek Olšák e2d63c9a62 ac/gpu_info: add PCIe info 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20790>
 2023-02-01 14:58:57 +00:00
Marek Olšák e267b86d80 amd: update amdgpu_drm.h 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20790>
 2023-02-01 14:58:57 +00:00
Samuel Pitoiset cd6712e3a8 radv: pass pCreateInfo to radv_graphics_pipeline_compile() 
This removes some duplicated code.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20990>
 2023-02-01 14:20:47 +00:00
Samuel Pitoiset 6f17ce08fc radv: pass radv_compute_pipeline to radv_compute_pipeline_compile() 
Similar to graphics.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20990>
 2023-02-01 14:20:47 +00:00
Samuel Pitoiset b4deb3aa32 radv: move retained shaders info to radv_graphics_pipeline 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20990>
 2023-02-01 14:20:47 +00:00
Samuel Pitoiset b982f8bbe4 radv: pass radv_graphics_pipeline to radv_graphics_pipeline_compile() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20990>
 2023-02-01 14:20:47 +00:00
Samuel Pitoiset d1b36b01a2 radv: add helpers for capturing shaders and statistics 
Instead of duplicating the logic everywhere.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20990>
 2023-02-01 14:20:47 +00:00
Samuel Pitoiset e1bc8b0b21 radv: simplify pipeline_has_ngg during graphics shaders compilation 
The is_ngg field is copied during shader info linking for GS, so
after radv_shader_fill_info() is performed, it's possible to use it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20990>
 2023-02-01 14:20:47 +00:00
Samuel Pitoiset 08e496c29d radv: remove useless check about CS in radv_lower_io() 
This function is now called only for graphics pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20990>
 2023-02-01 14:20:47 +00:00
Lionel Landwerlin 6eb75dc74c anv: expose EXT_load_store_op_none 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21018>
 2023-02-01 12:53:29 +00:00
Val Packett 9b0c688f51 mailmap: Remap name and email for Val Packett 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21032>
 2023-02-01 11:30:12 +00:00
Tapani Pälli 6bdc29e2e6 intel: enable existing workaround for ICL platform 
Patch changes comment to refer to the lineage 14014097488, this
workaround applies for ICL as well.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20952>
 2023-02-01 11:09:19 +00:00
Konstantin Seurer 7e072cfba2 radv: Improve the BVH size estimation 
The previous estimation was from before we had proper LBVH and PLOC.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20988>
 2023-02-01 10:34:36 +00:00
Mike Blumenkrantz 03c2bdda60 zink: use VK_EXT_multisampled_render_to_single_sampled for EXT_multisample_render_to_texture 
this extension was added for the purpose of emulating the GL ext,
and using it is reasonably straightforward

the only (somewhat) invasive part is modifying the renderpass/dynamic hashes
to have samplecounts in the key, but this is also not too much work

now only fbfetch requires real renderpasses, and everything else is dynamic

fixes #7559

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20883>
 2023-02-01 10:08:57 +00:00
Mike Blumenkrantz 7888460257 zink: shrink zink_render_pass_state::msaa_expand_mask 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20883>
 2023-02-01 10:08:57 +00:00
Mike Blumenkrantz dc0a251e4e zink: hook up VK_EXT_multisampled_render_to_single_sampled 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20883>
 2023-02-01 10:08:57 +00:00
Eric Engestrom 6291d4d339 meson: turn android-libbacktrace into a feature option 
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20915>
 2023-02-01 06:33:52 +00:00