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10914 Commits

Author SHA1 Message Date
Samuel Pitoiset
7ead034a06 amd,radv,radeonsi: add ac_emit_cp_copy_data() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:25 +00:00
Samuel Pitoiset
af169d7393 radv: use ac_emit_cp_{acquire,release}_mem_pws() when syncing GE rings 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:24 +00:00
Samuel Pitoiset
0e358cec52 amd,radv,radeonsi: add ac_emit_cp_release_mem_pws() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:24 +00:00
Samuel Pitoiset
c45035ceb4 amd,radv,radeonsi: add ac_emit_cp_acquire_mem_pws() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:23 +00:00
Samuel Pitoiset
6329e282b8 amd,radv,radeonsi: add ac_emit_cp_wait_mem() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:23 +00:00
Samuel Pitoiset
82cbfc964a amd,radv: add ac_emit_write_data_imm() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:20 +00:00
Samuel Pitoiset
ac262c351f amd,radv: add ac_emit_cond_exec() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:20 +00:00
Samuel Pitoiset
34e445e1fc radv: use COPY_DATA_DST_MEM when writing timestamps 
Only for consistency.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37813>
 2025-10-15 07:35:19 +00:00
Daniel Schürmann
d0b87a0d5f ac/nir_flag_smem_for_loads: call divergence analysis internally 
Also don't flag more SMEM instructions (in ACO) after the last
call to ac_nir_lower_mem_access_bit_sizes().

Totals from 75 (0.09% of 79839) affected shaders: (Navi48)

Instrs: 191246 -> 189960 (-0.67%)
CodeSize: 996840 -> 985976 (-1.09%)
Latency: 3066184 -> 2945500 (-3.94%)
InvThroughput: 355373 -> 353106 (-0.64%); split: -0.66%, +0.02%
SClause: 4848 -> 4699 (-3.07%)
Copies: 13827 -> 13925 (+0.71%); split: -0.07%, +0.78%
Branches: 5176 -> 5003 (-3.34%)
PreSGPRs: 6222 -> 6272 (+0.80%)
VALU: 108934 -> 108993 (+0.05%); split: -0.00%, +0.06%
SALU: 31679 -> 31210 (-1.48%); split: -1.51%, +0.03%
SMEM: 7158 -> 6739 (-5.85%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37843>
 2025-10-14 16:33:12 +00:00
Daniel Schürmann
c8830a1a79 radv: delay ac_nir_lower_mem_access_bit_sizes 
Totals from 937 (1.17% of 79839) affected shaders: (Navi48)

MaxWaves: 25196 -> 25272 (+0.30%); split: +0.33%, -0.03%
Instrs: 619389 -> 617586 (-0.29%); split: -0.38%, +0.09%
CodeSize: 3161156 -> 3147008 (-0.45%); split: -0.49%, +0.04%
VGPRs: 54456 -> 54300 (-0.29%); split: -0.31%, +0.02%
Latency: 1548791 -> 1550501 (+0.11%); split: -0.16%, +0.27%
InvThroughput: 233599 -> 233561 (-0.02%); split: -0.10%, +0.08%
Copies: 42820 -> 42799 (-0.05%); split: -0.63%, +0.58%
PreVGPRs: 43480 -> 43479 (-0.00%)
VALU: 348357 -> 348358 (+0.00%); split: -0.08%, +0.08%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37843>
 2025-10-14 16:33:12 +00:00
Daniel Schürmann
9b1a635bb3 amd/common: merge radv_nir_opt_access_speculate() into ac_nir_flag_smem_for_loads() 
One shader is negatively affected, but we save 2 entire iterations over every shader.
This effect is also mitigated with the next commits.

Totals from 1 (0.00% of 79839) affected shaders: (Navi48)

Instrs: 947 -> 958 (+1.16%)
CodeSize: 4728 -> 4732 (+0.08%)
Latency: 20678 -> 20723 (+0.22%)
InvThroughput: 2697 -> 2698 (+0.04%)
SClause: 26 -> 27 (+3.85%)
Copies: 139 -> 145 (+4.32%)
Branches: 46 -> 47 (+2.17%)
VALU: 460 -> 463 (+0.65%)
SALU: 201 -> 204 (+1.49%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37843>
 2025-10-14 16:33:12 +00:00
Daniel Schürmann
8ff44f17ef amd/lower_mem_access_bit_sizes: also use SMEM for subdword loads 
We can simply extract from the loaded dwords as per
nir_lower_mem_access_bit_sizes() lowering.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37843>
 2025-10-14 16:33:11 +00:00
Daniel Schürmann
9553e56c67 radv: use load_global instead of load_global_amd for load_sample_positions_amd 
For consistency.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37843>
 2025-10-14 16:33:10 +00:00
Samuel Pitoiset
c5fa0c2a2a radv: allow to inline all push constants even with dynamic descriptors 
Dynamic descriptors are uploaded/emitted separately now.

fossils-db (GFX1201):
Totals from 3299 (4.14% of 79646) affected shaders:
Instrs: 1811407 -> 1811391 (-0.00%); split: -0.19%, +0.19%
CodeSize: 9339360 -> 9339824 (+0.00%); split: -0.15%, +0.16%
Latency: 7419818 -> 7417817 (-0.03%); split: -0.06%, +0.04%
InvThroughput: 1647859 -> 1647821 (-0.00%); split: -0.00%, +0.00%
VClause: 30536 -> 30534 (-0.01%)
SClause: 31009 -> 30642 (-1.18%); split: -1.55%, +0.37%
Copies: 111591 -> 112131 (+0.48%); split: -0.72%, +1.20%
PreSGPRs: 127639 -> 127628 (-0.01%)
SALU: 290492 -> 291034 (+0.19%); split: -0.28%, +0.46%

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37768>
 2025-10-14 15:34:43 +00:00
Samuel Pitoiset
a47952d495 radv: upload and emit dynamic descriptors separately from push constants 
Dynamic descriptors are rarely used and this will allow to do more
optimizations for push constants, like gathering the size from shaders
themselves instead of using the pipeline layout.

fossils-db (GFX1201):
Totals from 21740 (27.30% of 79646) affected shaders:
Instrs: 11186407 -> 11192061 (+0.05%); split: -0.05%, +0.10%
CodeSize: 59842068 -> 59864412 (+0.04%); split: -0.04%, +0.08%
Latency: 56333136 -> 56325208 (-0.01%); split: -0.03%, +0.02%
InvThroughput: 8576452 -> 8576516 (+0.00%); split: -0.00%, +0.00%
SClause: 279186 -> 279713 (+0.19%); split: -0.06%, +0.25%
Copies: 577854 -> 581735 (+0.67%); split: -0.28%, +0.95%
PreSGPRs: 867163 -> 866409 (-0.09%)
SALU: 1391187 -> 1395055 (+0.28%); split: -0.12%, +0.39%

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37768>
 2025-10-14 15:34:43 +00:00
Samuel Pitoiset
bc32286e5b radv: declare a new user SGPR for dynamic descriptors 
To move them out of push constants.

fossils-db (GFX1201):
Totals from 20700 (25.99% of 79646) affected shaders:
Instrs: 14375624 -> 14370051 (-0.04%); split: -0.07%, +0.03%
CodeSize: 76746128 -> 76723772 (-0.03%); split: -0.05%, +0.02%
Latency: 74103586 -> 74113651 (+0.01%); split: -0.01%, +0.02%
InvThroughput: 11908817 -> 11908798 (-0.00%); split: -0.00%, +0.00%
VClause: 249605 -> 249607 (+0.00%); split: -0.00%, +0.00%
SClause: 337914 -> 337772 (-0.04%); split: -0.08%, +0.04%
Copies: 843585 -> 839233 (-0.52%); split: -0.62%, +0.10%
PreSGPRs: 836283 -> 837260 (+0.12%)
SALU: 1790713 -> 1786374 (-0.24%); split: -0.29%, +0.05%

Co-authored-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37768>
 2025-10-14 15:34:43 +00:00
Timur Kristóf
772b9ce411 radv: Remove qf from radv_spm/sqtt/perfcounter where applicable 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37775>
 2025-10-14 12:33:20 +00:00
Timur Kristóf
8501c8cd43 radv: Remove unneeded forward declaration of qf from dgc header 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37775>
 2025-10-14 12:33:19 +00:00
Timur Kristóf
4462def21b radv: Remove qf argument from radv_cs_write_data (and _head) 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37775>
 2025-10-14 12:33:18 +00:00
Timur Kristóf
2bd1beac4c radv: Remove qf argument from radv_cs_emit_cache_flush 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37775>
 2025-10-14 12:33:18 +00:00
Timur Kristóf
5f901928e8 radv: Remove qf argument from radv_cp_wait_mem 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37775>
 2025-10-14 12:33:16 +00:00
Timur Kristóf
bc1f438f2a radv: Remove qf argument from radv_cs_emit_write_event_eop 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37775>
 2025-10-14 12:33:15 +00:00
Timur Kristóf
a0104c5bf6 radv: Add amd_ip_type to radv_cmd_stream 
Specify an amd_ip_type when initializing radv_cmd_stream
so that we know which packets are valid for the HW IP type
of a given command stream.

This field should be used instead of radv_cmd_buffer::qf when
emitting packets to a command stream.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37775>
 2025-10-14 12:33:13 +00:00
Timur Kristóf
a57419f96b radv: Clarify image and image/buffer copy helper functions 
Refactor the functions to make it clear what they do:
copy_memory_to_image -> gfx_or_compute_copy_memory_to_image
copy_image_to_memory -> compute_copy_image_to_memory
copy_image -> gfx_or_compute_copy_image

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37775>
 2025-10-14 12:33:12 +00:00
Timur Kristóf
db4a9aaf29 radv: Call transfer copy functions from API functions, not helpers 
Improves code readability.
No functional changes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37775>
 2025-10-14 12:33:12 +00:00
Timur Kristóf
21232ffd12 radv: Pass correct queue family in radv_emit_cache_flush 
Probably a leftover from a past refactor.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37775>
 2025-10-14 12:33:12 +00:00
Timur Kristóf
50f0912f54 radv: Pass correct queue family to radv_cs_emit_write_event_eop 
Probably a leftover from a previous code refactor.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37775>
 2025-10-14 12:33:12 +00:00
Samuel Pitoiset
a566a933ca radv: always return optimalDeviceAccess=TRUE for block-compressed formats 
Required by the spec.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37817>
 2025-10-14 10:14:45 +00:00
Samuel Pitoiset
a157faee42 radv: only return identicalMemoryLayout for linear images 
This isn't true for tiled images because the swizzling can change.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37817>
 2025-10-14 10:14:45 +00:00
Benjamin Cheng
c8093e6cb1 radv: Output requested encode query results only 
Video encode feedback queries have a configurable set of feedback bits,
specified in VkQueryPoolVideoEncodeFeedbackCreateInfoKHR::encodeFeedbackFlags.
Only the bits specified should be output when retrieving results.

Fixes: 1d74661dfd ("radv: add encoder queue support pieces and encoder queries.")
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37774>
 2025-10-14 09:11:25 +00:00
Samuel Pitoiset
26c7f2fd6a radv: enable the global BO list by default 
vkd3d-proton (DX12) and Zink (GL) have always been enabling features
that require the global BO list to be enabled.

Since DXVK 2.7+ (August 2025), it's also always enabled by default for
DX9-11 games (because it requires BDA now).

The global BO list used to decrease performance in the past mostly
because of bad memory management in AMDGPU, but it seems the situation
slightly improved since. Though, there might still some workloads that
hit the issue, but I think it should be mostly good overall.

This introduces RADV_DEBUG=nobolist to disable the global BO list
when no features require it.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6957
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2331
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35075>
 2025-10-14 08:12:36 +00:00
Samuel Pitoiset
df269714ef radv/meta: remove radv_cmd_buffer_resolve_rendering_{hw,cs,fs} 
Just call the other functions directly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37792>
 2025-10-14 07:46:13 +00:00
Samuel Pitoiset
a81f01bc96 radv/meta: pass iview formats for subpass resolves 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37792>
 2025-10-14 07:46:13 +00:00
Samuel Pitoiset
d3e716f1fb radv/meta: re-use radv_meta_resolve_{fragment,hardware}_image() for subpass resolves 
Similar to compute.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37792>
 2025-10-14 07:46:13 +00:00
Samuel Pitoiset
ac3c21f130 radv/meta: pass image formats to radv_meta_resolve_{hardware,fragment}_image() 
Similar to the compute function.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37792>
 2025-10-14 07:46:12 +00:00
Samuel Pitoiset
e982f6e2c8 radv: fix shaders memleak when importing pipeline binaries with GPL 
The implementation must use the data in VkPipelineBinaryInfoKHR when
provided instead of importing binaries from libraries.

This fixes a memleak with shaders found with ASAN.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37844>
 2025-10-14 06:54:02 +00:00
Samuel Pitoiset
876e6a3bfe radv/rt: fix memory leak in lower_rt_instructions_monolithic() 
Found with ASAN.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37844>
 2025-10-14 06:54:02 +00:00
Emma Anholt
f7cbc7b1c5 radv: Allocate BOs as implicit sync even if the WSI is doing implicit sync. 
As noted, the flag we allocate with controls whether *anyone* can implicit
sync on the BO through amdgpu interfaces, not just whether our fd does.
This restores radv to the behavior before the regressing commit.

Fixes: 4dcf32c56e ("wsi/drm: Don't request implicit sync if we're doing implicit sync ourselves.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37772>
 2025-10-10 19:17:04 +00:00
Emma Anholt
38ac55ebff radv: Restore marking WSI image's mem->buffer as uncached. 
Prior to 4dcf32c56e, radv was getting a request for implicit sync, even
when we were doing the work to do implicit sync in the WSI.  Once that was
turned off, we incidentally dropped flagging WSI's mem->buffer as
uncached, due to it being under the wrong condition.

Fixes: 4dcf32c56e ("wsi/drm: Don't request implicit sync if we're doing implicit sync ourselves.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37772>
 2025-10-10 19:17:04 +00:00
Hans-Kristian Arntzen
2848901722 radv: Actually fail custom border color sampler creation. 
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Fixes: a52483d9e7 ("radv: fix capture/replay with sampler border color")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37787>
 2025-10-10 14:25:54 +00:00
Samuel Pitoiset
183ed8046c radv: allow VK_FORMAT_S8_UINT with host image copy 
Depth/stencil formats still need to be properly implemented.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37748>
 2025-10-10 13:46:51 +00:00
Samuel Pitoiset
d063072182 radv: rename radv_mark_descriptor_sets_dirty() 
Descriptor heaps will be marked as dirty in this function too.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37786>
 2025-10-10 13:22:05 +00:00
Samuel Pitoiset
34b3dae3b6 radv: make radv_descriptor_get_va() a static function 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37786>
 2025-10-10 13:22:05 +00:00
Samuel Pitoiset
08dbab0600 radv: rename shader arg descriptor_sets to descriptors 
It's more generic and descriptor heaps will use it too.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37786>
 2025-10-10 13:22:03 +00:00
Samuel Pitoiset
609ae4e647 radv: rename indirect_descriptor_sets to indirect_descriptors 
With descriptor heap the driver will also have to emit indirect
descriptor heaps in some cases.

Rename couple of things to make them more generic.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37786>
 2025-10-10 13:22:03 +00:00
Samuel Pitoiset
0ff1ce4ac5 radv: use force_indirect_desc_sets when creating RT prologs 
This is cleaner and this field has been added exactly for that.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37786>
 2025-10-10 13:22:02 +00:00
Samuel Pitoiset
055b10a75c radv: do not initialize HiZ on transfer queue on RDNA4 
Emitting compute dispatches on SDMA would just hang.

This fixes pending depth/stencil copy tests on transfer queue with
RADV_PERFTEST=transfer_queue.

Fixes: e6c485afb0 ("radv: initialize HiZ metadata during image layout transitions")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37795>
 2025-10-10 12:50:02 +00:00
Samuel Pitoiset
aeec53f020 radv,radeonsi: use new ac_cmdbuf macros 
But keep them behind existing macros for consistency until all macros
are moved to common code.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36292>
 2025-10-08 18:00:15 +00:00
Samuel Pitoiset
902f5a8618 radv: replace radeon_cmdbuf by ac_cmdbuf completely 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36292>
 2025-10-08 18:00:15 +00:00
Rhys Perry
c63c695149 radv: move nir_opt_algebraic loop for NGG culling earlier 
Totals from 6913 (8.66% of 79825) affected shaders: (Navi21)
Instrs: 5373319 -> 5358717 (-0.27%); split: -0.30%, +0.03%
CodeSize: 27448536 -> 27345464 (-0.38%); split: -0.41%, +0.03%
SpillSGPRs: 982 -> 998 (+1.63%)
Latency: 22998827 -> 23011602 (+0.06%); split: -0.13%, +0.19%
InvThroughput: 4663749 -> 4664809 (+0.02%); split: -0.00%, +0.03%
VClause: 120845 -> 120461 (-0.32%); split: -0.49%, +0.17%
SClause: 119068 -> 116064 (-2.52%); split: -2.71%, +0.18%
Copies: 456590 -> 456450 (-0.03%); split: -0.19%, +0.16%
Branches: 145555 -> 145559 (+0.00%); split: -0.00%, +0.01%
PreSGPRs: 300465 -> 301154 (+0.23%); split: -0.01%, +0.24%
VALU: 3064127 -> 3064210 (+0.00%); split: -0.00%, +0.00%
SALU: 891257 -> 886368 (-0.55%); split: -0.71%, +0.16%
SMEM: 190500 -> 184624 (-3.08%); split: -3.11%, +0.02%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36936>
 2025-10-08 08:54:11 +00:00