Commit Graph

195779 Commits

Author SHA1 Message Date
Gert Wollny 6ebda9ca52 r600/sfn: extract handling of ALU_PUSH_BEFORE in assembler code
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37096>
2025-09-04 18:44:47 +00:00
Gert Wollny 98b1801dc1 r600/sfn: Add method to query whether ALU block will need ALU_EXTENDED
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37096>
2025-09-04 18:44:47 +00:00
Gert Wollny 8ac1342f46 r600/sfn: Drop test for address register in assembler IF predicate
This is already handled before.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37096>
2025-09-04 18:44:47 +00:00
Gert Wollny ca1ee36516 r600/sfn: Add method to emit ALU_PUSH_BEFORE in assembler
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37096>
2025-09-04 18:44:47 +00:00
Gert Wollny fbded04e3b r600/sfn: Add method to query whether an ALU group sets the predicate
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37096>
2025-09-04 18:44:47 +00:00
Gert Wollny 6cc25b15a1 r600/sfn: chain group barrier and predicate instructions
It seems they can not be emitted in the same ALU group

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37096>
2025-09-04 18:44:47 +00:00
Gert Wollny f9ae43bf04 r600/sfn: Add a CF block start member and handle it in the tests
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37096>
2025-09-04 18:44:47 +00:00
Gert Wollny ae6b5a449a r600/sfn: Add more CF instruction types
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37096>
2025-09-04 18:44:47 +00:00
Gert Wollny a6302cf00d r600/sfn: Emit and schedule WaitACK as a separate instruction
This is a step to emitting VTX and TEX block start instructions in the
sfn assembler instead of relying on the old backend asm code.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37096>
2025-09-04 18:44:47 +00:00
Gert Wollny a6b6ce84f7 r600/sfn: Prepare scheduler to handle WaitAck instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37096>
2025-09-04 18:44:47 +00:00
Gert Wollny b1166f3def r600/sfn: preselect fetch by using TC and VC in scheduler
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37096>
2025-09-04 18:44:47 +00:00
Gert Wollny fc40002de7 r600/sfn: Simplify scheduling
Group together instructions that are
   * emitted at CF level
   * in a GDS block.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37096>
2025-09-04 18:44:47 +00:00
Gert Wollny 11c91aa5fb r600/sfn: make pin_dest_to_chan a virtual function
To simplify the scheduling we need the method to be callable for all
instruction types.

v2: remove now useless override in ExportInstr

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37096>
2025-09-04 18:44:47 +00:00
Mike Blumenkrantz 1dd263ee68 zink: reeneable OVR_multiview2
Fixes: 7d2b36e50f ("zink: just check multiview availability to advertise extensions")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37184>
2025-09-04 13:13:09 -04:00
Mel Henning 90ac7d13dc nvk: Clear second SET_RENDER_ENABLE operand
The hardware actually compares a pair of 64-bit values, rather than
comparing a single value against zero like we previously assumed.

This wasn't an issue in most cases before because if the buffer is
zero-initialized the previous code happens to work. If we get a
buffer with garbage in it though we would run into issues.

Fixes: 80eac1337d ("nvk: Always copy conditional rendering value before compare")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13821
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37153>
2025-09-04 16:27:58 +00:00
Mel Henning 27ca1c28c0 nvk/cmd_pool: NVK_DEBUG=trash_mem for alloc_mem
These buffers get recycled, so we can't rely on their contents.
Unfortunately, conditional rendering was relying on these buffers being
all zero, implicitly, because we didn't fully understand the hardware.
By supporting this debug flag here, we add a way to check for code that
accidentally assumes zero-initialization.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37153>
2025-09-04 16:27:57 +00:00
Mel Henning 2dbe981513 nak: Add a test to check how RENDER_ENABLE works
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37153>
2025-09-04 16:27:57 +00:00
Mel Henning 27312edaa6 nak/hw_runner: Make a few more items public
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37153>
2025-09-04 16:27:57 +00:00
Mel Henning eaa547f6f2 nvk: Clear cond_render_gart_* in reset_cmd_buffer
nvk_cmd_pool_free_gart_mem_list frees this buffer, so we need to clear
the pointers to it in order to avoid a use after free.

Fixes: 07c70c77de ("nvk: add cond render upload buffer.")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37153>
2025-09-04 16:27:57 +00:00
Faith Ekstrand 40aea06bd0 nouveau/push: Fix SET_OBJECT handling
My first attempt to fix it ended up stomping classes to zero because it
happened too eary.  Now it happens after we have the whole method parsed
but before we go searching for strings.

Fixes: 8e93a763a3 ("nouveau/push: Handle more recent versions of 6F")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37180>
2025-09-04 15:49:19 +00:00
Rob Clark d5a8233598 nir/lower-amul: Comment fix
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37063>
2025-09-04 15:21:38 +00:00
Rob Clark 55d77749ed nir/lower-amul: Fix crash with unused SSBO
Since https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12175
we should be able to rely on driver_location for both UBOs and SSBOs.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37063>
2025-09-04 15:21:38 +00:00
Thomas H.P. Andersen 93eafbf04f nvk: implement VK_AMD_buffer_marker
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35507>
2025-09-04 15:03:09 +00:00
Gert Wollny 3a6b85aa2b egl,glx,X11: Handle case when PlatformDisplay is EGL_DEFAULT_DISPLAY
If the PlatformDisplay is initialized to EGL_DEFAULt_DEVICE (i.e. 0)
acquire a connection to the display to query the thread savety.

v2: rework after getting a better understanding of what is ging on.

v3: check whether XOpenDisplay was successfull (Yonggang Luo)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13740
Fixes: ecbe35d878 ("egl,glx: allow OpenGL with old libx11, but disable glthread if it's unsafe")

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37006>
2025-09-04 14:35:53 +00:00
Georg Lehmann 796f0847a6 nir/lower_subgroups: recursively lower ballot scans
This should be better for backends that have le/lt mask intrinsics.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37178>
2025-09-04 14:04:00 +00:00
Georg Lehmann 2725eaf9a2 nir/lower_subgroups: change filter to intrinsic callback
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37178>
2025-09-04 14:04:00 +00:00
Georg Lehmann d14897b2f7 nir/lower_subgroups: don't use get_max_subgroup_size for lowering boolean rotates
The lowering won't work with an unknown subgroup size, and we correctly
assert that at the top of the function.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37178>
2025-09-04 14:03:59 +00:00
Georg Lehmann 516c766c71 spirv: ensure ballot find_lsb/find_msb/bit_count have 32bit result
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37178>
2025-09-04 14:03:58 +00:00
Georg Lehmann f8633511be nir: make ballot find_lsb/msb/bit_count 32bit only
The lowering is 32bit only too.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37178>
2025-09-04 14:03:58 +00:00
Georg Lehmann 276fce4f13 spirv: handle ballot bit_extract separately
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37178>
2025-09-04 14:03:58 +00:00
Georg Lehmann b8db8f877d nir: make ballot_bitfield_extract 1bit only
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37178>
2025-09-04 14:03:57 +00:00
Georg Lehmann 83326af899 nir/builder: add nir_inverse_ballot_imm
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37178>
2025-09-04 14:03:56 +00:00
Georg Lehmann ef8c364d3d nir: make inverse_ballot 1bit only
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37178>
2025-09-04 14:03:56 +00:00
Igor Naigovzin 6c0017be38 zink: fix clamping gl_Layer output to 0 when framebuffer is not layered
The previous implementation was using temporal clamping variable within geometry shader.
    It caused the framebuffer_layer_id input to be ignored, so gl_Layer would end up with a value of 0.
    The fix removes the use of the temp variable.

    Tested using CTS 4.6.6.0 test cases:
    ./glcts --deqp-case=dEQP-GL45-ES31.functional.geometry_shading.layered.fragment_layer_cubemap
    ./glcts --deqp-case=dEQP-GL45-ES31.functional.geometry_shading.layered.fragment_layer_3d
    ./glcts --deqp-case=dEQP-GL45-ES31.functional.geometry_shading.layered.fragment_layer_2d_array
    ./glcts --deqp-case=dEQP-GL45-ES31.functional.geometry_shading.layered.fragment_layer_2d_multisample_array

    These tests fail before and pass after the change.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37069>
2025-09-04 12:35:53 +00:00
Lionel Landwerlin 262baafe27 anv: fix partial queries
Partial results should be computed for all types of queries.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36916>
2025-09-04 13:25:26 +03:00
Eric Engestrom d698251e32 radv/ci: document whether ci-tron jobs runs on an APU or a dGPU
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37124>
2025-09-04 09:47:21 +00:00
Eric Engestrom 1a1e21e725 radv/ci: deduplicate navi10 GPU_VERSION
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37124>
2025-09-04 09:47:21 +00:00
Job Noorman 9d4ba885bb ir3/ra: make main shader reg select independent of preamble
ir3_ra allocates registers in a round-robin fashion to avoid false
dependencies. In order to do this, it keeps track of a "file start"
register for each register file and will search starting from there for
available registers.

This file start is initialized at the beginning of RA of kept across
blocks, including across the preamble. This means that a change that
only affects the preamble may cause changes in how registers are
allocated in the main shader. This may result in more or less copies,
and more or less false dependencies which changes the behavior of
postsched.

Changes in the preamble affecting the main shader makes it more
difficult to analyze shader-db results, as I often find myself chasing
down a regression that is just caused by RA/postsched "bad luck" in a
main shader that didn't actually change. Prevent this by resetting the
file start at the beginning of the main shader.

Totals:
Instrs: 364710030 -> 364631384 (-0.02%); split: -0.19%, +0.17%
CodeSize: 926766046 -> 926671488 (-0.01%); split: -0.10%, +0.09%
NOPs: 47703035 -> 47653319 (-0.10%); split: -1.05%, +0.94%
MOVs: 17072354 -> 17075112 (+0.02%); split: -1.28%, +1.29%
COVs: 4098062 -> 4096784 (-0.03%); split: -0.04%, +0.01%
Full: 15164359 -> 15112404 (-0.34%); split: -0.34%, +0.00%
(ss): 7818796 -> 7819147 (+0.00%); split: -1.10%, +1.11%
(sy): 3985674 -> 3983435 (-0.06%); split: -0.72%, +0.67%
(ss)-stall: 26535279 -> 26525929 (-0.04%); split: -1.36%, +1.32%
(sy)-stall: 111983489 -> 111716382 (-0.24%); split: -1.26%, +1.02%
Last helper: 116734916 -> 116595531 (-0.12%); split: -0.62%, +0.50%
Cat0: 53338794 -> 53289450 (-0.09%); split: -0.94%, +0.85%
Cat1: 22352349 -> 22328303 (-0.11%); split: -1.28%, +1.17%
Cat2: 155348173 -> 155348012 (-0.00%); split: -0.00%, +0.00%
Cat7: 9314194 -> 9309099 (-0.05%); split: -0.88%, +0.82%

Totals from 224302 (16.59% of 1352016) affected shaders:
Instrs: 148838101 -> 148759455 (-0.05%); split: -0.47%, +0.42%
CodeSize: 404838970 -> 404744412 (-0.02%); split: -0.22%, +0.20%
NOPs: 26261983 -> 26212267 (-0.19%); split: -1.90%, +1.71%
MOVs: 8372715 -> 8375473 (+0.03%); split: -2.60%, +2.63%
COVs: 2061488 -> 2060210 (-0.06%); split: -0.09%, +0.02%
Full: 3420300 -> 3368345 (-1.52%); split: -1.52%, +0.00%
(ss): 3848423 -> 3848774 (+0.01%); split: -2.24%, +2.25%
(sy): 2021040 -> 2018801 (-0.11%); split: -1.43%, +1.32%
(ss)-stall: 13554064 -> 13544714 (-0.07%); split: -2.65%, +2.59%
(sy)-stall: 59778475 -> 59511368 (-0.45%); split: -2.36%, +1.91%
Last helper: 52847662 -> 52708277 (-0.26%); split: -1.38%, +1.12%
Cat0: 29270336 -> 29220992 (-0.17%); split: -1.72%, +1.55%
Cat1: 10820261 -> 10796215 (-0.22%); split: -2.63%, +2.41%
Cat2: 57289060 -> 57288899 (-0.00%); split: -0.00%, +0.00%
Cat7: 5686726 -> 5681631 (-0.09%); split: -1.43%, +1.34%

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37003>
2025-09-04 05:58:09 +00:00
Olivia Lee bb14ea5c19 v3dv: replace vk_to_mesa_prim with vk_topology_to_mesa from vulkan/util
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37038>
2025-09-03 22:04:14 -07:00
Olivia Lee dccb431254 lavapipe: replace vk_conv_topology with vk_topology_to_mesa from vulkan/util
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37038>
2025-09-03 22:04:14 -07:00
Olivia Lee 554a0be553 hk: replace vk_conv_topology with vk_topology_to_mesa from vulkan/util
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37038>
2025-09-03 22:04:14 -07:00
Olivia Lee 5faa62f91e vulkan/util: add vk_topology_to_mesa helper function
Something like this already exists in a few drivers, move it to common
code. This specific version was pulled from honeykrisp, which is the
only one that handles META_RECT_LIST_MESA.

Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37038>
2025-09-03 22:04:14 -07:00
Yiwei Zhang ed80e33f51 tu: properly implement VkBindMemoryStatus from maint6
Per spec: If the maintenance6 feature is enabled, this command must
attempt to perform all of the memory binding operations described by
pBindInfos, and must not early exit on the first failure.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37099>
2025-09-04 02:29:33 +00:00
Yiwei Zhang cef48af271 tu: bind aliased wsi image at memory offset zero
The vulkan spec says that we should ignore memoryOffset when
VkBindImageMemorySwapchainInfoKHR is present. wsi common assumes that we
bind the wsi image at offset 0, so set the offset to 0. This change
aligns with common wsi, and also obeys dedicated alloc requirement.

Fixes: f887116c49 ("turnip: adopt wsi_common_get_memory")
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37099>
2025-09-04 02:29:33 +00:00
Yiwei Zhang ee7666e3df vulkan/util: drop unused vk_select_android_external_format
Acked-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37099>
2025-09-04 02:29:32 +00:00
Yiwei Zhang 96ac80aed1 tu: simplify AHB image view format resolving for external format
vk_image_view_init has resolved the external format already.

Acked-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37099>
2025-09-04 02:29:32 +00:00
Yiwei Zhang 76370c1edf tu: drop redundant Android headers
compile and cross-compile tested

Acked-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37099>
2025-09-04 02:29:31 +00:00
Yonggang Luo 949a056934 tgsi: Fixes ntt_should_vectorize_io parameters
Fixes: 5f757bb95c ("nir: Make the load_store_vectorizer provide align_mul + align_offset.")

This is found when I am trying to narrow bit_size and num_components to uint8_t

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37042>
2025-09-04 01:42:19 +00:00
Sagar Ghuge bc8e29c04e iris: Emit state cache invalidation after every compute dispatch
Implement HSD 16028171704/14025112257:
   LSC state cache livelock:- Once state cache entries are full,
   subsequent walker dispatches with two threads per thread group maybe
   gets stuck infinitely because of state cache live lock.

   One thread continuously stuck in loop doing UGM fence + evict and UGM
   read is waiting on UGM read to have certain value. while other thread
   supposed to update the value that first thread is waiting for. But
   since entries are full in state cache, there is second thread never
   make progress.

Closes: #12352
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37128>
2025-09-04 00:14:48 +00:00
Sagar Ghuge ebbc358db5 blorp: Emit state cache invalidation after every compute dispatch
Implement HSD 16028171704/14025112257:
   LSC state cache livelock:- Once state cache entries are full,
   subsequent walker dispatches with two threads per thread group maybe
   gets stuck infinitely because of state cache live lock.

   One thread continuously stuck in loop doing UGM fence + evict and UGM
   read is waiting on UGM read to have certain value. while other thread
   supposed to update the value that first thread is waiting for. But
   since entries are full in state cache, there is second thread never
   make progress.

Closes: #12352
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37128>
2025-09-04 00:14:48 +00:00