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127488 Commits

Author SHA1 Message Date
Simon Ser
6e697b595f util/format: document block depth field 
After the pixel block width and height, a third field is used to
store the pixel block depth. Document this field.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10134>
 2021-04-15 09:43:17 +00:00
Simon Ser
b26a546b2f radeon/vcn: handle tiled buffers when decoding 
Set the swizzle mode when decoding.

Add a safe-guard to make sure the provided surface isn't DCC, because
we don't handle this situation.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10134>
 2021-04-15 09:43:17 +00:00
Samuel Iglesias Gonsálvez
029bc53be6 turnip: fix typo in tu_CmdBeginRenderPass2() 
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8615>
 2021-04-15 09:51:25 +02:00
Samuel Iglesias Gonsálvez
d52917f858 turnip/lrz: added support for depth bounds test enable 
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8615>
 2021-04-15 09:51:25 +02:00
Samuel Iglesias Gonsálvez
2161aebf8d turnip: document GRAS_LRZ_CNTL's UNK5 bitfield 
It is used by the blob to enable depth bounds test for LRZ.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8615>
 2021-04-15 09:51:25 +02:00
Samuel Iglesias Gonsálvez
54cf12774a turnip/lrz: add support for VK_EXT_extended_dynamic_state 
When the depth or stencil state changes dynamically, that might affect
LRZ state and we need to recalculate it and emit it again.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8615>
 2021-04-15 09:51:20 +02:00
Samuel Iglesias Gonsálvez
6d6cbb7361 turnip: refactor how LRZ state is calculated 
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8615>
 2021-04-15 09:50:51 +02:00
Samuel Iglesias Gonsálvez
43ebba4e88 turnip: initialize pipeline->rb_{stencil,depth}_cntl always 
This change will simplify further changes on LRZ state management.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8615>
 2021-04-15 09:50:51 +02:00
Samuel Iglesias Gonsálvez
1f9fb7677b turnip: move pipeline gras_su and rb{stencil,depth}_cntl_mask initialization 
Move them up, so they are initialized even when the dynamic state is
not used.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8615>
 2021-04-15 09:50:51 +02:00
Iago Toral Quiroga
b8403192ed v3dv: use a bitfield to implement a quick check for job BO tracking 
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10210>
 2021-04-15 06:09:34 +00:00
Iago Toral Quiroga
9e76240f84 v3dv: optimize a few cases of BO job additions 
In these cases we know that the BO has not been added to the job
before, so we can skip the usual process for adding the BO where
we check if we had already added it before to avoid duplicates.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10210>
 2021-04-15 06:09:34 +00:00
Iago Toral Quiroga
493a316e40 v3dv: avoid redundant BO job additions for spill / shared BOs 
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10210>
 2021-04-15 06:09:34 +00:00
Iago Toral Quiroga
002304482c v3dv: avoid redundant BO job additions for UBO/SSBO 
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10210>
 2021-04-15 06:09:34 +00:00
Iago Toral Quiroga
fa170dab4c v3dv: avoid redundant BO job additions for textures and samplers 
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10210>
 2021-04-15 06:09:34 +00:00
Felix DeGrood
e7ea5e500f intel/blorp: remove tile flush from emit surface state 
Tile cache flush not required when emitting new surface state.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10217>
 2021-04-15 04:54:40 +00:00
Felix DeGrood
c85ea824bc iris: reduce redundant tile cache flushes 
We are flushing tile cache more often than is necessary. In
unified cache mode, tile cache flushing is expensive, evicting all
depth/pixel data from the L3$. This is only need for a handful of
cases, such as: making cpu or gpu changes globally visible
(e.g. map), fast color clears, or slow depth clears. Tile cache
flushing is a gen12+ feature.

Remove blanket flushing of tile cache on all depth/RT flushes.
Replace with selective tile cache flushing.

Improves performance in several workloads:
AztecRuins.ogl-high-offscreen-1440p 1%
UnigineValley.ogl-g2                1%
Dota 2 (replay Jul 2020).ogl-g2     1%
Counter-Strike GO.ogl-g2            1%
Manhattan.ogl-Off-19x10             2%
CarChase.ogl-Off-19x10              1%
Bioshock Infinite.ogl-g2            1%

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10217>
 2021-04-15 04:54:40 +00:00
Kenneth Graunke
bfe2c5f667 iris: only flush the render cache for aux changes, not format changes 
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10217>
 2021-04-15 04:54:40 +00:00
Felix DeGrood
ed8f2c4cbe iris: Cache VB/IB in L3$ for Gen12 
Gen12 enables caching of Vertex and Index Buffers in L3.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10217>
 2021-04-15 04:54:40 +00:00
Felix DeGrood
ed94528711 intel: add L3 Bypass Disable to gen xml 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10217>
 2021-04-15 04:54:40 +00:00
Mike Blumenkrantz
376c878c16 mesa/st: plumb GL_TEXTURE_REDUCTION_MODE_ARB through QueryInternalFormat 
enable per-format querying of texture_filter_minmax support if the ARB extension
is enabled

also now return 0 if neither extension is supported

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10030>
 2021-04-15 01:20:40 +00:00
Mike Blumenkrantz
b122beaff3 gallium: split PIPE_CAP_SAMPLER_REDUCTION_MINMAX into modes 
this enables detection for the EXT vs the ARB extension, which have
different specifications regarding which formats must be supported

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10030>
 2021-04-15 01:20:40 +00:00
Mike Blumenkrantz
59ad872458 gallium: add PIPE_BIND_SAMPLER_REDUCTION_MINMAX 
for querying format support

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10030>
 2021-04-15 01:20:40 +00:00
Yiwei Zhang
1932207902 venus: implement dma_buf fd import and properties query 
This change is for supporting VK_ANDROID_native_buffer implementation,
and it does not advertise VK_KHR_external_memory_fd.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10195>
 2021-04-15 00:58:00 +00:00
Yiwei Zhang
001549c92c venus: update venus-protocol headers 
Add support for external memory fd properties query and import
- vkGetMemoryResourcePropertiesMESA
- VkImportMemoryResourceInfoMESA
- VkMemoryResourcePropertiesMESA

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10195>
 2021-04-15 00:58:00 +00:00
Rob Clark
31782330da freedreno: Add missing foreach macros and update indentation 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10247>
 2021-04-14 16:53:26 -07:00
Chia-I Wu
9b71154353 venus: remove vn_renderer_info::has_timeline_sync 
We are no longer limited to Vulkan 1.1 in VMs.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
 2021-04-14 21:18:10 +00:00
Chia-I Wu
37f03a2c4c venus: wait on vkQueuePresentKHR 
Add vn_renderer_info::has_implicit_fencing.  Force vkQueueWaitIdle
during vkQueuePresentKHR when it is false.

This kills the performance, but we have to do this until the kernel does
implicit fencing.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
 2021-04-14 21:18:10 +00:00
Chia-I Wu
7253e61d9d venus: remove vn_ring_wait_all 
It is unused now.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
 2021-04-14 21:18:10 +00:00
Chia-I Wu
f69c8f042a venus: remove vn_queue::sync_queue_index 
It is unused now.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
 2021-04-14 21:18:10 +00:00
Chia-I Wu
b6d819c348 venus: remove VN_SYNC_TYPE_SYNC 
It is unused now.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
 2021-04-14 21:18:10 +00:00
Chia-I Wu
974af6df32 venus: remove vn_renderer_sync support from vn_queue_submission 
It is unused now.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
 2021-04-14 21:18:10 +00:00
Chia-I Wu
0d848dcb0d venus: stop using vn_renderer_sync in vn_queue 
Move away from vn_renderer_sync and toward a userspace-only solution
temporarily until the kernel does what we need.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
 2021-04-14 21:18:10 +00:00
Chia-I Wu
6d2454ad3c venus: stop using vn_renderer_sync in vn_semaphore 
Move away from vn_renderer_sync and toward a userspace-only solution
temporarily until the kernel does what we need.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
 2021-04-14 21:18:10 +00:00
Chia-I Wu
4ffb0265cc venus: stop using vn_renderer_sync in vn_fence 
Move away from vn_renderer_sync and toward a userspace-only solution
temporarily until the kernel does what we need.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
 2021-04-14 21:18:10 +00:00
Sagar Ghuge
be2d9c113b anv: Avoid corrupting indirect depth clear values 
We don't need to initialize the BO since blorp updates the clear color
BO content with fast clear value i.e ANV_HZ_FC_VAL for depth surface.

With this approach, we can get rid of possibility of corruption since we
are no longer sharing the same clear BO for depth formats.

Closes: #3614

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9941>
 2021-04-14 21:00:41 +00:00
Sagar Ghuge
ca01d68fb3 anv: Set correct fast clear value for depth during blorp operation 
Previously, on the platforms which support the indirect clear color
values, we were just setting the clear color address and not enforcing
any clear color values but some of the blorp operations were using the
wrong fast clear value.

With this patch, we make sure to set the correct fast clear color value
during blorp operations.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9941>
 2021-04-14 21:00:41 +00:00
Boris Brezillon
660b4d6e25 panfrost: Don't advertise AFBC mods when the format is not supported 
On Bifrost, AFBC is not supported if the format has a non-identity
swizzle. For internal resources we fix the format at runtime, but this
fixup is not applicable when we export the resource. Don't advertise
AFBC modifiers on such formats.

Fixes: 44217be921 ("panfrost: Adjust the format for AFBC textures on Bifrost v7")
Cc: mesa-stable
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10233>
 2021-04-14 20:44:01 +00:00
Rob Clark
cd749d2c1a freedreno: Manual fixups 
Things I couldn't figure out how to get clang-format to not mess up.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8883>
 2021-04-14 19:52:21 +00:00
Rob Clark
2d439343ea freedreno: Re-indent 
clang-format -fallback-style=none --style=file -i src/gallium/drivers/freedreno/*.[ch] src/gallium/drivers/freedreno/*/*.[ch]

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8883>
 2021-04-14 19:52:21 +00:00
Rob Clark
fdcae5b5b8 freedreno: Some manual reformatting 
Take care of a few things that clang-format makes a hash of.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8883>
 2021-04-14 19:52:21 +00:00
Rob Clark
2fb3984805 freedreno: Add .clang-format 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8883>
 2021-04-14 19:52:21 +00:00
James Park
75d8998f7c meson: Fix winflexbison warnings 
Undefine __STDC_VERSION__ for C files to avoid mismatch with C11/C17.

Define __STDC_VERSION__ for C++ files to use <inttypes.h> path.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10196>
 2021-04-14 19:17:27 +00:00
Rhys Perry
5b8a4516e6 aco/ra: remove live-in temporary from live_out_per_block when moving it 
Otherwise, handle_loop_phis() might pass it to handle_live_in() and then
we could have two phis for this variable.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 7c64623e94 ("aco/ra: refactor SSA repairing during register allocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10236>
 2021-04-14 19:04:08 +00:00
Rhys Perry
11fde1247c aco/ra: use original names when renaming loop carried phi operands 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 7c64623e94 ("aco/ra: refactor SSA repairing during register allocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10236>
 2021-04-14 19:04:08 +00:00
Lionel Landwerlin
23c4b59b46 anv: bump internal descriptor index fields to 32bits 
Prior to supporting VK_EXT_descriptor_indexing all of our descriptor
limits where below 64k which fitted a uint16_t. Now all of those can
go up to 2^20 entries so we need 32bits indexes to keep track of them.

This change leaves the dynamic indexes at 16bits. We could arguably
bump them too, up to the reviewer's taste.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 6e230d7607 ("anv: Implement VK_EXT_descriptor_indexing")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4636
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10228>
 2021-04-14 18:52:48 +00:00
Samuel Pitoiset
97e7b21c42 ac: add missing BUF_DATA_FORMAT_10_11_11 vertex format on GFX10+ 
This format is supported by the driver.

Fixes vertex explosion in Dirt 5.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4635
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10226>
 2021-04-14 18:07:41 +00:00
Connor Abbott
2deead184c ir3/sched: Don't schedule too many tex/SFU instructions 
Consider a simple loop that does a series of texture instructions and
then reduces the results:

vec4 sum = vec4(0);
for (int i = 0; i < N; i++) {
   sum += texture(...);
}

Assume that the loop is unrolled and we schedule the resulting basic
block. Right now, after we schedule the first texture instruction, the
only instructions available to schedule that don't incur a sync are the
instructions to setup the second texture instruction. So we keep picking
the texture instructions, no matter how large N is, resulting in a
pathological schedule for register pressure when N is very large:

sum1 = texture(...);
sum2 = texture(...);
sum3 = texture(...);
...
sum = sum1 + sum2 + sum3 + ...;

In particular this happens with some CTS tests for VK_EXT_robustness2,
where a loop like that with many iterations is marked as [[unroll]],
forcing NIR to unroll it.

This solution is a balance between the current approach and always
scheduling for register pressure (and ignoring sync's). We only allow a
certain number of texture fetches to be in flight before considering
textures to "sync", even though they don't really, both because they
likely *will* sync in reality (overflowing the internal queue of waiting
texture instructions) and because at some point we need the normal
algorithm to kick in and start lowering register pressure.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7571>
 2021-04-14 17:33:58 +00:00
Connor Abbott
7821e5a3f8 ir3/sched: Don't penalize uses of already-waited tex/SFU 
Once we insert a use of a given tex or SFU instruction, then we must
wait for that tex/SFU instruction (as well as all earlier ones) to
complete, so we shouldn't penalize further uses, even if a subsequent
tex/SFU instruction gets scheduled after the first use. This especially
matters after the next commit when we start forcibly breaking up long
sequences of texture instructions, since if we schedule a group of 8
texture instructions then we want to schedule the uses of those
instructions in parallel with the next 8 texture instructions to reduce
register pressure.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7571>
 2021-04-14 17:33:58 +00:00
Erik Faye-Lund
5362adf68d zink: verify that source-format support linear-filter 
Similar to the previous commit, we should also verify that the
source-format support linear-filter if we try to blit with it.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10234>
 2021-04-14 15:48:03 +00:00
Erik Faye-Lund
0ba3cf1f95 zink: verify that src/dst support blitting 
Some Vulkan-drivers don't support blitting between all formats and
layouts. So let's verify this while blitting, and fall back to the
normal rendering code-path instead.

This fixes a crash on start-up in OpenArena on V3DV.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10234>
 2021-04-14 15:48:03 +00:00