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Alyssa Rosenzweig 6dfd0998f2 pan/decode: Unify SFBD/MFBD decoding 
It's the same core logic. Unify and let GenXML do its thing.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:55 +00:00
Alyssa Rosenzweig e88b4949de pan/decode: Reorder MFBD decoding 
Eliminate some #ifdef by grouping v5 and v6 state separately.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:55 +00:00
Alyssa Rosenzweig 504022454c pan/decode: Simplify pandecode_fbd 
Remove unsued width/height properties, and use cleaner C syntax to build the
return value.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:55 +00:00
Alyssa Rosenzweig 9621df9637 pan/decode: Stop passing suffixes around 
Unused.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:55 +00:00
Alyssa Rosenzweig 42319c6b6d pan/decode: Stop passing job index around 
There are a lot of problems with passing job_index around:

* Almost entirely unused
* Not particularly helpful even when used
* Mostly ignored for Valhall already
* Doesn't extend to CSF

It only really exists due to the early days of pandecode generating valid C code
as the trace format. With GenXML instead, that's not applicable.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:55 +00:00
Alyssa Rosenzweig 3298ac4b12 pan/decode: Remove pandecode_msg 
It hasn't had a consistent semantic meaning since we've switched decoding over
to GenXML.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:55 +00:00
Alyssa Rosenzweig c4c3f246fe pan/decode: Don't pass around memory handles 
The hardware doesn't care what BO a given buffer resides in, only what GPU
address it's at. It's simpler to fetch from a GPU address, rather than the pair
of a GPU address and a backing allocation. This cleans up a lot of cruft in
pandecode.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:55 +00:00
Mark Collins f649233896 tu: Implement VK_EXT_non_seamless_cube_map 
Passes CTS tests: dEQP-VK.texture.*non_seamless_*

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18079>
 2022-08-17 16:56:54 +00:00
Friedrich Vock adb4934d59 radv/winsys: Return VK_ERROR_INVALID_EXTERNAL_HANDLE if buffer imports fail 
Section 11.2.6 of the Vulkan spec states:
"Importing memory from a particular host pointer may not be possible due to
 additional platform-specific restrictions beyond the scope of this
 specification in which case the implementation must fail the memory
 import operation with the error code VK_ERROR_INVALID_EXTERNAL_HANDLE_KHR."

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17995>
 2022-08-17 11:22:11 +00:00
Pierre-Eric Pelloux-Prayer fddb4eda2f radeonsi: prevent u_blitter recursion in si_update_ps_colorbuf0_slot 
When u_blitter calls util_blitter_restore_fragment_states we may
end up in si_update_ps_colorbuf0_slot.
This commit makes sure we don't call u_blitter from there.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6921
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17981>
 2022-08-17 12:03:46 +02:00
Samuel Pitoiset 6b91ca7ce0 radv: add a very initial implementation of VK_EXT_graphics_pipeline_library 
This experimental and very suboptimal implementation of graphics
pipeline library shouldn't be used by anyone, except for development
purposes. It's still under active development from my side. This
extension is only exposed via RADV_PERFTEST=gpl anyways.

It's very suboptimal because RADV doesn't yet support PS epilogs and
VS prologs need to be improved/reworked because GPL changed the logic
(eg. can't know the next stage when compiling a prolog). So, currently
the driver ALWAYS retains NIR shaders during libs creation and it links
and compiles in the final pipeline.

I have WIP branches for approximately everything but it looks simpler
to start merging an initial implementation in order to improve steps
by steps from main. This commit might look simple and short but I
already merged TON of preliminary work. RADV was definitely not ready
for GPL and it's still not completely fine. Expect refactoring again.

This implementation currently pass
dEQP-VK.pipeline.pipeline_library.* on NAVI21, except few feedback
creation tests due to CTS bugs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
 2022-08-17 09:37:43 +02:00
Samuel Pitoiset 390a1bbdb3 radv: prevent accessing rasterization state when it's NULL 
It might be NULL for gfx pipeline libs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
 2022-08-17 09:34:58 +02:00
Samuel Pitoiset d8af521add radv: store vk_graphics_pipeline_state to radv_graphics_pipeline 
For gfx pipeline libraries we would have to keep track of the gfx
state, so change how it's allocated.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
 2022-08-17 09:34:57 +02:00
Samuel Pitoiset bb6ec3067d radv: introduce a new pipeline type for graphics libs 
It currently inherits from radv_graphics_pipeline because it's simpler
but I think it could be improved because most of fields won't be useful
for libs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
 2022-08-17 09:34:57 +02:00
Samuel Pitoiset 075a35e0ad radv: add radv_graphics_pipeline_import_info() helper 
It also initializes dynamic states and active stages. It will also be
used when creating a graphics pipeline library.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
 2022-08-17 09:34:57 +02:00
Samuel Pitoiset a5f3a21261 radv: remove unused pCreateInfo from radv_pipeline_init_blend_state() 
I missed this one last time.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
 2022-08-17 09:34:57 +02:00
Danylo Piliaiev c45fded26b tu: Disable LRZ write when alpha-to-coverage is enabled 
Alpha-to-coverage acts like discard and happens after FS ends,
so like with discard LRZ write should be disabled.
With discard we don't know at the moment of binning whether
fragment would be not discarded, so we cannot write its depth to LRZ.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6876

Cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18083>
 2022-08-17 05:21:46 +00:00
Matt Turner 59dca6f6e1 intel/tools: Also look for 'batch' tag 
This changed in the kernel at some point, but I'm not sure when.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18087>
 2022-08-17 02:24:09 +00:00
Yusuf Khan 73931afc60 tu: remove tu_syncobj_to_fd 
It isnt used anymore, last used in tu_wsi_display.c which doesnt
exist anymore.

Signed-off-by: Yusuf Khan <yusisamerican@gmail.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17927>
 2022-08-17 02:01:39 +00:00
Kenneth Graunke 781f5fc499 iris: Clean up iris_sample_with_depth_aux() 
The majority of the logic here was for the Gfx8-9 sample-from-hiz
hardware feature, which only applies to AUX_USAGE_HIZ, and neither
of the combined HiZ+CCS modes.  So, reorganize the function to put
the logic for each case in the case itself.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4674>
 2022-08-17 01:20:25 +00:00
Kenneth Graunke bf93229c85 iris: Always retain ISL_AUX_USAGE_HIZ_CCS_WT in texture aux usage 
When using HIZ_CCS_WT, we always want to use that for texturing so that
we're able to sample from the CCS buffer, which will have the latest
data due to the write-through mode.

With the previous commit in place, HiZ now exists for all miplevels
on platforms which support HIZ_CCS_WT, so we no longer need the
per-miplevel checks.

The other restrictions in this function only apply to the Gfx8-9 feature
where the sampler directly supported reading from HiZ itself, which was
removed.  Hardware where HiZ and CCS can be used together doesn't have
that feature nor its restrictions.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4952
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4674>
 2022-08-17 01:20:25 +00:00
Kenneth Graunke d70b76ea71 iris: Enable HiZ for non-8x4 aligned miplevels on Icelake and later 
8x4 alignment was absolutely required prior to Gfx8, and while some
things were relaxed on Gfx8-9, Nanley's experiments in issue #3788
indicated that there were still issues on those platforms.

It appears that the restrictions were relaxed on Icelake and
non-8x4 aligned HiZ "should" work on Gfx11+.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4674>
 2022-08-17 01:20:25 +00:00
Kenneth Graunke fe0152e216 iris: Pass devinfo to iris_resource_level_has_hiz() 
This will let us enforce 8x4 alignment rules differently based on the
specific hardware generation in question.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4674>
 2022-08-17 01:20:25 +00:00
Emma Anholt 8116839db9 ir3: Suppress disasm of internal shaders unless IR3_SHADER_DEBUG=internal. 
When you're debugging some deqp test or app, it's irritating to page
through 8 MRT clear shaders in turnip to get to what you're looking for.
Use the info.internal flag to suppress those shaders.  (but if you want to
IR3_SHADER_DEBUG=internal, then yeah, print them all).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18002>
 2022-08-17 00:04:08 +00:00
Dave Airlie ad274ba889 nir_to_tgsi_info: drop const_buffers_declared 
Drivers don't use this, so avoid the assert it could have.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18042>
 2022-08-17 05:48:49 +10:00
Friedrich Vock 50238f4958 amd/common: Remove redundant code for determining memory ops per clock 
Fixes: 82fd379d9e ("amd/common: move ac_memory_ops_per_clock into ac_gpu_info.h")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18038>
 2022-08-16 19:06:21 +00:00
Sonny Jiang 4291e545d5 radeonsi/vcn: add decode support for gfx1101 and gfx1103 
Add decode support for gfx1101 and gfx1103

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18063>
 2022-08-16 18:47:50 +00:00
José Roberto de Souza c5f03288f0 anv: Free vmas in case device creation fails in pthread_mutex_init(&device->mutex 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17961>
 2022-08-16 18:11:58 +00:00
José Roberto de Souza e5923bbdc0 anv: Remove anv_app_info 
Dead-code not used anywhere.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17961>
 2022-08-16 18:11:58 +00:00
José Roberto de Souza d5e5a1a734 anv: Remove duplicated memset() in physical device creation 
device is allocated with vk_zalloc() that zeroes the allocated memory.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17961>
 2022-08-16 18:11:58 +00:00
José Roberto de Souza f3b15143d2 intel: Simply intel_gem_create_context_engines() 
We can use I915_DEFINE_CONTEXT_PARAM_ENGINES() to simply the filling
of engines_param.

As some compilers might not support VLA, defining struct with 64
engines, the maximum that i915 API supports.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17961>
 2022-08-16 18:11:58 +00:00
Mike Blumenkrantz cf7c17a7af zink: rework descriptor pool overflow 
previously this would just destroy and recreate pools, but it's much
smarter to instead store the pools and just reuse them when needed

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18065>
 2022-08-16 17:55:47 +00:00
Mike Blumenkrantz fb9f110113 zink: use a single allocation for zink_descriptor_layout_key 
this is slightly more smart

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18065>
 2022-08-16 17:55:47 +00:00
Mike Blumenkrantz 234620d8ab zink: use a dynarray instead of hash table for tracking pools 
this may use a little more memory, but having direct access to the pool
without needing a lookup in a (potentially big) hash table is definitely
worth it

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18065>
 2022-08-16 17:55:47 +00:00
Mike Blumenkrantz 33a1bffa94 zink: add an id member for zink_descriptor_pool_key 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18065>
 2022-08-16 17:55:47 +00:00
Mike Blumenkrantz 13d4fda841 zink: require VK_KHR_descriptor_update_template 
it's been long enough, and there's no technical reason why drivers
shouldn't have this implemented

ZINK_DESCRIPTORS environment variable is preserved for future use

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18065>
 2022-08-16 17:55:47 +00:00
Rhys Perry f7d02a9b5e aco: test for one and_savexec opcode in try_optimize_branching_sequence 
A situation where it doesn't match is probably not possible, so this
probably doesn't fix anything.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18077>
 2022-08-16 17:31:33 +00:00
Rhys Perry 2587e75ee1 aco: improve vcc check for instructions between exec_val and exec_copy 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18077>
 2022-08-16 17:31:33 +00:00
Rhys Perry faf8038254 aco: remove val_and_copy_adjacent 
If this is true, then the only instruction the loops visit is
p_logical_end and the loops are no-ops.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18077>
 2022-08-16 17:31:33 +00:00
Rhys Perry cfb306b4e4 aco: test branch opcode if removing it in try_optimize_branching_sequence 
We shouldn't remove a p_cbranch_nz branch in this situation.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: b731be2e96 ("aco: Remove branch instruction when exec is constant non-zero.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18077>
 2022-08-16 17:31:33 +00:00
Rhys Perry 21cb002b60 aco: fix re-write of uses of exec_val's lo/hi half 
The isConstant() check isn't useful. If it's a constant, then the
physReg() check will fail.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: baab6f18c9 ("aco: Optimize branching sequence during SSA elimination.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18077>
 2022-08-16 17:31:33 +00:00
Rhys Perry dd105f7c1e aco: fix assembly of vopc_sdwa writing exec 
We would assemble an instruction writing vcc instead.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 5ffc73896f ("aco/assembler: Fix v_cmpx with SDWA.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18077>
 2022-08-16 17:31:33 +00:00
Rhys Perry f60cb8d0af aco: rename is_cmp to is_fp_cmp 
The old name is no longer accurate.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18077>
 2022-08-16 17:31:33 +00:00
Rhys Perry e493aab3c3 aco: fix consecutive exec writes when finding exec_copy instruction 
This can happen with transitions to exact:
 s2: %0:exec = p_parallelcopy %622:s[0-1]
 s2: %625:s[0-1],  s1: %624:scc,  s2: %0:exec = s_and_saveexec_b64 %141:vcc, %0:exec
 s2: %626:s[12-13] = p_cbranch_z %0:exec BB2, BB1

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 410eff4d2f ("aco: Fix optimizing branching sequence with s_and_saveexec.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18077>
 2022-08-16 17:31:33 +00:00
Eric Engestrom c50493974e ci: rename GitHub CI workflow from ci to macos to be a bit more explicit about what it covers 
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Yurii Kolesnykov <root@yurikoles.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18057>
 2022-08-16 16:54:13 +00:00
Rajnesh Kanwal 74fc367127 pvr: Implement vkResetDescriptorPool API. 
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18060>
 2022-08-16 11:32:47 +00:00
Rhys Perry bc1382eed9 docs/radv: advertise VK_KHR_global_priority 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18078>
 2022-08-16 11:26:48 +00:00
Joshua Ashton 9e20977f18 radv: Remove workarounds for D3D9 feedback loops 
RADV supports VK_EXT_attachment_feedback_loop_layout now,
and DXVK is using since 63d582a6e7ab63e18503d1238101705a818f5ad0 which
will be in DXVK 2.0, so no need for these anymore.

Older versions of DXVK will still be affected by the issue however.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17920>
 2022-08-16 10:34:26 +00:00
PixelyIon 5e8916c0bf tu: Make KGSL wait IOCTLs interrupt-safe 
`tu_WaitForFences` and `tu_GetFenceStatus` ended up using `ioctl` instead of
`safe_ioctl` and as a result were responsible for handling `EAGAIN`/`EINTR`
but they weren't handled correctly in wait calls which led to dropping the
wait if the thread received a signal without automatic syscall restarting on
release builds and an assertion due to `errorno` being `EINTR` on debug
builds.

This fixes early wait returns which would lead to UB or cause crashes due to
hitting debug assertions in Skyline Emulator.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18031>
 2022-08-16 10:06:32 +00:00
Samuel Pitoiset dd34f13414 radv: advertise VK_KHR_global_priority 
Similar to VK_KHR_buffer_device_address which has also been promoted
from EXT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18061>
 2022-08-16 09:13:42 +00:00