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5913 Commits

Author SHA1 Message Date
Marek Olšák
f5f0c012ad gallium/util: remove empty file u_half.h 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6987>
 2020-10-06 21:07:11 -04:00
Marek Olšák
71697953ec gallium/util: remove redundant util_float_to_half_rtz 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6987>
 2020-10-06 21:07:09 -04:00
Mike Blumenkrantz
3b11b37a1b radv: remove VkPipelineCacheCreateInfo::flags assert 
flags are handled, so this just crashes for no reason

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7030>
 2020-10-06 15:12:35 +00:00
Samuel Pitoiset
f984654da8 ac/nir,radv: fix invalid IR when loading inline uniform blocks 
Fixes dEQP-VK.binding_model.descriptorset_random.* and
dEQP-VK.binding_model.descriptor_copy.*.

Fixes: 05b6612b4e ("radv: do not lower UBO/SSBO access to offsets")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6977>
 2020-10-05 14:06:16 +02:00
Samuel Pitoiset
9badadf67e radv: remove dead deref code in the shader info pass 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6931>
 2020-10-05 13:14:37 +02:00
Samuel Pitoiset
bc099b834f radv: remove unused gs.writes_memory in the shader info pass 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6931>
 2020-10-05 13:14:35 +02:00
Samuel Pitoiset
9896337d1b ac,radv,radeonsi: remove unused parameters in the shader ABI IO 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6931>
 2020-10-05 13:14:33 +02:00
Samuel Pitoiset
e3296e05ae ac/nir: remove dead shader IO code 
RADV/LLVM and RadeonSI now lower IO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6931>
 2020-10-05 13:14:29 +02:00
Samuel Pitoiset
456f63e0ba ac/nir: remove dead global load/store/atomic derefs code 
RADV/LLVM now lowers global operations and RadeonSI doesn't use that.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6931>
 2020-10-05 13:14:25 +02:00
Samuel Pitoiset
6b0695c42a radv/llvm: enable lower_unpack_half_2x16 
To match ACO.

fossils-db (Navi10):
Totals from 294 (0.22% of 136420) affected shaders:
SGPRs: 16504 -> 16496 (-0.05%)
VGPRs: 19008 -> 19124 (+0.61%); split: -0.06%, +0.67%
SpillVGPRs: 511 -> 476 (-6.85%); split: -7.63%, +0.78%
CodeSize: 1688852 -> 1687932 (-0.05%); split: -0.10%, +0.05%
Scratch: 305152 -> 307200 (+0.67%)
MaxWaves: 2877 -> 2878 (+0.03%)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6937>
 2020-10-05 12:42:42 +02:00
Samuel Pitoiset
f11d4f3127 ac/llvm: implement nir_op_unpack_half_2x16_split_{x,y} 
nir_unpack_half_2x16_split_{x,y}_flush_to_zero don't have to be
implemented because RADV/LLVM doesn't allow flushing denorms
for 16-bit floating point.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6937>
 2020-10-05 12:42:40 +02:00
Samuel Pitoiset
cdf6d93498 radv/llvm: lower VS IO 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6912>
 2020-10-05 08:06:12 +00:00
Samuel Pitoiset
b3402997a5 radv/llvm: gather VS input usage mask from load_input 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6912>
 2020-10-05 08:06:12 +00:00
Samuel Pitoiset
1c4a21328e radv/llvm: lower TCS IO 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6912>
 2020-10-05 08:06:12 +00:00
Samuel Pitoiset
80cefee0f7 radv/llvm: gather TCS outputs from the output variables 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6912>
 2020-10-05 08:06:12 +00:00
Samuel Pitoiset
9615273907 radv/llvm: lower TES IO 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6912>
 2020-10-05 08:06:12 +00:00
Samuel Pitoiset
6e339418a7 radv/llvm: lower GS IO 
The LLVM bakend expects 64-bit IO to be lowered to 32-bit but
it's unclear if we want to do that for ACO at this point.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6912>
 2020-10-05 08:06:12 +00:00
Samuel Pitoiset
ed55bc4af2 radv/llvm: assign driver locations for VS, TCS, TES and GS correctly 
RADV/LLVM doesn't use assigned IO locations (yet).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6912>
 2020-10-05 08:06:12 +00:00
Samuel Pitoiset
1ea48c1f57 ac/nir: remove dead load/store deref code for temporary variables 
They should have been lowered before reaching the backend.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6984>
 2020-10-05 08:33:00 +02:00
Samuel Pitoiset
7a8f5eab71 ac/llvm: adjust dmask when image stores are shrinked using the format 
It looks like GFX10 doesn't care about dmask if it's greater than
the number of components stored but it matters on GFX8-9 (I haven't
checked older gens).

Fixes: 1b4d968106 ("ac/llvm: fix invalid IR if image stores are shrinked using the format")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6982>
 2020-10-05 08:13:24 +02:00
Vinson Lee
7e862670ef radv: Fix asserts using assign instead of compare. 
Fix defects reported by Coverity Scan.

Assign instead of compare (PW.ASSIGN_WHERE_COMPARE_MEANT)
assign_where_compare_meant: use of "=" where "==" may have been
intended

Fixes: d8cdcd4adf ("radv: use syncobj for wsi fence")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6902>
 2020-10-03 01:04:28 +00:00
Eric Anholt
6f3352b6a7 driconf: Stop quoting true/false in boolean option definitions. 
Now that we're not trying to evade preprocessor macro expansion in
preprocessor string concatenation, we can use plain old bools in option
setup.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6916>
 2020-10-02 23:59:52 +00:00
Eric Anholt
8a05d6ffc6 driconf: Make the driver's declarations be structs instead of XML. 
We can generate the XML if anybody actually queries it, but this reduces
the amount of work in driver setup and means that we'll be able to support
driconf option queries on Android without libexpat.

This updates the driconf interface struct version for i965, i915, and
radeon to use the new getXml entrypoint to call the on-demand xml
generation.  Note that our loaders (egl, glx) implement the v2 function
interface and don't use .xml when that's set, and the X server doesn't use
this interface at all.

XML generation tested on iris and i965 using adriconf

Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6916>
 2020-10-02 23:59:52 +00:00
Bas Nieuwenhuizen
7568c97df1 radv: Use atomics to read query results. 
The volatile pattern gives me flaky results for 32-bit builds on
ChromeOS Android. This is because on 32-bit the volatile 64-bit
loads gets split into 2 32-bit loads each.

So if we read the lower dword first and then the upper dword, it
can happen that the upper dword is already changed but the lower
dword isn't yet. In particular for occlusion queries this gives
false readings, as the upper dword commonly only constains the
ready bit.

With the GCC atomic intrinsics we get a call to __atomic_load_8
in libatomic.so which does the right thing.

An alternative fix would be to  explicitly split the 32-bit loads
in the right order and do a bunch of retries if things change, though
that gets messy quickly and for 32-bit builds only doesn't feel worth
it that much.

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6933>
 2020-10-02 16:16:27 +00:00
Samuel Pitoiset
18fd6274b2 aco/tests: add disassembler tests to reproduce the add3+clamp crash 
Like some other v_add instructions, LLVM fails to disassemble
v_add3_u32 + clamp.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6961>
 2020-10-02 14:21:33 +02:00
Samuel Pitoiset
01704dd1a4 aco: apply the clamped integer addition disassembly workaround for v_add3 
LLVM fails to disassemble v_add3 + clamp.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3563
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6961>
 2020-10-02 14:21:31 +02:00
Rhys Perry
37c1b9c54b aco: fix get_buffer_resource_flags() 
Looks like a rebase error. After switching to derefs, we have to look
through a nir_op_mov.

fossil-db (Navi):
Totals from 846 (0.62% of 137413) affected shaders:
SGPRs: 36856 -> 44144 (+19.77%); split: -0.20%, +19.97%
VGPRs: 35968 -> 27852 (-22.56%); split: -22.64%, +0.08%
SpillSGPRs: 1366 -> 1662 (+21.67%); split: -0.95%, +22.62%
SpillVGPRs: 1909 -> 1893 (-0.84%)
CodeSize: 5209588 -> 5146536 (-1.21%); split: -1.89%, +0.68%
Scratch: 221184 -> 217088 (-1.85%)
MaxWaves: 11488 -> 14266 (+24.18%); split: +24.20%, -0.02%
Instrs: 994831 -> 974318 (-2.06%); split: -2.53%, +0.47%
Cycles: 45719692 -> 45843260 (+0.27%); split: -0.99%, +1.26%
VMEM: 147562 -> 94468 (-35.98%); split: +9.75%, -45.74%
SMEM: 32122 -> 66023 (+105.54%); split: +120.34%, -14.80%
VClause: 41051 -> 20565 (-49.90%); split: -50.00%, +0.09%
SClause: 18076 -> 40142 (+122.07%)
Copies: 100092 -> 103521 (+3.43%); split: -0.98%, +4.40%
Branches: 51244 -> 51533 (+0.56%); split: -0.02%, +0.58%
PreSGPRs: 32290 -> 34267 (+6.12%)
PreVGPRs: 27458 -> 25290 (-7.90%); split: -7.91%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 05b6612b4e ('radv: do not lower UBO/SSBO access to offsets')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6966>
 2020-10-02 10:21:34 +00:00
Matt Turner
1aac47db69 Revert F16C series (MR 6774) 
This reverts commit 4fb2eddfdf.
This reverts commit 7a1deb16f8.
This reverts commit 2b6a172343.
This reverts commit 5af81393e4.
This reverts commit 87900afe5b.

A couple of problems were discovered after this series was merged that
cause breakage in different configurations:

   (1) It seems that using -mf16c also enables AVX, leading to SIGILL on
   platforms that do not support AVX.
   (2) Since clang only warns about unknown flags, and as I understand
   it Meson's handling in cc.has_argument() is broken, the F16C code is
   wrongly enabled when clang is used, even for example on ARM, leading
   to a compilation error.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3583
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6969>
 2020-10-01 21:08:12 +00:00
Samuel Pitoiset
df63491594 radv/aco: lower IO for all stages outside of ACO 
Lowering IO for VS, TCS, TES and GS still have to be done for LLVM.

No fossils-db change on NAVI10.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6897>
 2020-10-01 14:58:25 +00:00
Samuel Pitoiset
2c322514f3 radv: gather output usage mask from store_output for VS, TES and GS 
IO are now lowered before the shader info pass is called and the
output usage masks have to be gathered from store_output instead.

This is currently only used by ACO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6897>
 2020-10-01 14:58:25 +00:00
Samuel Pitoiset
b00a023f1e ac/nir: fix nir_intrinsic_shared_atomic_fadd 
This was completely broken.

Fixes dEQP-VK.glsl.atomic_operations.add_float32_compute_shared.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6936>
 2020-10-01 06:38:42 +00:00
Samuel Pitoiset
8227b08c08 ac/llvm: fix invalid use of unreachable in ac_build_atomic_rmw() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6936>
 2020-10-01 06:38:42 +00:00
Samuel Pitoiset
892e74d2f7 radv: fix gathering writes_memory for global store/atomic operations 
Because global operations are lowered before the shader info pass now
we have to adjust the gathering code.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3578
Fixes: 1588644543 ("radv: lower deref operations for global memory for both backends")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6934>
 2020-10-01 08:14:18 +02:00
Eric Anholt
618556a8cb nir: Drop the high_offset argument to the load_store_vectorizer filter. 
Nothing uses it, and it's not clear to me what it provides over
alignment/num_components/bit_size.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6612>
 2020-09-30 19:53:43 +00:00
Eric Anholt
5f757bb95c nir: Make the load_store_vectorizer provide align_mul + align_offset. 
It was passing an encoding of the two that wasn't good for ensuring "Don't
combine loads that would make us straddle a vec4 boundary" for
nir_lower_ubo_vec4.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6612>
 2020-09-30 19:53:43 +00:00
Marek Olšák
4fb2eddfdf gallium/util: remove empty file u_half.h 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6774>
 2020-09-30 16:28:24 +00:00
Marek Olšák
7a1deb16f8 gallium/util: remove redundant util_float_to_half_rtz 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6774>
 2020-09-30 16:28:24 +00:00
Connor Abbott
f504eb683d radv: Use nir control flow insertion helpers 
v2 (Jason Ekstrand):
 - Rebased and tweaked a few cases
 - Use the helpers in build_timestamp_query_shader

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6866>
 2020-09-30 15:47:51 +00:00
Jason Ekstrand
d3fa7451a6 anv,radv,tu,val: Call nir_lower_io for push constants 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5275>
 2020-09-30 07:20:39 +00:00
Bas Nieuwenhuizen
24f19f409d radv: Write correct dispatch size for RGP. 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6875>
 2020-09-29 20:14:40 +00:00
Samuel Pitoiset
291cfb1e41 radv: move lowering of FS outputs outside of ACO 
This enables lowering of FS outputs for RADV/LLVM.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6865>
 2020-09-29 14:44:05 +00:00
Samuel Pitoiset
4dae9e53f6 radv: call nir_io_add_const_offset_to_base for FS outputs 
The store_output of RADV/LLVM expects the const offset to be 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6865>
 2020-09-29 14:44:05 +00:00
Timur Kristóf
85074ec5f6 radv/aco: Set I/O variable locations outside ACO. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6865>
 2020-09-29 14:44:05 +00:00
Samuel Pitoiset
778fe02f3b radv/llvm: call nir_lower_io_to_vector with FS to fix array tests 
Fixes dEQP-VK.glsl.440.linkage.varying.component.frag_out.*.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6883>
 2020-09-29 10:00:50 +00:00
Samuel Pitoiset
1b4d968106 ac/llvm: fix invalid IR if image stores are shrinked using the format 
It's not always v4f32 (or v4f16 for 16-bit) when image stores are
shrinked using the format.

This fixes a ton of crashes with RADV_DEBUG=checkir,llvm.

Fixes: e4d75c22be ("nir/opt_shrink_vectors: shrink image stores using the format")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6882>
 2020-09-29 07:40:42 +00:00
Samuel Pitoiset
1588644543 radv: lower deref operations for global memory for both backends 
To match ACO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5316>
 2020-09-29 07:24:35 +00:00
Samuel Pitoiset
10b73e2b52 ac/nir: implement nir_intrinsic_global_atomic_* 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5316>
 2020-09-29 07:24:35 +00:00
Samuel Pitoiset
82cf607557 ac/nir: implement nir_intrinsic_{load,store}_global 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5316>
 2020-09-29 07:24:35 +00:00
Vinson Lee
70945dd362 aco: Initialize mad_info member literal_idx. 
Fix defect reported by Coverity Scan.

Uninitialized scalar field (UNINIT_CTOR)
uninit_member: Non-static class member literal_idx is not initialized in
this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6832>
 2020-09-28 22:50:58 +00:00
Bas Nieuwenhuizen
78165ea3e2 radv: Record cache flushes for RGP. 
Not doing the EOP TS cacheflush event because that break wave counting
in RGP for some reason. But the rest looks to be all there.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6550>
 2020-09-28 15:46:08 +00:00