63db31fdfc
amd/common: Add total alignment calculation.
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194 >
2020-06-05 13:27:55 +00:00
ffae3589c9
radv: Rely on ac_surface for avoiding cmask for linear images.
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194 >
2020-06-05 13:27:55 +00:00
b5488a863c
radv: Enforce the contiguous memory for DCC layers in ac_surface.
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194 >
2020-06-05 13:27:55 +00:00
b351a50763
radeonsi: Define gfx10_format in the common header.
...
So we don't have to have multiple definitions of the struct when
sharing with radv.
While at it put the table properly in a C file so we don't have to
deal with multiple definitions, and the struct definition isn't
in generated source.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291 >
2020-06-03 00:17:00 +00:00
c98e52f88a
amd/common,radeonsi: Move gfx10_format_table to common.
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291 >
2020-06-03 00:17:00 +00:00
116ec85012
ac: rename has_double_rate_fp16 -> has_packed_math_16bit
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5003 >
2020-06-02 16:29:25 -04:00
a8e2d79e02
meson: use gnu_symbol_visibility argument
...
This uses a meson builtin to handle -fvisibility=hidden. This is nice
because we don't need to track which languages are used, if C++ is
suddenly added meson just does the right thing.
Acked-by: Matt Turner <mattst88@gmail.com >
Reviewed-by: Eric Engestrom <eric@engestrom.ch >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740 >
2020-06-01 18:59:18 +00:00
a91306677c
ac/gpu_info: Correct Acturus cu bitmap
...
The cu bitmap in amd gpu info structure is
4x4 size array, and it's usually suitable for Vega
ASICs which has 4*2 SE/SH layout.
But for Arcturus, SE/SH layout is changed to 8*1.
To mostly reduce the impact, we make it compatible
with current bitmap array as below:
SE4,SH0 --> cu_bitmap[0][1]
SE5,SH0 --> cu_bitmap[1][1]
SE6,SH0 --> cu_bitmap[2][1]
SE7,SH0 --> cu_bitmap[3][1]
Signed-off-by: James Zhu <James.Zhu@amd.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5212 >
2020-05-27 10:49:02 -04:00
2cf46f2e3d
ac/gpu_info: replace num_good_cu_per_sh with min/max_good_cu_per_sa
...
Perf counters use the new max number.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5184 >
2020-05-26 06:00:54 -04:00
3509d3bd53
ac: update register and packet definitions for preemption
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095 >
2020-05-23 03:45:07 -04:00
8db739880a
ac/surface: don't compute single-sample CMASK if it's unaligned
...
Displayable DCC can cause this and fail the assertion later.
Fixes: cf61f635ffbas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095 >
2020-05-23 03:44:44 -04:00
21504eab78
ac/gpu_info: compute the best safe IB alignment
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095 >
2020-05-23 03:44:44 -04:00
9c839e6394
amd/common: Fix incorrect use of asprintf instead of vasprintf
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
2020-05-11 12:54:41 +02:00
506f5d9bda
ac/surface: remove shadowing declaration
...
Fixes: 7691de0dcehttps://gitlab.freedesktop.org/mesa/mesa/-/issues/2929
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4983 >
2020-05-11 08:15:15 +00:00
1a59590e5d
ac/surface: fix broken pitch override on gfx8
...
Fixes: 441eaef6a9Closes : #2920
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4968 >
2020-05-08 16:37:10 -04:00
c9e7362402
ac/surface: override all offsets including metadata offsets
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863 >
2020-05-07 20:13:41 +00:00
441eaef6a9
amd: unify code for overriding offset and stride for imported buffers
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863 >
2020-05-07 20:13:41 +00:00
c164ea86e1
ac/surface,radeonsi: move the set/get_umd_metadata code into ac_surface.c
...
The indentation is on purpose. The whole file will be reindented to this
code style some other time.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863 >
2020-05-07 20:13:41 +00:00
7691de0dce
ac/surface,radeonsi: move the set/get_bo_metadata code to ac_surface.c
...
The indentation is on purpose. The whole file will be reindented to this
code style some other time.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863 >
2020-05-07 20:13:41 +00:00
56e37374dd
amd: assume HTILE is always rb/pipe_aligned, remove ac_surface.u.gfx9.htile
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863 >
2020-05-07 20:13:41 +00:00
cf61f635ff
amd: assume CMASK is always rb/pipe_aligned, remove ac_surface.u.gfx9.cmask
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863 >
2020-05-07 20:13:41 +00:00
345b8aed5c
ac/surface: unset RADEON_SURF_TC_COMPATIBLE_HTILE if HTILE hasn't been computed
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4866 >
2020-05-05 16:27:29 +00:00
c4cdef64ad
ac/surface: fix MSAA crash with FORCE_SWIZZLE_MODE on gfx9
...
Fixes: 3dc2ccc14cCloses : #2884
Tested-by: Michel Dänzer <mdaenzer@redhat.com >
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4862 >
2020-05-04 20:03:15 +00:00
f1a40a26a9
Revert "ac/surface: remove RADEON_SURF_TC_COMPATIBLE_HTILE and assume it's always set"
...
This reverts commit f6d87ec8a9f6d87ec8a9https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4864 >
2020-05-02 20:12:38 +00:00
d6acdbd935
radeonsi: implement and use compute-based DCC decompression on gfx9-10
...
DCC_DECOMPRESS doesn't work. Instead of trying to figure out why,
use a compute blit where the load is compressed and the store is
uncompressed.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761 >
2020-04-30 22:27:31 +00:00
22a4cb4937
ac: enable displayable DCC on Navi12 & Navi14
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697 >
2020-04-29 14:53:25 +00:00
3b45631d7a
ac/surface: validate that DCC is enabled correctly on gfx9+
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697 >
2020-04-29 14:53:25 +00:00
5e31e4b697
ac/surface: add code for gfx10 displayable DCC
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697 >
2020-04-29 14:53:25 +00:00
e2fbba7720
ac/surface: move non-displayable DCC to the end of the buffer
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697 >
2020-04-29 14:53:25 +00:00
a3dc7fffbb
ac/surface: don't compute DCC if it's unsupported by DCN on gfx9+
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697 >
2020-04-29 14:53:25 +00:00
5d785f99b7
ac/surface: match get_display_flag() with expectations for is_displayable
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697 >
2020-04-29 14:53:25 +00:00
3dc2ccc14c
ac/surface: replace RADEON_SURF_OPTIMIZE_FOR_SPACE with !FORCE_SWIZZLE_MODE
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697 >
2020-04-29 14:53:25 +00:00
f6d87ec8a9
ac/surface: remove RADEON_SURF_TC_COMPATIBLE_HTILE and assume it's always set
...
So that drivers can enable it without worrying how the texture was
allocated.
v2: reworked the mechanism, hopefully fixes now
added Bas Nieuwenhuizen's diff to fix radv
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com > (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697 >
2020-04-29 14:53:25 +00:00
25d3cc293e
ac/surface: rename micro tile mode enums like gfx10 uses them
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697 >
2020-04-29 14:53:25 +00:00
531728d6cb
drm-uapi,radv,radeonsi: Add amdgpu_drm.h header.
...
Use it instead of the libdrm provided amdgpu_drm.h header. I used
the kernel revision from the README to get the header so the
header versions should be consistent.
Tested by removing /usr/include/libdrm/amdgpu_drm.h from my dev-machine.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4749 >
2020-04-27 12:27:02 +00:00
d8443b211e
ac: out-of-order rasterization is not supported on gfx10
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4698 >
2020-04-24 10:38:54 +00:00
a3113e07b9
ac,radv: add ac_gpu_info::has_double_rate_fp16
...
Only GFX9+ support double rate packed math instructions.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4453 >
2020-04-09 13:30:54 +02:00
79af30768d
meson: inline inc_common
...
Let's make it clear what includes are being added everywhere, so that
they can be cleaned up.
Signed-off-by: Eric Engestrom <eric@engestrom.ch >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360 >
2020-03-28 21:36:54 +01:00
56cc10bd27
ac: unify denorm setting enforcement
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4196 >
2020-03-17 20:47:48 +00:00
84f97a21a6
ac: disable late alloc on small gfx10 chips
...
same as PAL.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143 >
2020-03-12 17:27:23 +00:00
7ba5e94c50
ac: add radeon_info::use_late_alloc to control LATE_ALLOC globally
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143 >
2020-03-12 17:27:23 +00:00
b3ece36257
ac: add ac_gpu_info::cu_mask to store bitmask of compute units
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4023 >
2020-03-06 08:22:02 +00:00
46a8cab58b
ac: rename min_vgpr_alloc to min_wave64_vgpr_alloc
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975 >
2020-03-03 08:17:00 +01:00
33faef6a34
ac: rename vgpr_alloc_granularity to wave64_vgpr_alloc_granularity
...
And update the value.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975 >
2020-03-03 08:17:00 +01:00
9432eb3e9c
ac: rename lds_size_per_cu to lds_size_per_workgroup
...
It's more accurate.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975 >
2020-03-03 08:16:56 +01:00
3de4f6c9f0
ac: add more fields to ac_gpu_info
...
For RGP traces.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900 >
2020-02-28 08:10:37 +01:00
69aadc4933
radeonsi: fix surf_pitch for subsampled surface
...
gfx9.surf_pitch is supposed to be in blocks (or elements) but addrlib
returns a pitch in pixels.
This cause a mismatch between surface->bpe and surface.u.gfx9.surf_pitch.
For subsampled formats like uyvy (bpe is 2) this breaks in various places:
- sdma copy
- video rendering (see issue https://gitlab.freedesktop.org/mesa/mesa/issues/2363 )
when the vl_compositor_gfx_render method is used
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738 >
2020-02-27 10:01:31 +01:00
09d8726187
ac: add more ac_gpu_info related shader fields
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899 >
2020-02-26 07:58:47 +00:00
974c87e449
ac,radeonsi: add ac_gpu_info::lds_size_per_cu
...
Both RadeonSI and RADV use the WGP mode, so we can assume 128KB on
GFX10.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899 >
2020-02-26 07:58:47 +00:00
6f4c300919
ac/llvm: implement VK_AMD_shader_explicit_vertex_parameter
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3578 >
2020-01-29 09:49:50 +00:00
Bas Nieuwenhuizen