AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

ac: add more ac_gpu_info related shader fields

Browse Source 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
This commit is contained in:
Samuel Pitoiset
2020-02-20 09:19:44 +01:00
committed by Marge Bot
parent 974c87e449
commit 09d8726187
2 changed files with 33 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/common/ac_gpu_info.c
+26 -3
View File
@@ -666,14 +666,30 @@ bool ac_query_gpu_info(int fd, void *dev_p,
/* The number is per SIMD. There is enough SGPRs for the maximum number
* of Wave32, which is double the number for Wave64.
*/
if (info->chip_class >= GFX10)
if (info->chip_class >= GFX10) {
info->num_physical_sgprs_per_simd = 128 * info->max_wave64_per_simd * 2;
else if (info->chip_class >= GFX8)
info->min_sgpr_alloc = 128;
info->sgpr_alloc_granularity = 128;
} else if (info->chip_class >= GFX8) {
info->num_physical_sgprs_per_simd = 800;
else
info->min_sgpr_alloc = 16;
info->sgpr_alloc_granularity = 16;
} else {
info->num_physical_sgprs_per_simd = 512;
info->min_sgpr_alloc = 8;
info->sgpr_alloc_granularity = 8;
}
info->max_sgpr_alloc = info->family == CHIP_TONGA ||
info->family == CHIP_ICELAND ? 96 : 104;
info->min_vgpr_alloc = 4;
info->max_vgpr_alloc = 256;
info->vgpr_alloc_granularity = info->chip_class >= GFX10 ? 8 : 4;
info->num_physical_wave64_vgprs_per_simd = info->chip_class >= GFX10 ? 512 : 256;
info->num_simd_per_compute_unit = info->chip_class >= GFX10 ? 2 : 4;
return true;
}
@@ -821,6 +837,13 @@ void ac_print_gpu_info(struct radeon_info *info)
printf(" max_wave64_per_simd = %i\n", info->max_wave64_per_simd);
printf(" num_physical_sgprs_per_simd = %i\n", info->num_physical_sgprs_per_simd);
printf(" num_physical_wave64_vgprs_per_simd = %i\n", info->num_physical_wave64_vgprs_per_simd);
printf(" num_simd_per_compute_unit = %i\n", info->num_simd_per_compute_unit);
printf(" min_sgpr_alloc = %i\n", info->min_sgpr_alloc);
printf(" max_sgpr_alloc = %i\n", info->max_sgpr_alloc);
printf(" sgpr_alloc_granularity = %i\n", info->sgpr_alloc_granularity);
printf(" min_vgpr_alloc = %i\n", info->min_vgpr_alloc);
printf(" max_vgpr_alloc = %i\n", info->max_vgpr_alloc);
printf(" vgpr_alloc_granularity = %i\n", info->vgpr_alloc_granularity);
printf("Render backend info:\n");
printf(" pa_sc_tile_steering_override = 0x%x\n", info->pa_sc_tile_steering_override);
src/amd/common/ac_gpu_info.h
+7
View File
@@ -153,6 +153,13 @@ struct radeon_info {
uint32_t max_wave64_per_simd;
uint32_t num_physical_sgprs_per_simd;
uint32_t num_physical_wave64_vgprs_per_simd;
uint32_t num_simd_per_compute_unit;
uint32_t min_sgpr_alloc;
uint32_t max_sgpr_alloc;
uint32_t sgpr_alloc_granularity;
uint32_t min_vgpr_alloc;
uint32_t max_vgpr_alloc;
uint32_t vgpr_alloc_granularity;
/* Render backends (color + depth blocks). */
uint32_t r300_num_gb_pipes;