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13306 Commits

Author SHA1 Message Date
Timur Kristóf 614bb47cbf radv: Use const on vi_alpha_is_on_msb arguments. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25770>
 2023-10-19 14:35:00 +00:00
Timur Kristóf ff39212e28 radv: Use const device argument in radv_sdma_copy_buffer. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25770>
 2023-10-19 14:35:00 +00:00
Timur Kristóf 320e20db68 radv: Rename SDMA file to radv_sdma.c 
It already contains more than just the buffer image copies.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25770>
 2023-10-19 14:35:00 +00:00
Timur Kristóf d7f5ff402a ac: Add rudimentary implementation of printing SDMA IBs. 
This isn't meant to be exhaustive and only prints the packets
and fields which were interesting to me during debugging the
RADV transfer queue implementation.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25769>
 2023-10-18 16:29:01 +00:00
Timur Kristóf 90455ac864 ac: Print IP type for IBs. 
This makes it clearer what is what when reading IBs
for debugging purposes.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25769>
 2023-10-18 16:29:01 +00:00
Timur Kristóf 05d74265dc ac: Rename ac_do_parse_ib to parse_pkt3_ib. 
This function only parses PKT3 packets, not other types.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25769>
 2023-10-18 16:29:01 +00:00
Timur Kristóf dfcb8d4784 ac: Add amd_ip_type argument to ac_parse_ib and ac_parse_ib_chunk. 
The current parser only supports PKT3 packets, but not all HW IP
types use this format. This makes it possible to support more
than one format depending on the IP type.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25769>
 2023-10-18 16:29:01 +00:00
Timur Kristóf b44a616253 ac: Clarify SDMA opcode defines. 
Make the naming of these defines consistent with others.
And add a few new opcodes and related definitions.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25769>
 2023-10-18 16:29:01 +00:00
Timur Kristóf 375a14234f ac/gpu_info: Add some SDMA related information. 
SDMA only supports sparse resources on GFX9+.
SDMA only supports DCC and HTILE on GFX10+.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25769>
 2023-10-18 16:29:01 +00:00
Samuel Pitoiset ef0997baf1 ci: update CTS to vulkan-cts-1.3.7.0 
This contains many new tests, especially shader object tests.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25476>
 2023-10-18 12:52:37 +00:00
Konstantin Seurer b2cdbfc2ef radv/rt: Use nir_shader_instructions_pass for lower_rt_instructions 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25187>
 2023-10-18 08:18:50 +00:00
Marek Olšák 865cab6a1c ac/gpu_info: don't allow register shadowing with SR-IOV due to bad performance 
This is only for gfx11.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25484>
 2023-10-17 00:31:07 +00:00
Friedrich Vock f8eec4c4e3 radv/rt: Reject hits within 10ULP of previous hits in emulated RT 
This is an alternative workaround that fixes double hits on shared edges
failing some watertightness CTS tests.

Fixes: e034ba1c44 ("radv/rt: Miss rays that hit the triangle's v edge")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24093>
 2023-10-16 23:10:20 +00:00
Marek Olšák 5a5629f766 ac/gpu_info: set gfx and compute IB padding to only 8 dwords 
This is what the kernel reports and what PAL seems to be doing.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25578>
 2023-10-16 16:16:34 +00:00
Marek Olšák 395b7ce364 ac/gpu_info: conservatively decrease IB alignment and padding to 256B 
This should be large enough for all engines.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25578>
 2023-10-16 16:16:34 +00:00
Marek Olšák 42aedd627e ac/gpu_info: drop the hack unifying all IB alignments 
We overalign it anyway, so there is no change in behavior.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25578>
 2023-10-16 16:16:34 +00:00
Marek Olšák 5edc0da8ec ac/gpu_info: move ib_pad_dw_mask into ip[] 
No change in behavior.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25578>
 2023-10-16 16:16:34 +00:00
Marek Olšák e0813c5477 ac/gpu_info: split ib_alignment as ip[type].ib_alignment 
No change in behavior. The previous overalignment is preserved.

It sets ib_pad_dw_mask sooner.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25578>
 2023-10-16 16:16:33 +00:00
Chia-I Wu 567c32b55c radv, drirc: rename radv_require_{etc2,astc} 
Rename them to vk_require_{etc2,astc}.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
 2023-10-14 02:36:39 +00:00
Martin Roukala (né Peres) f5cf90fbea radv/ci: tighten the vkcts-navi21 timeouts 
The jobs should never take longer than 30 minutes, so let's enforce it!

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25704>
 2023-10-13 15:59:18 +00:00
Emma Anholt 534511935d ci/radeonsi: Drop an xfail for vangogh. 
It's passed in the last 3 nightly runs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25693>
 2023-10-13 01:12:59 +00:00
Samuel Pitoiset 1f77f52bbe radv: skip GDS allocation for NGG streamout on GFX11 
Only GDS OA is needed on GFX11.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25284>
 2023-10-12 16:58:22 +00:00
Samuel Pitoiset 2cc3288089 radv: mark GDS as needed for XFB queries with NGG streamout on GFX11 
This doesn't fix anything because gds_needed should already be TRUE
because it's initialized at pipeline bind time, but this will be needed
for skipping GDS allocation on GFX11.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25284>
 2023-10-12 16:58:22 +00:00
Samuel Pitoiset f0abdaea9f amd/llvm,aco,radv: implement NGG streamout with GDS_STRMOUT registers on GFX11 
According to RadeonSI, this is required for preemption, user queues,
and we only have to wait for VS after streamout which should be more
performant.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25284>
 2023-10-12 16:58:22 +00:00
Samuel Pitoiset 7397502a1f radv: disable primitive restart for non-indexed draws on GFX11 
Primitive restart is also applied to non-indexed draws on AMD GPUs. On
GFX11, DISABLE_FOR_AUTO_INDEX can be set but we will need a different
solution for older GPUs.

This fixes all line related flakes in CI (at least).

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25639>
 2023-10-12 06:33:40 +00:00
Yogesh Mohan Marimuthu f97b449e9e radv: integrate meta astc compute decoder to radv 
this patch calls the init and finish functions of the vk
runtime astc decoder. initializes emulate_astc flag. sets
up the additional plane to store decoded texture.

v2: fix _tex_dataformat() and _tex_numformat() (Chia-I Wu)
    use correct function for bufferToImage (Chia-I Wu)
v3: add radv_is_layout_emulated() (Chia-I Wu)
    avoid repeated pattern (Chia-I Wu)
v4: not create all pipelines on_demand (Chia-I Wu)
v5: current code does not support astc hdr (Chia-I Wu)
v6: keep luts in staging buffer only (Chia-I Wu)
v7: use 2DArray for both input and output
v8: document todo to use fp16 (Chia-I Wu)
    not required to move meta init anymore (Chia-I Wu)
    move astc_emulation_format to vk_texcompress_astc.h (Chia-I Wu)
v9: remove LAYOUT check (Chia-I Wu)
    check on iview->vk.view_format
    move setting tiled flags for astc (Chia-I Wu)
    remove is format emulated check in radv_is_storage_image* (Chia-I Wu)
    use LAYOUT_ASTC for if check (Chia-I Wu)
    no 1D support (Chia-I Wu)
    calculate start end offset in 2x blk size
v10: remove old wrong code (Chia-I Wu)
v11: use existing defined local format variable (Chia-I Wu)
     dst image layout is always VK_IMAGE_LAYOUT_GENERAL (Chia-I Wu)

Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24672>
 2023-10-11 19:28:40 +00:00
Yogesh Mohan Marimuthu 718b85a1f2 ac/surface: add astc block size to bpe_to_format() function 
v2: remove old comment (Chia-I Wu)
v3: add comment on matching BC3 and ASTC4x4 (Chia-I Wu)

Acked-by: : Chia-I Wu <olvaffe@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24672>
 2023-10-11 19:28:39 +00:00
David Rosca ff36024576 radeonsi/vcn: Add High Quality encoding preset for AV1 
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25564>
 2023-10-11 19:07:28 +00:00
Samuel Pitoiset 70de5d098b radv/ci: update list of flakes for STONEY 
These should have been fixed couple of weeks ago.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25656>
 2023-10-11 15:39:11 +00:00
Samuel Pitoiset 129d58e813 radv/ci: update list of flakes for VANGOGH 
This one is already skipped in radv-skips.txt.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25656>
 2023-10-11 15:39:11 +00:00
Samuel Pitoiset ede0502b4a radv/ci: update list of expected failures on RAVEN 
These have been fixed a while ago but I think only a subset of CTS
is used on RAVEN.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25656>
 2023-10-11 15:39:11 +00:00
Rhys Perry 15a3515d0b aco/tests: test that hazards are resolved at the end of shader parts 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25374>
 2023-10-11 15:14:04 +00:00
Rhys Perry 690cb0b211 aco: resolve all possible hazards at the end of shader parts 
fossil-db (vega10):
Totals from 1266 (2.01% of 63055) affected shaders:
Instrs: 707116 -> 708382 (+0.18%)
CodeSize: 3512452 -> 3517516 (+0.14%)
Latency: 6661724 -> 6666788 (+0.08%)
InvThroughput: 4393626 -> 4393904 (+0.01%); split: -0.00%, +0.01%

fossil-db (navi10):
Totals from 1305 (2.07% of 63015) affected shaders:
Instrs: 719699 -> 722009 (+0.32%)
CodeSize: 3650836 -> 3660076 (+0.25%)
Latency: 5691633 -> 5693933 (+0.04%)
InvThroughput: 1532010 -> 1532024 (+0.00%); split: -0.00%, +0.00%

fossil-db (navi31):
Totals from 1580 (1.99% of 79332) affected shaders:
Instrs: 1678242 -> 1679879 (+0.10%)
CodeSize: 8463464 -> 8470168 (+0.08%)
Latency: 14273661 -> 14275298 (+0.01%)
InvThroughput: 3668049 -> 3668080 (+0.00%); split: -0.00%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25374>
 2023-10-11 15:14:04 +00:00
Rhys Perry e4842c0270 aco: consider exec_hi in reads_exec() 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25374>
 2023-10-11 15:14:04 +00:00
Rhys Perry ed3ca5b781 aco: fix s_setreg hazards 
s_setreg doesn't have any definitions.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25374>
 2023-10-11 15:14:04 +00:00
Rhys Perry ce27875f09 aco: only mitigate VcmpxExecWARHazard when necessary 
fossil-db (navi10):
Totals from 5059 (8.03% of 63015) affected shaders:
Instrs: 7384947 -> 7351196 (-0.46%)
CodeSize: 39393180 -> 39299196 (-0.24%); split: -0.28%, +0.04%
Latency: 119683018 -> 119585224 (-0.08%); split: -0.08%, +0.00%
InvThroughput: 29647188 -> 29623895 (-0.08%); split: -0.08%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25374>
 2023-10-11 15:14:04 +00:00
Rhys Perry a73f76750b aco: fix LdsDirectVMEMHazard WaW with the wrong waitcnt 
Seems we missed this case.

fossil-db (navi31):
Totals from 24 (0.03% of 79332) affected shaders:
Instrs: 3562 -> 3538 (-0.67%)
CodeSize: 18740 -> 18644 (-0.51%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 2cdb3e4b6b ("aco: add VMEMtoScalarWriteHazard tests")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25374>
 2023-10-11 15:14:04 +00:00
Samuel Pitoiset 052d12492d ac/nir: only consider overflow for valid feedback buffers 
Otherwise the ordered operation above (ie. a GDS atomic return) might
return non-zero offsets for invalid buffers.

Fixes: f7076d129d ("amd: add nir_intrinsic_xfb_counter_sub_amd and fix overflowed streamout offsets")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25613>
 2023-10-10 15:47:54 +00:00
Samuel Pitoiset bbf135db3d radv: allocate only 1 GDS OA counter for gfx10 NGG streamout 
It works with just one counter.

This mitigates https://gitlab.freedesktop.org/drm/amd/-/issues/2902
quite a lot when you run dEQP-VK.transform_feedback.* in parallel on
more than 16 threads with RDNA3.

For example, on my GPU the kernel reports 16 GDS OA counters which means
that if you run VKCTS with 16 threads (ie. 16 Vulkan devices are
created) it's fine. Otherwise, the kernel might report ENOMEM.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25619>
 2023-10-10 15:12:26 +00:00
Samuel Pitoiset 7c7684c656 radv: fix destroying GDS/OA BOs 
Otherwise, we have dangling BO pointers in the global BO list. Not
quite sure why this hasn't been triggered before.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25623>
 2023-10-10 14:31:01 +00:00
David Heidelberg 5ab60581da ci/traces: keep images for every job except the performance testing 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8354

Acked-by: Emma Anholt <emma@anholt.net>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25606>
 2023-10-10 12:46:51 +00:00
Alyssa Rosenzweig c39896b17b nir: Use getters for nir_src::parent_* 
First, we need to give the parent_instr field a unique name to be able to
replace with a helper.  We have parent_instr fields for both nir_src and
nir_def, so let's rename nir_src::parent_instr in preparation for rework.

This was done with a combination of sed and manual fix-ups.

Then we use semantic patches plus manual fixups:

    @@
    expression s;
    @@

    -s->renamed_parent_instr
    +nir_src_parent_instr(s)

    @@
    expression s;
    @@

    -s.renamed_parent_instr
    +nir_src_parent_instr(&s)

    @@
    expression s;
    @@

    -s->parent_if
    +nir_src_parent_if(s)

    @@
    expression s;
    @@

    -s.renamed_parent_if
    +nir_src_parent_if(&s)

    @@
    expression s;
    @@

    -s->is_if
    +nir_src_is_if(s)

    @@
    expression s;
    @@

    -s.is_if
    +nir_src_is_if(&s)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24671>
 2023-10-10 04:58:05 -04:00
Samuel Pitoiset e1622dcca1 radv: fix IB alignment 
This re-introduces "radv: fix alignment of DGC command buffers" and
"radv/amdgpu: fix alignment of command buffers" which were valid
changes.

IBs need to be aligned to the IB size requirement, not the number of
padded NOPs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25588>
 2023-10-10 06:26:59 +00:00
Qiang Yu 5263a9e364 ac,radeonsi: remove unused ps prolog key fields 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24989>
 2023-10-10 11:10:20 +08:00
Qiang Yu 5ef7c54829 aco: wait memory ops done before go to next shader part 
Next part don't know whether p_end_with_regs args are loaded from
memory ops or not, need to wait it's done here.

Other memory load needs to be waited too like:
  a = load_mem()
  b = ...
  if (...) {
    wait_mem(a)
    store_mem(a)
  }
  p_end_with_regs(b)

"a" still needs to be waited, otherwise next shader part regs may
be overwritten by unfinished memory loads.

Memory stores are waited too. When >=gfx10 and last VGT has no
parameter export, we need to wait all memeory stores done before
pos export (see ac_nir_export_position). So when merged shader
(ES+GS or VS+GS) is partially built, first stage needs to wait
all memory stores done, otherwise second stage don't know if
any memory stores pending before.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Signe-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24973>
 2023-10-10 02:36:34 +00:00
Qiang Yu 5ba68f92b4 aco: create exit block for p_end_with_regs to branch to 
To handle ps discard in radeonsi part mode shader.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24973>
 2023-10-10 02:36:34 +00:00
Qiang Yu bf25a7f59b aco: fix assertion fail when program contains empty block 
radeonsi may generate empty main shader or an empty exit block
for p_end_with_regs to jump to.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24973>
 2023-10-10 02:36:34 +00:00
Qiang Yu 6eb0910d45 aco: do not fix_exports when program has epilog 
PS with epilog does not need to fix_exports. And radeonsi use
p_end_with_regs so does not have jump instruction at last.

radeonsi may also have exec restore instruction, so may break
before reach to p_end_with_regs.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24973>
 2023-10-10 02:36:34 +00:00
Qiang Yu f97a701d89 aco,radv,radeonsi: pass spi ps input ena and addr 
radeonsi may pass different ena and addr when part mode shader.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24973>
 2023-10-10 02:36:34 +00:00
Qiang Yu c9c18d3da5 aco: compact ps expilog color export for radeonsi 
radeonsi need to compact color export for ps epilog while radv does not.
radv will fill empty color slot, so won't affected by this change.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24973>
 2023-10-10 02:36:34 +00:00