ac/gpu_info: Add some SDMA related information.

SDMA only supports sparse resources on GFX9+.
SDMA only supports DCC and HTILE on GFX10+.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25769>
This commit is contained in:
Timur Kristóf
2023-09-25 14:27:45 +02:00
committed by Marge Bot
parent 37996c757f
commit 375a14234f
2 changed files with 9 additions and 0 deletions
+6
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@@ -1263,6 +1263,12 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
info->register_shadowing_required &&
info->has_dedicated_vram;
/* GFX6-8 SDMA can't ignore page faults on unmapped sparse resources. */
info->sdma_supports_sparse = info->gfx_level >= GFX9;
/* GFX10+ SDMA supports DCC and HTILE, but Navi 10 has issues with it according to PAL. */
info->sdma_supports_compression = info->gfx_level >= GFX10 && info->family != CHIP_NAVI10;
/* Get the number of good compute units. */
info->num_cu = 0;
for (i = 0; i < info->max_se; i++) {
+3
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@@ -113,6 +113,9 @@ struct radeon_info {
bool has_vrs_ds_export_bug;
bool has_taskmesh_indirect0_bug;
bool has_set_pairs_packets;
bool sdma_supports_sparse; /* Whether SDMA can safely access sparse resources. */
bool sdma_supports_compression; /* Whether SDMA supports DCC and HTILE. */
/* conformant_trunc_coord is equal to TA_CNTL2.TRUNCATE_COORD_MODE, which exists since gfx11.
*