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191758 Commits

Author SHA1 Message Date
Mike Blumenkrantz 5f22d3f174 zink: fill in sync flags for a couple barriers 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35476>
 2025-06-20 17:08:30 +00:00
Mike Blumenkrantz 4483c6195d zink: put back the sampler barrier on fb unbind with GENERAL layouts 
this is actually critical to avoid splitting renderpasses regardless of
the layout being used

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35476>
 2025-06-20 17:08:30 +00:00
Yiwei Zhang 41d241bf6e radv: relax the native_handle_t::numFds requirement 
For modern gralloc impl, usually there's other fds appended in the
native_handle_t for gralloc buffer metadata sharing. So numFds can be
greater than 1, while the common agreement is still that the format
plane handles being placed at the beginning in the lack of a standard
format plane fd metadata query mapper api.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13163

Cc: mesa-stable
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35038>
 2025-06-20 16:51:18 +00:00
Alyssa Rosenzweig b0f8c22682 nir/opt_sink: sink agx backfacing 
helps an elden ring shader:

Totals from 1 (0.03% of 3206) affected shaders:
Instrs: 4146 -> 4141 (-0.12%)
CodeSize: 27374 -> 27334 (-0.15%)
ALU: 2554 -> 2549 (-0.20%)
FSCIB: 2554 -> 2549 (-0.20%)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35559>
 2025-06-20 16:09:28 +00:00
Alyssa Rosenzweig 3eeba6efdd nir/opt_preamble: hoist reorderable SSBO loads on AGX 
basically asahi version of 2f93137308 ("nir/opt_preamble: Handle
load_global_ir3"). elden ring:

Totals from 2409 (75.14% of 3206) affected shaders:
MaxWaves: 2068416 -> 2081984 (+0.66%); split: +0.74%, -0.08%
Instrs: 2439078 -> 1849792 (-24.16%)
CodeSize: 15570886 -> 12196612 (-21.67%)
Spills: 11623 -> 11678 (+0.47%); split: -0.63%, +1.10%
Fills: 9815 -> 9762 (-0.54%); split: -1.37%, +0.83%
Scratch: 31200 -> 31328 (+0.41%); split: -0.23%, +0.64%
ALU: 1154256 -> 1038680 (-10.01%); split: -10.22%, +0.21%
FSCIB: 1154256 -> 1038479 (-10.03%); split: -10.24%, +0.21%
IC: 248318 -> 237344 (-4.42%); split: -4.47%, +0.05%
GPRs: 266323 -> 254621 (-4.39%); split: -4.72%, +0.33%
Uniforms: 639557 -> 794085 (+24.16%); split: -0.07%, +24.23%

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reacted-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35559>
 2025-06-20 16:09:28 +00:00
Christoph Neuhauser e99446fc5e egl: Add EGL_EXT_device_query_name and EGL_EXT_device_persistent_id 
Adds support for the EGL extensions EGL_EXT_device_query_name and
EGL_EXT_device_persistent_id. This enables querying device name, vendor
name, renderer name and device and driver UUIDs.

Signed-off-by: Christoph Neuhauser <christoph.neuhauser@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34958>
 2025-06-20 15:35:44 +00:00
Karol Herbst ee7536a1e3 radeonsi: implement SVM interfaces 
Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35175>
 2025-06-20 15:10:42 +00:00
Karol Herbst a107041112 radeonsi: implement resource_get_address 
Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35175>
 2025-06-20 15:10:42 +00:00
Karol Herbst a1b8c6c404 radeosi: assert addresses are not NULL in a couple of places 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35175>
 2025-06-20 15:10:42 +00:00
Mike Blumenkrantz d2d98abf1d gallium: add compressed_surface_reinterpret_blocks_layered 
this affects piglit/bin/ext_texture_array-compressed teximage pbo -auto -fbo

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6891

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35612>
 2025-06-20 14:47:25 +00:00
Valentine Burley f39240b98f panvk/ci: Increase DEQP_FRACTION for g610-vk 
Adjust the fraction of the panfrost-g610-vk:arm64 job, which has
been taking longer than the recommended 10 minutes of testing.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35438>
 2025-06-20 14:05:06 +00:00
Nanley Chery 42ef23ecd1 intel/blorp: Don't redescribe some Tile64 clears 
We don't support redescribing Tile64 and 3D due to interleaved depth
planes.

Fixes: 312952048b ("intel/blorp: Redescribe gfx12.5 surfaces for CCS fast clears")
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35619>
 2025-06-20 13:39:20 +00:00
John Anthony cce2fa9af6 panvk: report the maximum supported size for a variable count iub 
If VkDescriptorSetVariableDescriptorCountLayoutSupport is passed to
vkGetDescriptorSetLayoutSupport, we should report the maximum size in
bytes for inline uniform blocks.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Fixes: 5fe5e317 ("panvk: advertise descriptor indexing on valhall")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35545>
 2025-06-20 13:14:34 +00:00
John Anthony 1b309e77fc panvk: handle 0 count for vdc when checking if layout is supported 
A binding with variable descriptor count should be counted when checking
if a descriptor set layout is supported, even if it has a count of zero.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Fixes: 5fe5e317 ("panvk: advertise descriptor indexing on valhall")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35545>
 2025-06-20 13:14:34 +00:00
John Anthony 5023feb0f7 panvk: count iubs correctly when checking if layout is supported 
For inline uniform blocks, the descriptor count given in the binding is
a byte size. Convert the size into a descriptor count and use that when
checking if a descriptor set layout is supported.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Fixes: 0440d1dd03 ("panvk: Advertise VK_EXT_inline_uniform_block")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35545>
 2025-06-20 13:14:34 +00:00
John Anthony 3e9dc4f777 panvk: use variable count when initializing iub buffer descriptor 
Ensure we use the variable count to initialize the internal buffer
descriptor for variable count inline uniform block, if we have one.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Fixes: 5fe5e317 ("panvk: advertise descriptor indexing on valhall")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35545>
 2025-06-20 13:14:33 +00:00
John Anthony 9719744d05 panvk: fix allocated size for sets with variable count iub 
When allocating descriptor sets, ensure we correctly calculate the new
size if the last binding is an inline uniform block with a variable
count.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Fixes: 5fe5e317 ("panvk: advertise descriptor indexing on valhall")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35545>
 2025-06-20 13:14:33 +00:00
John Anthony 37a5e6562e panvk: add panvk_get_iub_desc_count and panvk_get_iub_size 
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35545>
 2025-06-20 13:14:33 +00:00
John Anthony 677153c642 panvk: fix maxInlineUniformTotalSize 
maxInlineUniformTotalSize is derived from
MAX_INLINE_UNIFORM_BLOCK_DESCRIPTORS, but due to missing parenthesis
around the expression, the value calculated is incorrect.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Fixes: 0440d1dd03 ("panvk: Advertise VK_EXT_inline_uniform_block")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35545>
 2025-06-20 13:14:32 +00:00
Mary Guillemard 266b25a356 panvk/ci: Update Mali-G52 status with full VKCTS 
New failures found with current main full run.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35639>
 2025-06-20 10:11:52 +00:00
Mary Guillemard c3897b3a98 panvk: Fix dependency chain on indirect dispatch for JM 
The copy job was missing a dependency on the indirect job causing issues
on various "dEQP-VK.synchronization.*indirect*" and
"dEQP-VK.synchronization2.*indirect*" tests.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: 8b4e515ca2 ("panvk: Implement indirect dispatch on JM")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35639>
 2025-06-20 10:11:52 +00:00
Mary Guillemard 2c455c2d81 libcl: Add more UINT_MAX variants 
Needed by panvk's minmax CL code.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35639>
 2025-06-20 10:11:52 +00:00
Mary Guillemard 276b65dbca pan/clc: Lower IO as late as possible 
We were assigning the scratch size of the whole lib... that was causing
very big TLS usage on draw indirect.

With this TLS usage is way lower now at the cost of running more pass
for every variants.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35639>
 2025-06-20 10:11:52 +00:00
Mary Guillemard 01c8ee5737 pan/clc: Use hash_format_strings option with nir_lower_printf 
At some point CL C shader switched to a format hash approach and we
forgot to properly migrate here.

This should fix all printf again.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35639>
 2025-06-20 10:11:52 +00:00
Rhys Perry 325dfd809a radv,aco: switch to shader statistics framework 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12756
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35583>
 2025-06-20 09:26:58 +00:00
Rhys Perry 2382d657ec radv: use vk_outarray for pipeline statistics/executables 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35583>
 2025-06-20 09:26:58 +00:00
Rhys Perry eb86717f4d util/stats: add serialize helpers 
These copy the stats with any padding zero'd.

The layout is the same as the C struct, so it's still usable as one, if
the alignment is correct.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35583>
 2025-06-20 09:26:58 +00:00
Rhys Perry 92eb0941d3 util/stats: fix XML type validation 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35583>
 2025-06-20 09:26:58 +00:00
Rhys Perry ace17d0ea1 util/stats: use PRIdx/PRIux format constants 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35583>
 2025-06-20 09:26:58 +00:00
Rhys Perry 3625ed36b7 util/stats: fix signness of c types 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35583>
 2025-06-20 09:26:57 +00:00
Romaric Jodin ae128624ab panvk: fix typo in printf in bi_validate 
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35641>
 2025-06-20 08:29:54 +00:00
Dave Airlie d68a1fc0d4 radv/video: port hevc slice header encoding from radeonsi 
The radeonsi code has been improved to handle reference lists
better, port the code to radv and vulkan API.

This has been updated to for Vulkan

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35628>
 2025-06-20 07:31:04 +00:00
Dave Airlie f7d2939457 radv/video: add some missing hevc header bits 
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35628>
 2025-06-20 07:31:04 +00:00
Samuel Pitoiset 5e2fcdfea2 radv/meta: add a helper to determine if clearing is a full rect 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35603>
 2025-06-20 06:36:19 +00:00
Samuel Pitoiset 525e73c045 ac/descriptors: configure {Z,STENCIL}_READ_ONLY for ds surfaces on GFX12+ 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35603>
 2025-06-20 06:36:19 +00:00
Samuel Pitoiset 59dfa8c2f5 radv: switch to nir_intrinsic_load_input_attachment_coord 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35556>
 2025-06-20 06:12:24 +00:00
Rob Clark df55ea8c51 freedreno/a6xx: Don't use 2d blit path for f16 
This seems to canonicalize NaNs when the source format is a 16-bit
floating point format, likely because it implicitly converts to 32b.

Fixes OpenCL-CTS:

  ./test_basic imagearraycopy
  ./test_basic imagearraycopy3d

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35589>
 2025-06-20 00:10:47 +00:00
Rob Clark 86a8eda644 freedreno: Add custom f16 blit shader 
To avoid canonicalizing NaNs for f16, we need to avoid promoting the
value to 32b.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35589>
 2025-06-20 00:10:47 +00:00
Rob Clark 2adff20fde util: Add a util_blitter_blit_with_txf() helper 
If a driver is (or is contemplating) providing it's own fs_override then
it needs to know whether the blitter is going to use txf or not.  So
split this logic out into a helper.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35589>
 2025-06-20 00:10:47 +00:00
Rob Clark 9e07f38b91 util+tu: Add util_format_is_float16() 
Extract out a helper to check for f16 formats from turnip so it can be
used elsewhere.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35589>
 2025-06-20 00:10:47 +00:00
Emma Anholt eae86f455c v3d: Stop advertising support for HW clip planes. 
The GL frontend is perfectly good at lowering it like we do.  Cuts out a
bunch of duplicate code.

We still have ucp_enables for the FS due to lowering of CLIPDIST to
discards in the FS.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8953>
 2025-06-19 21:44:55 +00:00
Emma Anholt 211e03d026 gallium: Remove the need for set_clip_state() on !PIPE_CAP_CLIP_PLANES. 
More driver boilerplate we don't need.  We do still have to go through the
transformation in st_atom_clip.c because the clip state can get used in
draw fallbacks.  This revealed that lima had a dirty bit being set that
nobody was reading.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8953>
 2025-06-19 21:44:55 +00:00
Eric Anholt a9b622bcca vc4: Drop VS ucp lowering code. 
The GL frontend handles it for us since c1442030ec ("vc4: lower clip
planes in st/mesa").  Now we should just be dropping the VS re-recompiles
we were doing, along with dead code.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8953>
 2025-06-19 21:44:55 +00:00
Job Noorman 899a179e8c freedreno/decode: don't count alias regs for GPR stats 
Alias regs don't actually consume GPR space so shouldn't be counted.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35627>
 2025-06-19 21:23:01 +00:00
Job Noorman d2e1e4442a ir3: enable nir_opt_uniform_subgroup 
fossildb results:

Totals from 320 (0.19% of 164575) affected shaders:
MaxWaves: 2684 -> 2688 (+0.15%)
Instrs: 458284 -> 457275 (-0.22%); split: -0.22%, +0.00%
CodeSize: 896464 -> 896230 (-0.03%); split: -0.09%, +0.06%
NOPs: 109357 -> 109452 (+0.09%); split: -0.08%, +0.17%
MOVs: 25634 -> 24975 (-2.57%)
Full: 5781 -> 5779 (-0.03%)
(ss): 11491 -> 11241 (-2.18%); split: -2.21%, +0.03%
(sy): 5179 -> 5174 (-0.10%); split: -0.12%, +0.02%
(ss)-stall: 57044 -> 56592 (-0.79%); split: -0.95%, +0.16%
(sy)-stall: 114577 -> 114484 (-0.08%); split: -0.11%, +0.03%
Preamble Instrs: 103205 -> 103748 (+0.53%)
Cat0: 124379 -> 124474 (+0.08%); split: -0.07%, +0.15%
Cat1: 30969 -> 30310 (-2.13%)
Cat2: 163648 -> 163260 (-0.24%)
Cat3: 94946 -> 94921 (-0.03%)
Cat4: 13061 -> 13041 (-0.15%)
Cat5: 7421 -> 7414 (-0.09%)
Cat7: 18041 -> 18036 (-0.03%)

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35636>
 2025-06-19 20:56:35 +00:00
Guilherme Gallo c035454a3c ci/virtio: Add an Android Venus job on Intel Comet Lake 
Introduce a Venus job running in Cuttlefish on Intel Comet Lake DUTs.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Co-authored-by: Antonio Ospite <antonio.ospite@collabora.com>
Co-authored-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35522>
 2025-06-19 20:20:42 +00:00
Valentine Burley 0553a2de25 ci/virtio: Generalize .venus-rules 
Decouple the .venus-rules definition from lavapipe to prepare for adding
hardware driver coverage for Venus.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Co-authored-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Co-authored-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35522>
 2025-06-19 20:20:42 +00:00
Valentine Burley 03b480d381 ci/intel: Fix the runner tag for Flip-hatch 
The GitLab runner tags are case sensitive, and Flip-hatch's tag was
incorrectly lowercase. This prevented jobs from being picked up
by the runner.

Also remove an outdated note, as the device now appears to be stable.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35522>
 2025-06-19 20:20:42 +00:00
Lionel Landwerlin bfee389f0c anv: only use compressed memory types on Xe2+ 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 252cac1e5c ("anv: avoid memory type changes with INTEL_DEBUG=noccs")
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35615>
 2025-06-19 19:55:59 +00:00
Emma Anholt 6808ccf23a mesa: Retire the OptimizeForAOS code. 
It's been unused for years.  Back on the brw driver, it was used for a ~1%
win on a VS-heavy workload, because you could hide instruction latency
using a DP4 sequence instead of MADs for doing the MVP transform.  Given
that r300 and i915 don't seem to want it, and nobody has successfully
ported it for crocus (see
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14277), just
garbage collect the code at this point.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35617>
 2025-06-19 19:23:53 +00:00