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Author SHA1 Message Date
Sviatoslav Peleshko 5ca51156e2 intel/elk: Actually retype integer sources of sampler message payload 
According to PRMs:
"All parameters are of type IEEE_Float, except those in the The ld*,
resinfo, and the offu, offv of the gather4_po[_c] instruction message
types, which are of type signed integer."

Currently, we load parameters with the correct types, but use them as send
sources with the default float type, which may confuse passes downstream.
Fix this by actually storing the retyped sources.

Cc: mesa-stable
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29581>
 2024-06-12 18:59:17 +00:00
Sviatoslav Peleshko 2358c997f3 intel/brw: Actually retype integer sources of sampler message payload 
According to PRMs:
"All parameters are of type IEEE_Float, except those in the The ld*,
resinfo, and the offu, offv of the gather4_po[_c] instruction message
types, which are of type signed integer."

Currently, we load parameters with the correct types, but use them as send
sources with the default float type, which may confuse passes downstream.
Fix this by actually storing the retyped sources.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11118
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29581>
 2024-06-12 18:59:17 +00:00
Christian Gmeiner 59218cdf07 gallium: Add vkms entrypoint 
Makes it possible to use Virtual Kernel Mode-Setting (VKMS) in combination
with a render-only GPU. Is quite helpful to test the GPU when no kms driver
is ready.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29042>
 2024-06-12 17:35:26 +00:00
Philipp Zabel 5aadea47fa etnaviv: update headers from rnndb 
Update to etna_viv commit a2ee3de27b38.

This extends the VIVS_NFE_GENERIC_ATTRIB_CONFIG0_STREAM field to 4 bits,
to fix vertex shaders with 9 or more ttribute streams.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29694>
 2024-06-12 16:34:30 +00:00
Sil Vilerino eee0b9b0e8 d3d12: Add missing case for CQP in d3d12_video_encoder_disable_rc_qualitylevels 
Fixes: 58ca4cee9e ("d3d12: Video Encode - Fix inputs for older OS support query cap")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29697>
 2024-06-12 15:45:36 +00:00
Danylo Piliaiev 96ed275a53 turnip: Implement VK_EXT_depth_clamp_zero_one 
For A6XX it's a no-op, but A7XX+ doesn't clamp to [0,1] with disabled
depth clamp, to support VK_EXT_depth_clamp_zero_one we have to always
enable clamp and manually set depth range to [0,1] when rs->depth_clamp_enable
is false.

Passes:
 dEQP-VK.depth.*
 dEQP-GLES3.functional.fbo.depth.depth_test_clamp.* (zink)

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29387>
 2024-06-12 12:58:32 +00:00
Valentine Burley 47bbaf000d tu: Handle all dependencies of CmdWaitEvents2 
The spec describes pDependencyInfos as an array with eventCount elements.

Addresses: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10580

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29630>
 2024-06-12 12:28:44 +00:00
Valentine Burley a6a0730bd5 tu: Move event related related code to tu_event.cc/h 
Match the structure of NVK and RADV. Pull all event related code from
tu_device.cc/h and tu_cmd_buffer.cc/h into one location.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29630>
 2024-06-12 12:28:44 +00:00
Iago Toral Quiroga 14b0cb6b9f v3dv: add more checks for device loss 
VK_KHR_maintenance5 adds additional guarantees for functions that
can return VK_ERROR_DEVICE_LOSS to return this error if the device
was previously lost.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29668>
 2024-06-12 12:09:00 +00:00
Daniel Schürmann 56ac6f26e0 aco/assembler: slightly refactor MTBUF assembly for more readability 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29692>
 2024-06-12 11:41:58 +00:00
Daniel Schürmann 14f4906e53 aco/assembler: fix MTBUF opcode encoding on GFX11 
We have accidentally set the tfe bit for some opcodes.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29692>
 2024-06-12 11:41:58 +00:00
Corentin Noël 11812ae2aa venus/ci: add more recently found flakes 
Found in https://gitlab.freedesktop.org/mesa/mesa/-/jobs/59745506

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29681>
 2024-06-12 10:27:48 +00:00
Lionel Landwerlin 99f92dd6d3 anv: ensure completion of surface state copies before secondaries 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29671>
 2024-06-12 10:06:05 +00:00
Lionel Landwerlin 1851629407 anv: limit aux invalidations to primary command buffers 
This AUX-TT is only updated on the CPU since ee6e2bc4a3 ("anv: Place
images into the aux-map when safe to do so"). So the only really
important invalidation that needs to happens is on the beginning of a
primary command buffer.

We are required to idle the pipes prior invalidation the AUX-TT. This
might not be happening when the invalidation is put at the beginning
of the secondary command buffers.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29671>
 2024-06-12 10:06:05 +00:00
David Heidelberg af056baa40 ci/freedreno: some A306 tests now pass/skip since proper GL detection in Piglit 
Ref:
 - https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/916
 - https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/921

Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29689>
 2024-06-12 09:09:15 +00:00
Dave Airlie fd9f114d5a draw/texture: handle mip_offset[0] being != 0 for layered textures. 
When llvmpipe adds on a layer it uses mip_offset[0] for it, so it
should still be respected even for multisample.

Fixes KHR-GL45.texture_view.view_sampling

Fixes: 839045bcc8 ("gallivm/lp: merge sample info into normal info")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29685>
 2024-06-12 16:13:59 +10:00
David Heidelberg f467a89523 rusticl: add -cl-std only when it's not defined 
This fixes piglit "Invalid CL Version Declaration" test.

Fixes: fc30fe2c11 ("rusticl/kernel: add missing preprocessor definitions")

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29638>
 2024-06-11 12:41:39 -07:00
Leo Liu 3260d6c877 radeon/vcn: enable dpb to use pipe video buffer with swizzle mode 
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29541>
 2024-06-11 12:29:11 -04:00
Leo Liu bc696783bb radeon/vcn: use pipe video buffers for dpb 
gfx12 surface info can be used to fill up the dpb message buffer

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29541>
 2024-06-11 12:29:11 -04:00
Leo Liu 448c716358 ac/surface/tests: add the test for ADDR3_256B_2D 
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29541>
 2024-06-11 12:29:11 -04:00
Leo Liu 59e813d953 ac/surface: add GFX12 256B tile mode for video 
With VCN5, the DPB buffer uses gfx12 tile/swizzle mode.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29541>
 2024-06-11 12:29:11 -04:00
Patrick Lerda 301a3bacce radeonsi: fix assert triggered on gfx6 after the tessellation update 
This change updates the affected calls to the proper function
which is radeon_set_config_reg().

For instance, this issue is triggered with
"piglit/bin/textureSize tes isampler2DMSArray -auto -fbo":
vertex-program-two-side: ../src/gallium/drivers/radeonsi/si_state_shaders.cpp:4981: void si_emit_spi_ge_ring_state(si_context*, unsigned int): Assertion `(0x008988) >= CIK_UCONFIG_REG_OFFSET && (0x008988) < CIK_UCONFIG_REG_END' failed.

Fixes: bd71d62b8f ("radeonsi: program tessellation rings right before draws")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29645>
 2024-06-11 14:01:21 +00:00
Alyssa Rosenzweig e7c131ec96 asahi: use nir_build_texture_query 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29614>
 2024-06-11 13:10:22 +00:00
Alyssa Rosenzweig f1144aa56f nir/builtin_builder: factor out nir_build_texture_query 
useful for other queries too.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29614>
 2024-06-11 13:10:22 +00:00
Rhys Perry 7a4f121c5d aco: remove some missing label resets 
In the case of:
   c = xor(a, b)
   d = not(c)
   xor(d, e)
it will be optimized to:
   d = xnor(a, b)
   xor(d, e)
because "d" would still had a label with "instr=not(c)", it would then be
further optimized to:
   d = xnor(a, b)
   xnor(c, e)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11309
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29650>
 2024-06-11 09:30:16 +00:00
Samuel Pitoiset 51d1e005e8 radv: use the common SQTT implementation 
I have verified the generated command stream using PM4 is similar to
the previous one on POLARIS10, VEGA10, NAVI21 and NAVI31.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
 2024-06-11 06:46:55 +00:00
Samuel Pitoiset ea8f29b4a7 radv: emit more consecutive registers for SQTT on GFX8-9 
This change is only useful to compare the command stream generated by
PM4 in the next commit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
 2024-06-11 06:46:55 +00:00
Samuel Pitoiset a373ba92c3 amd: add a common implementation for SQTT using PM4 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
 2024-06-11 06:46:55 +00:00
Samuel Pitoiset 2fab42ad2e amd: mark more registers that need RESET_FILTER_CAM in PM4 
For SQTT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
 2024-06-11 06:46:55 +00:00
Samuel Pitoiset 0c08673656 amd: allow to emit privileged config registers in PM4 
For SQTT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
 2024-06-11 06:46:55 +00:00
Samuel Pitoiset b82e5c8da8 ac,radv,radeonsi: add more parameters to ac_sqtt 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
 2024-06-11 06:46:55 +00:00
Samuel Pitoiset 155399d03b ac,radv: add a helper for SQTT control register 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
 2024-06-11 06:46:55 +00:00
Pierre-Eric Pelloux-Prayer a7880f3edb radv/sqtt: use radeon_check_space before emit_spm_* 
This fixes the following error on a rdna2:

   radeon_set_uconfig_reg_seq: Assertion `cs->cdw + 2 + num <= cs->reserved_dw' failed.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
 2024-06-11 06:46:55 +00:00
Samuel Pitoiset a80a1c9838 radv: don't assume that TC_ACTION_ENA invalidates L1 cache on gfx9 
Ported from RadeonSI 279315fd73 ("radeonsi: don't assume that
TC_ACTION_ENA invalidates L1 cache on gfx9")

Thanks to Rhys for noticing this by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29644>
 2024-06-11 06:15:12 +00:00
Iago Toral Quiroga e7615a612f v3dv: support VK_FORMAT_A1B5G5R5_UNORM_PACK16_KHR 
VK_KHR_maintenance5 adds two new optional formats:
- VK_FORMAT_A1B5G5R5_UNORM_PACK16_KHR
- VK_FORMAT_A8_UNORM_KHR

The former we support natively, the latter we don't. We could
try to implement A8 with some effort by mapping it to R8 with
a 000X swizzle but that alone won't be enough, some issues we
would have to solve include:

- Border colors won't work because the texture shader state
swizzle also applies to these, so our 000X swizzle would mess
things up for them and since we don't know the format used with
the sampler in the general case, we would have always have to
create two samplers internally, one adequate for A8 and one for
the rest of formats and choose one or the other at run time.
- We would have to convert the A8 format to a compatible
R8 format but most of the transfer operations. This should be
fairly trivial since we already have infrastructure for this.
- At rendering time we would need to ensure we make our writes
from the alpha channel. This would probably require that we
use the color_fmt from the fs_key to swizzle color writes in
shaders.
- We would probably also need to special case the format for
color clears, etc

So for now, we don't support it.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29643>
 2024-06-11 05:32:26 +00:00
Timothy Arceri 9995f336e6 nir: add merge loop terminators optimisation 
Merge two consecutive basic terminators.

Acked-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28998>
 2024-06-11 01:42:23 +00:00
Timothy Arceri e25da8d8d7 nir: support more loop unrolling for logical operators 
Here we support finding loop count when the termination condition
is a logical or.

Acked-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28998>
 2024-06-11 01:42:23 +00:00
Timothy Arceri 987cf4b47d nir: more aggressively remove in loop during partial unroll 
Acked-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28998>
 2024-06-11 01:42:23 +00:00
Timothy Arceri 9702570994 nir: clarify and update loop conditional instruction 
This value is intended to be used to remove out of bounds array
access when unrolling loops so it should contain the comparison
that contains the the induction variable not the overall
condition of the loop terminator. So here we update the instruction
when dealing with iand/ior loop terminator conditions.

Acked-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28998>
 2024-06-11 01:42:23 +00:00
Juston Li 5ac539d70d venus: sync protocol for conditionally ignored dyn arrays 
Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29661>
 2024-06-11 01:14:19 +00:00
Kenneth Graunke f04bb49465 intel/brw: Delete SAD2 and SADA2 opcodes 
These were removed with Icelake.  While they technically still exist on
Skylake, which this compiler supports, we have never used these opcodes
in the 14 years we could have done so.  So just scrap them.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29665>
 2024-06-10 16:47:50 -07:00
Friedrich Vock 15f2c9c553 aco: Limit rt stages to 128 vgprs 
Totals from 35472 (7.40% of 479373) affected shaders:

MaxWaves: 206239 -> 283776 (+37.60%)
Instrs: 193922210 -> 202721106 (+4.54%)
CodeSize: 1056819972 -> 1110833680 (+5.11%); split: -0.00%, +5.11%
VGPRs: 6026704 -> 4540416 (-24.66%)
SpillSGPRs: 23742 -> 25754 (+8.47%)
SpillVGPRs: 118897 -> 2295118 (+1830.34%)
Scratch: 7201792 -> 152752128 (+2021.03%)
Latency: 2713432565 -> 3194796286 (+17.74%); split: -0.20%, +17.94%
InvThroughput: 1052131232 -> 935049835 (-11.13%); split: -16.59%, +5.46%
VClause: 6972784 -> 8716721 (+25.01%); split: -0.02%, +25.03%
SClause: 4879313 -> 4852452 (-0.55%); split: -0.88%, +0.33%
Copies: 32782141 -> 35223995 (+7.45%)
Branches: 11075847 -> 11094087 (+0.16%); split: -0.00%, +0.17%
VALU: 118525960 -> 120929058 (+2.03%)
SALU: 33924572 -> 33973293 (+0.14%); split: -0.03%, +0.17%
VMEM: 12419116 -> 17104582 (+37.73%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29593>
 2024-06-10 19:39:52 +00:00
Friedrich Vock ec8512ce85 aco/spill: Don't spill phis with all-undef operands 
Fixes some crashes when limiting RT stages to 128 VGPRs.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29593>
 2024-06-10 19:39:52 +00:00
Samuel Pitoiset 128cca21c0 radv: pass a radv_shader to radv_get_compute_pipeline_metadata() 
And rename to radv_get_compute_shader_metadata().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29652>
 2024-06-10 17:31:12 +00:00
Alyssa Rosenzweig 31127d7b02 nir/lower_wpos_center: clean up 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29585>
 2024-06-10 16:59:38 +00:00
Emma Anholt 3beae0f98e nir,panfrost,agx: Fix driver PIXEL_COORD_INTEGER setting and drop workaround. 
nir_lower_frag_coord_to_pixel_coord was adding .5 to work around that the
drivers were mistakenly setting PIXEL_COORD_HALF_INTEGER.  With the
setting corrected, the GL frontend handles it appropriately (instead of
subtracting half in the frontend for ARB_fragment_coord_conventions
integer setting and then adding the half back here), and makes the pass
reusable from Intel.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29585>
 2024-06-10 16:59:38 +00:00
Gert Wollny 6a9596be56 zink: limit minSampleShading to a maxium value of 1.0 
This is required by the spec and fixes

  VUID-VkPipelineMultisampleStateCreateInfo-minSampleShading-00786

when running

  spec@arb_stencil_texturing@glblitframebuffer corrupts state@gl_texture_2d_multisample_array

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29625>
 2024-06-10 15:54:12 +00:00
Marcin Ślusarz a1d8837bad anv,intel/compiler/xe2: fill MESH_CONTROL.VPandRTAIndexAutostripEnable 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29617>
 2024-06-10 15:21:34 +00:00
Marcin Ślusarz 1fa343c38b intel/genxml/xe2: update MESH_CONTROL 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29617>
 2024-06-10 15:21:34 +00:00
Alyssa Rosenzweig ba20cc1c72 mesa: fix duplicate initializer 
fixes warning with clang:

../src/mesa/main/spirv_capabilities.c:98:45: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
   98 |       .TransformFeedback                  = gl_exts->ARB_transform_feedback3,
      |                                             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../src/mesa/main/spirv_capabilities.c:72:45: note: previous initialization is here
   72 |       .TransformFeedback                  = true,

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29613>
 2024-06-10 14:19:02 +00:00