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Author SHA1 Message Date
Marcin Ślusarz 56cd91bc7c intel/batch_decoder: fix decoding of sampler states 
There's only 1 sampler state behind
3DSTATE_SAMPLER_STATE_POINTERS[_VS|_HS|_DS|_GS|_PS] and
3DSTATE_SAMPLER_STATE_POINTERS.[PointertoVSSamplerState|PointertoPSSamplerState|PointertoGSSamplerState].

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9707>
 2021-03-22 08:36:55 +00:00
Marcin Ślusarz cd0f9cdb6e intel/batch_decoder: drop bogus check 
state_addr == bo.addr, bo.size==0 is handled by another check

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9707>
 2021-03-22 08:36:55 +00:00
Marcin Ślusarz bb8ee5f52d intel/batch_decoder: catch invalid sampler state pointer 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9707>
 2021-03-22 08:36:55 +00:00
Marcin Ślusarz 31178db610 i965: fix decode_get_bo 
Similar fix to the iris one.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9707>
 2021-03-22 08:36:55 +00:00
Marcin Ślusarz f33852e268 iris: fix decode_get_bo 
It tries to be helpful by returning BO metadata matching exactly
the requested address, but it "forgets" to fix the remaining size.
The only caller of this function (ctx_get_bo) already deals with
raw BO metadata, so return it as such instead of fixing size too.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9707>
 2021-03-22 08:36:55 +00:00
Vasily Khoruzhick 5762aa4e56 lima: relax checks of imported BO 
We don't need stride of imported buffer to be equal to calculated
stride if the buffer is linear.

Fixes #3070

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9646>
 2021-03-22 04:23:23 +00:00
Dave Airlie b06f121fcc lavapipe: enable 8/16-bit storage extensions 
Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9643>
 2021-03-22 12:17:36 +10:00
Dave Airlie 27822a6f0b gallivm: use fp16 casts lowering 
Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9643>
 2021-03-22 12:17:31 +10:00
Dave Airlie 48080e5bdf nir: lower 64-bit floats to 32-bit first. 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9643>
 2021-03-22 12:17:14 +10:00
Dave Airlie 01dfd65a2d nir: port fp16 casting code from dxil 
This moves the dxil pass to common code and makes dxil
use the new code.

Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9643>
 2021-03-22 12:16:59 +10:00
Dave Airlie 224069cefd gallivm/nir: handle bool registers. 
lowering to 32-bit bools doesn't get rid of register stores,
so handle those.

Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9643>
 2021-03-22 12:16:45 +10:00
Dave Airlie 2a9e98130b gallivm: fix non-32bit ubo loads 
8/16-bit storage requires ubo loads for the smaller types,
fix the ubo loading and bounds checking.

Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9643>
 2021-03-22 12:16:14 +10:00
Arno Messiaen 07080fd4c9 lima/ppir: increase usage of pipeline regs 
It's possible to increase usage of ppir_pipeline_reg_fmul and
ppir_pipeline_reg_vmul by reordering arguments in some cases, so let's
do that.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Arno Messiaen <arnomessiaen@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3232>
 2021-03-22 01:31:11 +00:00
Jesse Natalie 55d153b9f5 nir: Temporarily disable optimizations for MSVC ARM64 
There's currently an MSVC optimizer bug which causes a stack overflow
in the compiler if it attempts to optimize fsat.

Acked-by: Rob Clark <robdclark@chromium.org>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9700>
 2021-03-21 21:41:41 +00:00
Ilia Mirkin 3e68e7f90d gallium,st: add missing viewport swizzles 
Viewports must be initialized with the appropriate swizzles (for
hardware that supports this feature).

Fixes: 90fcb3fef2 (st/mesa: add NV_viewport_swizzle support)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9732>
 2021-03-21 18:29:50 +00:00
Rob Clark befd9fbbba freedreno/a6xx: Fix typo 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9535>
 2021-03-21 16:01:01 +00:00
Rob Clark 5b96689fa0 freedreno: Autotune bypass vs GMEM rendering decision 
In some cases, like gl_driver2, we have all the characteristics that
make our current simplistic bypass vs GMEM decision pick GMEM (ie. batch
starts with a clear, has blend enabled, has a high draw count, etc),
but each draw touches very few pixels and the per-tile state-change
overhead leaves us CP limited.  We would be better in this case picking
the bypass path.

So use feedback from # of samples-passed in previous render passes to
the same FBO to give us a bit more information to make better choices.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2798
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9535>
 2021-03-21 16:01:01 +00:00
Rob Clark 0610c7ba84 freedreno/a6xx: Fix sRGB/snorm vs sysmem clear path 
This shows up when, thanks to the next patch, we decide to start doing
bypass instead of GMEM for some dEQP's

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9535>
 2021-03-21 16:01:01 +00:00
Rob Clark 2e529ed7ef freedreno: Add gmem_reason_mask 
Older gens had more restrictions about GMEM bypass which do not apply to
newer generations.  Add a bitmask so we know which bits are not a hard
requirement for using GMEM.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9535>
 2021-03-21 16:01:01 +00:00
Rob Clark 1c24e9500b freedreno/batch: Add a way to clone a batch key 
For autotune, the lifetime of it's hashtable keys doesn't match the
batch, so we'll need to clone the key before inserting into the
hashtable.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9535>
 2021-03-21 16:01:01 +00:00
Rob Clark aa7dd6ff43 freedreno/batch: Export key/hash fxns 
We are going to re-use these for autotune.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9535>
 2021-03-21 16:01:01 +00:00
Rob Clark 4f3c16ec05 freedreno: Add draw cost estimation 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9535>
 2021-03-21 16:01:01 +00:00
Mike Blumenkrantz a1d80c6d96 zink: more accurately check samplecount caps for shader images 
lavapipe can only do up to 4bits, so this isn't just a binary check

Fixes: 0daa61553d ("zink: check if multisample support exists for shader image formats")

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9713>
 2021-03-21 10:15:13 -04:00
Rob Clark fd4a742cc3 freedreno/a6xx: Emit streamout state on every draw 
If stream-output is active, we can't skip it's state-emit, even if the
SO buffer(s) have not changed.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 13:29:05 -07:00
Rob Clark 03cf083dba freedreno: Push multi-draw closer to backend 
It will take some more extensive work to plumb this through the backends
(although that should increase the benefit further), but this is already
worth a nearly 4x speedup in piglit drawoverhead tests with no state
change, so this seems like a useful intermediate step.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 13:29:05 -07:00
Rob Clark 68e752652c freedreno: Handle multi-draw edge cases 
Use the multi-draw emulation helper in the edge cases where we don't
handle multi-draw.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 13:29:05 -07:00
Rob Clark 5765932375 freedreno: Use multi-draw helper 
In the normal case, we'll be pushing multi-draw (eventually) down into
the backend, but there are still a few remaining edge cases where we
can't deal with it.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 13:29:05 -07:00
Rob Clark 27ab249c9a u_draw: Add helper to emultate multi-draw 
No need to duplicate this in every driver.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 13:29:05 -07:00
Rob Clark 7b1505d165 freedreno: Drop u_trim_pipe_prim() from fast-paths 
Not sure if we need this for a2xx.  For a3xx and a4xx we need it for sw
xfb which needs to know the trimmed # of vertices in the VS.  We do not
need it on a6xx, and unlikely need it for anything a5xx+.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 13:29:05 -07:00
Rob Clark 9947f950fb freedreno/a6xx/vsc: Be more tolerate of degenerate prims 
Before we drop u_trim_pipe_prim(), we need to be more tolerant of the
edge cases it was protecting us from.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 12:14:34 -07:00
Rob Clark 4e82c5da73 freedreno: Only collect sw stats when required 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 12:14:34 -07:00
Rob Clark e9652630c7 freedreno: Split out helper for updating sw stats 
And while we're at it, handle the num_draws > 1 case, to prepare for
plumbing num_draws further down.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 12:14:34 -07:00
Rob Clark 66985973aa freedreno: Don't ignore geom/tess stage resources 
The draw resource-tracking logic looks like it never was updated to
account for HS/DS/GS stages.  Add it bitmask of bound stages so we only
have to loop over the bound stages.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 12:14:32 -07:00
Rob Clark 8cb51ba30e freedreno: Add dirty bit for state that needs rsc tracking 
aa1ddb6fe3 skipped the tracking for the
!dirty case, but we can do a bit better and track at bind time whether
the state change is one that requires resource tracking.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 12:13:09 -07:00
Rob Clark 66cbe66090 freedreno: Small dirty flag re-org 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 12:13:09 -07:00
Rob Clark 9401d5bf1a freedreno/a6xx: Convert to dirty_groups 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4106
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 12:13:09 -07:00
Rob Clark 32bc809a08 freedreno: Add mapping to generation specific dirty state 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 12:13:09 -07:00
Rob Clark 0cb989d71f freedreno: Add helpers to mark dirty state 
Doesn't change anything yet, but this will let us more easily add
mapping from dirty gallium state to dirty gen-specific state-groups.

Note that the mapping from shader-state to global state in
fd_context_dirty_shader() optimizes out for release builds.  This
is kind of important, in the next patch we'll want ffs(SOME_CONST)
to optimize away even more.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 12:13:09 -07:00
Rob Clark 9aef029635 freedreno/ir3: Precompute whether we need driver-params 
To save a bit of extra math in the draw-path.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 12:13:09 -07:00
Rob Clark b5e1e99da1 freedreno/drm: Inline iova calculation 
The shift/or are frequently zero, so this lets the compiler optimize out
some draw-overhead hotpath.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 12:13:09 -07:00
Rob Clark 93d5349fa5 freedreno/drm: Move emit_reloc_tail to head 
Get this out of the way first to avoid some register push/pop.  Only
reloc->bo is needed after writing the address into cmdstream, so this
turns msm_submit_append_bo() into a tail call.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 12:13:09 -07:00
Rob Clark 684586b96e freedreno/drm: Split 64b vs 32b paths 
No need to 'if (gpu_id >= 500)' on every reloc

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 12:13:09 -07:00
Rob Clark 9168d9cbfb freedreno/drm: Split softpin "reloc" functions 
"OBJECT" rb's are long lived, and generating them is not a hotpath, but
relocs to "STREAMING" rb's are a hot path.  But we can decouple these.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
 2021-03-20 12:13:08 -07:00
Jason Ekstrand 731ea06758 intel/tools: Handle BINDING_TABLE_POOL_ALLOC in batch decoding 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9729>
 2021-03-20 12:46:50 -05:00
Jason Ekstrand 79d9c914ae intel/genxml: Make BindingTablePoolEnable a bool 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9729>
 2021-03-20 12:46:50 -05:00
Jason Ekstrand 05e133a84a intel/tools: Handle GT_MODE in the batch decoder 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9729>
 2021-03-20 12:46:50 -05:00
Jason Ekstrand b2421f7b44 intel/tools: Handle milti-LRI in the batch decoder 
Context batches tend to have a lot of multi-LRI and, if we want to be
able to parse those registers nicely, we really handle it.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9729>
 2021-03-20 12:33:18 -05:00
Jason Ekstrand 65077cdf57 intel/genxml: Binding table pointers are 15 bits on GFX version 12.5+ 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9729>
 2021-03-20 12:33:16 -05:00
Kenneth Graunke 6fb93465bd intel/genxml: Add a partial GT_MODE definition for Gen11+. 
I chose to drop "HW" from the name of this field because on Gen11
it applies to both HW and SW binding tables, so it's a bit of a
misnomer.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9729>
 2021-03-20 12:32:55 -05:00
Jose Fonseca 6e6cd7d93c scons: Remove. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9720>
 2021-03-20 10:38:55 +00:00