Commit Graph

213111 Commits

Author SHA1 Message Date
Yiwei Zhang 55c355c572 pan/genxml: use process name to distinguish CS dumps
Android has to enable dumping globally. There's no per app based env
var at runtime since most apps just fork from Zygote process. So we have
to add process name to the dump file name. Now with pandecode.dump as
the base name, it'll be like below on Android:
- pandecode.dump.com.example.VkCube.ctx-*
- pandecode.dump.com.google.android.apps.nexuslauncher.ctx-*

This can be generally useful on Linux as well when debugging different
things to avoid accidentally touching existing dumps.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37729>
2025-10-07 18:16:49 +00:00
Yiwei Zhang 55bc8319fd pan/genxml: fall back to stderr when unable to create CS dump file
This avoids native crash on Android when system priviledged process is
involved during app launch animation but does not have specified storage
access (e.g. system_server can't access the common location /sdcard/*).

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37729>
2025-10-07 18:16:49 +00:00
Yiwei Zhang 8249912d34 pan/genxml: improve pandecode_dump_file_open logging
Makes the pandecode_dump_file_open debug and error logs friendly to
Android.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37729>
2025-10-07 18:16:48 +00:00
Rhys Perry 20af16b4d8 aco: use MTBUF for 64-bit atomic load/store
A 64-bit atomic load/store should be considered entirely out-of-bounds if
any part of it is out-of-bounds. Since we implemented these as 32-bit vec2
load/store, it would have been possible for the first half to be in-bounds
while the second half is out-of-bounds.

From 9.6.1. Robust Buffer Access of Vulkan 1.4.324 specification:
> Any non-atomic access to a uniform, storage, uniform texel, or storage
> texel buffer wider than 32-bits may be treated as multiple 32-bit
> accesses that are separately bounds checked.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36602>
2025-10-07 17:41:31 +00:00
Rhys Perry f905acfada aco: remove barrier acquire/release workaround
This existed since ccfe9813fb because NIR
had no atomic loads/stores. This is no longer the case.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36602>
2025-10-07 17:41:31 +00:00
Rhys Perry 271b135b03 aco: set atomic semantic for atomic load/store
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36602>
2025-10-07 17:41:30 +00:00
Rhys Perry 74b807cf58 aco: only workaround load tearing for atomic loads
For non-atomic loads, this situation would require a data race.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36602>
2025-10-07 17:41:30 +00:00
Rhys Perry 8fba196164 nir: assume non-atomic loads don't tear
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36602>
2025-10-07 17:41:30 +00:00
Rhys Perry 21187c4662 nir,vtn: add shader_info::assume_no_data_races
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com> (nir)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36602>
2025-10-07 17:41:30 +00:00
Rhys Perry f1b16a5a1a zink/ntv: use ACCESS_ATOMIC
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36602>
2025-10-07 17:41:30 +00:00
Rhys Perry e9d72ea65d vtn: set ACCESS_ATOMIC
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36602>
2025-10-07 17:41:30 +00:00
Rhys Perry 0dd09a292b nir: add ACCESS_ATOMIC
This is so that passes and backends can tell if a coherent load/store is
atomic or not, instead of having to assume it could be either.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36602>
2025-10-07 17:41:30 +00:00
Dhruv Mark Collins 4e762df664 tu/util: Allow setting all TU_DEBUG options from envvar and file
Due to the division of TU_DEBUG options into runtime and envvar
options, it limited where options could be set from when
TU_DEBUG_FILE was being used. This commit addresses that by allowing
the envvar to set runtime debug options even when TU_DEBUG_FILE is
active while also allowing the file to set non-runtime options if
the file included them at startup.

Signed-off-by: Dhruv Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37580>
2025-10-07 16:13:33 +00:00
Timur Kristóf c473b0b551 radv/amdgpu: Allow IB2 when primary CS isn't chained
The primary CS doesn't need to use chaining in order to use IB2.
Allow using IB2 packets when chaining is disabled.

Rationale for this patch:
When chaining is enabled (the default), this patch removes a
useless check.
When chaining is disabled (by noibchaining), this patch allows us
to use IB2 without chaining.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37280>
2025-10-07 15:49:02 +00:00
Timur Kristóf 503963c08c radv/amdgpu: Support IB2 without chaining, enable on GFX6
GFX6 supports IB2 but not chaining within an IB2.

To use IB2 on GFX6, disable chaining in secondary CS,
and emit an IB2 packet for each secondary IB.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37280>
2025-10-07 15:49:02 +00:00
Timur Kristóf 92ba76710d ac/gpu_info: Add can_chain_ib2 field to ac_gpu_info
GFX6 supports IB2, but not chaining inside IB2.
It only supports chaining in IB1.
See waCpIb2ChainingUnsupported in PAL.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37280>
2025-10-07 15:49:01 +00:00
Timur Kristóf 2091db2461 radv/amdgpu: Small cleanup of counting submitted IBs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37280>
2025-10-07 15:49:01 +00:00
Timur Kristóf fd5c50664e radv/amdgpu: Emit a single 4 dword NOP in chainable CS buffers
This is a small optimization that should slightly reduce the CP
overhead for all GPUs as we now only emit a single NOP packet
instead of 4.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37280>
2025-10-07 15:49:01 +00:00
Timur Kristóf e6a1355bd5 radv/amdgpu: Add a helper function to emit NOP packets
No functional changes, just make the code a bit easier to read.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37280>
2025-10-07 15:49:00 +00:00
Timur Kristóf e20080315b radv/amdgpu: Don't assert chaining match when copying secondary IB
This assertion is useless.

In this code path it is not relevant whether or not the primary
CS support chaining. And it is already handled when the secondary
has chaining.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37280>
2025-10-07 15:49:00 +00:00
Timur Kristóf df58cac660 radv: Rename RADV_DEBUG=noibs to noibchaining
Clarify what it actually means.
Also fix the documentation in envvars.rst to better describe it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37280>
2025-10-07 15:48:59 +00:00
Timur Kristóf 3902cffab7 radv/amdgpu: Rename use_ib to chain_ib
All CS always use IBs, so the naming was confusing.

Rename these fields to chain_ib to better reflect
what it actually means, which is enabling chaining:
radv_amdgpu_winsys::use_ib_bos
radv_amdgpu_cs::chain_ib

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37280>
2025-10-07 15:48:59 +00:00
Samuel Pitoiset e868e8d946 nir: adjust nir_tex_instr_need_sampler() for AMD FMASK instructions
These instructions don't need a sampler.

This doesn't fix anything now because this helper isn't unused yet, but
it will help for descriptor heap.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37720>
2025-10-07 15:22:47 +00:00
Georg Lehmann 84f26ed117 nir: optimize atomic isub if supported
Foz-DB Navi48:
Totals from 1 (0.00% of 80287) affected shaders:
Instrs: 1641 -> 1637 (-0.24%)
CodeSize: 8472 -> 8456 (-0.19%)
Latency: 19132 -> 19131 (-0.01%)
InvThroughput: 9566 -> 9565 (-0.01%)
Copies: 126 -> 125 (-0.79%)
VALU: 565 -> 563 (-0.35%)
SALU: 439 -> 438 (-0.23%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37702>
2025-10-07 14:07:56 +00:00
Georg Lehmann d514696a0c aco/isel: support nir_op_atomic_isub
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37702>
2025-10-07 14:07:56 +00:00
Georg Lehmann 65227ef325 ac/llvm: support nir_atomic_op_isub
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37702>
2025-10-07 14:07:56 +00:00
Georg Lehmann b0d3db3733 nir: add atomic isub
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37702>
2025-10-07 14:07:56 +00:00
Calder Young 2bfc62e825 isl: Fix noncoherent framebuffer fetch when base_level != 0
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37736>
2025-10-07 13:35:40 +00:00
Georg Lehmann a173e51541 aco/insert_waitcnt: don't merge waitcnts for LDS clauses
We form LDS clauses because heavily interleaving LDS and VALU leads to false
dependencies. But LDS is completely uncached, so splitting the clause with
waitcnts shouldn't hurt, it might even be beneficial because the first
LDS store can start earlier.

Foz-DB Navi48:
Totals from 170 (0.21% of 80287) affected shaders:
Instrs: 239633 -> 240148 (+0.21%)
CodeSize: 1276584 -> 1278532 (+0.15%)
Latency: 3788507 -> 3789876 (+0.04%); split: -0.01%, +0.04%
InvThroughput: 841637 -> 841694 (+0.01%); split: -0.01%, +0.02%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37701>
2025-10-07 13:12:45 +00:00
Samuel Pitoiset c177bf81b4 radv: fix expected disk cache size for meta shaders
Math can go wrong.

If the disk cache size is too small, buckets are evicted and this
might cause stuttering when starting applications.

Fixes: 4fc856af98 ("radv: fix caching on-demand meta shaders")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13930
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37718>
2025-10-07 12:50:41 +00:00
Rhys Perry dfa8ac6b91 aco: remove buffer_load_lds instructions
They don't exist

See https://github.com/llvm/llvm-project/pull/132916

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14041
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37716>
2025-10-07 09:50:26 +00:00
Samuel Pitoiset 08ddf2f878 radv: lower embedded/immutable samplers earlier
Lowering them earlier right after VTN would allow us to implement
embedded samplers for descriptor heap properly for merged shaders.

Non-immediate samplers are still lowered in
radv_nir_apply_pipeline_layout because they require shader arguments.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37688>
2025-10-07 09:25:28 +00:00
Samuel Pitoiset cb746e2d84 radv: lower ycbcr tex instructions earlier
There is no real advantage to delay this lowering.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37688>
2025-10-07 09:25:27 +00:00
Lionel Landwerlin 9cefd2ddf8 brw: avoid looking at variables to get image formats
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36773>
2025-10-07 08:54:26 +00:00
Lionel Landwerlin 96fbca133e iris: run image/intrinsic update pass
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36773>
2025-10-07 08:54:26 +00:00
Lionel Landwerlin 63d3c6379e anv: run image/intrinsic update pass
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36773>
2025-10-07 08:54:26 +00:00
Lionel Landwerlin 94f8d0072d nir: add pass to propagate image format to intrinsics
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36773>
2025-10-07 08:54:26 +00:00
Samuel Pitoiset b8bdc68933 radv/ci: update expected list of failures for VEGA10/NAVI10
Since a8f4a2a9ba ("radv/video: Check FW version before using
WRITE_MEMORY") presumably.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37733>
2025-10-07 08:06:54 +00:00
Martin Roukala (né Peres) 1514a851c8 turnip/ci: enable a750_vk in marge pipelines
The DUTs have been in use for over 2 weeks and the new jobs landed over
1 week ago, without new unknown problems cropping up (not bullet-proof
ethernet gadget).

Additionally, the high temperature (up to 95°C) was discussed with
@lumag and he is not concerned by it... so let's move the jobs to the
merge pipeline!

Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37612>
2025-10-07 07:44:35 +00:00
Jesse Natalie 0f1deaa286 dlist: Flush the context during EndList if it's part of a share group and uploaded during recording
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37644>
2025-10-06 23:54:09 +00:00
Jesse Natalie 9bab6eb596 wgl: Fix zink depth buffers
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37644>
2025-10-06 23:54:09 +00:00
Caio Oliveira 7b75bf0759 intel/executor: Expose extra command line arguments to script
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37647>
2025-10-06 23:39:37 +00:00
Eric Engestrom d31f468ad8 Revert "meson: use vcs_tag() instead of custom script"
This reverts commit e4edf9203b.

Meson is unfortunately not quite ready yet, and prints stderr noise when
_not_ building from a git clone.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37717>
2025-10-06 23:06:11 +00:00
Connor Abbott e5353fd917 tu: Reset *_BIN_FOVEAT when not using FDM
Don't let old values from a previous renderpass through.

Fixes: b34b089ca1 ("tu: Use GRAS bin offset registers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37723>
2025-10-06 22:42:32 +00:00
Lionel Landwerlin f8cbc558db vulkan/render_pass: fixup renderpasses barriers for 2D views of 3D images
With maintenance9 enabled

Spec clarification : https://gitlab.khronos.org/vulkan/vulkan/-/merge_requests/7629

Fixes: 595889018a ("anv: implement VK_KHR_maintenance9")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13669
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36624>
2025-10-06 22:20:26 +00:00
Juan A. Suarez Romero d775f3b608 ci: uprev VKCTS to 1.4.3.3
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37620>
2025-10-06 21:53:39 +00:00
Benjamin Cheng 364a2488ad radv/video: Report extra image usages
ENCODE_SRC and DECODE_DST are transparent and can have additional
usages.

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37656>
2025-10-06 21:27:48 +00:00
Benjamin Cheng d1872c45ae radv/video: Fix video profile reporting
Use vk_video_is_profile_supported first, and add AMD specific
restrictions later.

vulkaninfo reports on Navi31:
    H.264 Decode (4:2:0 8-bit) Baseline progressive
    H.264 Decode (4:2:0 8-bit) Main progressive
    H.264 Decode (4:2:0 8-bit) High progressive
    H.264 Decode (4:2:0 8-bit) Baseline interlaced (interleaved lines)
    H.264 Decode (4:2:0 8-bit) Main interlaced (interleaved lines)
    H.264 Decode (4:2:0 8-bit) High interlaced (interleaved lines)
    H.264 Decode (monochrome 8-bit) High progressive
    H.264 Decode (monochrome 8-bit) High interlaced (interleaved lines)
    H.265 Decode (4:2:0 8-bit) Main
    H.265 Decode (4:2:0 8-bit) Main 10
    H.265 Decode (4:2:0 8-bit) Main Still Picture
    H.265 Decode (4:2:0 10-bit) Main 10
    VP9 Decode (4:2:0 8-bit) Profile 0
    VP9 Decode (4:2:0 10-bit) Profile 2
    AV1 Decode (4:2:0 8-bit) Main with film grain support
    AV1 Decode (4:2:0 8-bit) Main without film grain support
    AV1 Decode (4:2:0 10-bit) Main with film grain support
    AV1 Decode (4:2:0 10-bit) Main without film grain support
    AV1 Decode (4:2:0 12-bit) Professional with film grain support
    AV1 Decode (4:2:0 12-bit) Professional without film grain support
    AV1 Decode (monochrome 8-bit) Main with film grain support
    AV1 Decode (monochrome 8-bit) Main without film grain support
    AV1 Decode (monochrome 10-bit) Main with film grain support
    AV1 Decode (monochrome 10-bit) Main without film grain support
    AV1 Decode (monochrome 12-bit) Professional with film grain support
    AV1 Decode (monochrome 12-bit) Professional without film grain support
    H.264 Encode (4:2:0 8-bit) Baseline
    H.264 Encode (4:2:0 8-bit) Main
    H.264 Encode (4:2:0 8-bit) High
    H.265 Encode (4:2:0 8-bit) Main
    H.265 Encode (4:2:0 8-bit) Main 10
    H.265 Encode (4:2:0 8-bit) Main Still Picture
    H.265 Encode (4:2:0 10-bit) Main 10
    AV1 Encode (4:2:0 8-bit) Main
    AV1 Encode (4:2:0 10-bit) Main

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37656>
2025-10-06 21:27:48 +00:00
Benjamin Cheng 5e297c7444 vulkan/video: Add vk_video_is_profile_supported()
This helper sanity-checks a VkVideoProfileInfoKHR to make sure it
represents a real profile corresponding to specific codec rules.

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37656>
2025-10-06 21:27:47 +00:00
Mike Blumenkrantz e12d019b9d zink: various fixes for custom sample locations
this is still not technically correct, as I'm seeing some weird fails
on ANV, at least, and also it maybe needs a pass to strip InterpolateAtSample
(related?), but it is now actually enabling custom sample locations

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37618>
2025-10-06 19:51:44 +00:00