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13148 Commits

Author SHA1 Message Date
Caio Oliveira 3988d901ac meson: Remove unnecessary inc_compiler mentions 
The inc_compiler should come as part of idep_compiler, idep_nir or
idep_nir_headers dependency.

Acked-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> (v3dv)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25314>
 2023-09-22 14:52:50 +00:00
Helen Koike 9442571664 ci: separate hiden jobs to -inc.yml files 
make it easier to re-use the hidden jobs by other project (e.g. linux)
without enabling the executable jobs.

Signed-off-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25238>
 2023-09-22 14:12:29 +00:00
Konstantin Seurer 24555cdbbd aco/spill: Make sure that offset stays in bounds 
If a shader spills a lot, the offset can be above the HW limit.

cc: mesa-stable

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24652>
 2023-09-22 06:30:01 +00:00
Martin Roukala (né Peres) 065ff21bf2 radv/ci: add more tests to the navi10 vkcts flake list 
Since I had to aggregate the results of a lot of run, this commit also
ends up ordering some of the flakes to fit the alphabetical order.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25324>
 2023-09-21 17:59:05 +00:00
Martin Roukala (né Peres) 8c98ee6f3a radv/ci: move vkcts-navi10 testing to KWS 
We now have 2 more navi10 DUTs at KWS, so let's use them to speed
up vkcts testing!

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25324>
 2023-09-21 17:59:05 +00:00
Georg Lehmann 336ec2a4b4 aco: simplify masked swizzle dpp selection by removing or_mask first 
and_mask and xor_mask alone can represent all patterns without or_mask

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25115>
 2023-09-21 10:07:27 +00:00
Connor Abbott c93bcb32fe amd: Use inverse ballot intrinsic if available 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25123>
 2023-09-20 14:41:18 +00:00
Connor Abbott 4282386311 nir/spirv: Add inverse_ballot intrinsic 
This is actually a no-op on AMD, so we really don't want to lower it to
something more complicated.  There may be a more efficient way to do
this on Intel too. In addition, in the future we'll want to use this for
lowering boolean reduce operations, where the inverse ballot will
operate on the backend's "natural" ballot type as indicated by
options->ballot_bit_size, instead of uvec4 as produced by SPIR-V. In
total, there are now three possible lowerings we may have to perform:

- inverse_ballot with source type of uvec4 from SPIR-V to inverse_ballot
with natural source type, when the backend supports inverse_ballot
natively.
- inverse_ballot with source type of uvec4 from SPIR-V to arithmetic,
when the backend doesn't support inverse_ballot.
- inverse_ballot with natural source type from reduce operation, when
the backend doesn't support inverse_ballot.

Previously we just did the second lowering unconditionally in vtn, but
it's just a combination of the first and third. We add support here for
the first and third lowerings in nir_lower_subgroups, instead of simply
moving the second lowering, to avoid unnecessary churn.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25123>
 2023-09-20 14:41:18 +00:00
Konstantin Seurer 2993853f49 radv/rt: Skip cull_mask handling if it is FF 
Totals from 9 (1.32% of 680) affected shaders:
Instrs: 609329 -> 609057 (-0.04%)
CodeSize: 3267328 -> 3265664 (-0.05%)
Latency: 8289582 -> 8275874 (-0.17%)
InvThroughput: 2166498 -> 2163147 (-0.15%)
VClause: 23581 -> 23583 (+0.01%)
Copies: 51076 -> 51028 (-0.09%)
Branches: 24637 -> 24603 (-0.14%)
PreVGPRs: 996 -> 986 (-1.00%)

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25268>
 2023-09-20 13:00:03 +00:00
Konstantin Seurer e0cf4fbf38 radv/ray_queries: Skip cull_mask handling if it is FF 
Stats for Metro Exodus:

Totals from 26 (0.99% of 2627) affected shaders:
Instrs: 14586 -> 14232 (-2.43%)
CodeSize: 77024 -> 75192 (-2.38%)
VGPRs: 1408 -> 1208 (-14.20%)
Latency: 315076 -> 309898 (-1.64%)
InvThroughput: 42345 -> 41677 (-1.58%)
VClause: 366 -> 374 (+2.19%)
Copies: 2840 -> 2800 (-1.41%); split: -1.48%, +0.07%
Branches: 587 -> 561 (-4.43%)
PreSGPRs: 897 -> 853 (-4.91%)
PreVGPRs: 1290 -> 1122 (-13.02%)

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25268>
 2023-09-20 13:00:03 +00:00
Konstantin Seurer 3e7850f97b radv/bvh: Treat instances with mask == 0 as inactive 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25268>
 2023-09-20 13:00:03 +00:00
Samuel Pitoiset 67ed899cd6 radv: remove absolute_depth_bias workaround 
This was only used with Path of Exile and the game bug seems fixed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25198>
 2023-09-19 07:53:51 +00:00
Samuel Pitoiset 604a9b7fae ac/perfcounter: add GFX11 groups 
Source from PAL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25245>
 2023-09-19 07:24:38 +00:00
Samuel Pitoiset 0925d0d042 ac/perfcounter: add SG_WQP group for GFX11 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25245>
 2023-09-19 07:24:38 +00:00
Samuel Pitoiset 041d1150c1 radv: fix missing ISA with RGP and GPL 
The pipeline hash is required for RGP to correctly report the ISA, so
it should be computed for fast-linked pipelines with GPL (libraries
aren't captured).

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9169
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25275>
 2023-09-19 06:50:59 +00:00
Samuel Pitoiset c314bc2ab9 radv: fix checking if RGP is enabled with others tracing tools 
This is a bitmask.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25275>
 2023-09-19 06:50:59 +00:00
Alyssa Rosenzweig d1eb17e92e treewide: Drop nir_ssa_for_src users 
Via Coccinelle patch:

    @@
    expression b, s, n;
    @@

    -nir_ssa_for_src(b, *s, n)
    +s->ssa

    @@
    expression b, s, n;
    @@

    -nir_ssa_for_src(b, s, n)
    +s.ssa

Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25247>
 2023-09-18 10:25:17 -04:00
Rhys Perry f6f9c07efe radv: disable mesh dispatch XYZ_DIM when possible 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25222>
 2023-09-18 12:04:06 +00:00
Rhys Perry 6dd751b3b9 aco: remove unused p_logical_end check when optimizing branching sequence 
I don't see why a p_logical_end is expected or required. It might not be
present in some situations, which causes an assertion failure:
 s2: %19646:s[0-1] = p_reload %19701:v[8], 11
 s2: %0:exec,  s1: %8817:scc = s_andn2_b64 %19646:s[0-1], %0:exec
 s2: %8818:s[20-21] = p_cbranch_z %0:exec BB1116, BB1114

No fossil-db changes (gfx1100).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25244>
 2023-09-18 11:19:28 +00:00
Rhys Perry 8d5bd3ca48 aco: check logical_phi_info at p_logical_end when eliminating exec writes 
This is when the copies actually happen, not at the branch.

fossil-db (gfx1100):
Totals from 1 (0.00% of 79332) affected shaders:
Instrs: 424 -> 423 (-0.24%)
CodeSize: 2172 -> 2168 (-0.18%)
Latency: 2899 -> 2896 (-0.10%)
Copies: 24 -> 23 (-4.17%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25244>
 2023-09-18 11:19:28 +00:00
Rhys Perry ac48334ecd aco/optimizer_postRA: check overwritten_subdword in is_overwritten_since() 
Fixes crash for
dEQP-VK.mesh_shader.ext.in_out.with_f16.permutation_0.mesh_only and
similar tests on GFX11.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 3d29779a25 ("aco/optimizer_postRA: Distinguish overwritten untrackable and subdword.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25223>
 2023-09-18 10:26:16 +00:00
Samuel Pitoiset fa4d4f84a1 ac/spm: enable support for multi-instance counters 
This is what RGP expects and this will give us more fine grained
results given that all shader engines/shader arrays etc would be
sampled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
 2023-09-18 07:07:32 +00:00
Samuel Pitoiset 414783162a ac/spm: move the counter instance to ac_spm_counter_create_info 
This will allow us to configure multi-instance counters.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
 2023-09-18 07:07:32 +00:00
Samuel Pitoiset d5a5473185 ac,radv,radeonsi: prepare support for multi-instance SPM generic counters 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
 2023-09-18 07:07:31 +00:00
Samuel Pitoiset ed0d3d8cbd ac,radv,radeonsi: prepare support for multi-instance SPM SQ counters 
Each SQG modules can configure up to 16 counters.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
 2023-09-18 07:07:31 +00:00
Samuel Pitoiset af4d4f5203 ac/spm: fix number of instances of GL2C 
It's a global block, so the number of instances is equal.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
 2023-09-18 07:07:31 +00:00
Samuel Pitoiset 0e4d5b171a radv,radeonsi: make sure to emit GRBM_GFX_INDEX before SQ select registers 
This was missing, but not sure if it was required given that only the
first SE is currently sampled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
 2023-09-18 07:07:31 +00:00
Samuel Pitoiset 3e8922d9f7 ac/spm: select correct segment type for per-SE blocks 
This currently does nothing because only the first instance is used,
but this will be needed for multi-instance.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
 2023-09-18 07:07:31 +00:00
Samuel Pitoiset 033e49995d ac/spm: use block flags to initialize instance mapping 
This simplify this a bit, ideally we would also have a per-SA flag
for performance counters.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
 2023-09-18 07:07:31 +00:00
Samuel Pitoiset 037d7d0f5b radv: reserve more CS space in SQTT/SPM paths 
This will prevent an assertion when SPM will emit more counters.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
 2023-09-18 07:07:31 +00:00
Konstantin Seurer 73fec95358 radv: Remove ray tracing shader module identifier skips 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25142>
 2023-09-14 16:07:46 +00:00
Konstantin Seurer 28dcc5959d radv/rt: Handle stages without nir properly 
Fixes: e039e3cd76 ('radv/rt: Store NIR shaders separately')
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25142>
 2023-09-14 16:07:46 +00:00
Konstantin Seurer 3fd9894e3a radv: Update navi21 llvm fails 
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25010>
 2023-09-14 15:39:39 +00:00
Konstantin Seurer 77bf1408f3 radv: Don't advertise features requiring PS epilogs with LLVM 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25010>
 2023-09-14 15:39:39 +00:00
Konstantin Seurer 4c168635f8 ac/llvm: Use float types for float atomics 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25010>
 2023-09-14 15:39:39 +00:00
Konstantin Seurer 60e7b1c69c ac/llvm: Use the correct return type for uadd_carry and usub_borrow 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25010>
 2023-09-14 15:39:39 +00:00
Konstantin Seurer 3ae0562c23 ac/llvm: Fix typed loads with 16bit formats 
For some reason, LLVM can't handle those. Emit a 32bit load and type
conversion instead,

Fixes: 22ca8c8 ("ac/llvm: Implement typed buffer load intrinsic.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25010>
 2023-09-14 15:39:38 +00:00
Konstantin Seurer 0cada27826 radv/ci: Improve ray tracing skips 
I didn't know they were regexes. This also excludes all "1048576" tests.
They build an acceleration structure with 1 primitive 1048576 times
which only warms up the Valve farm and doesn't accomplish anything else.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24720>
 2023-09-14 15:12:44 +00:00
Konstantin Seurer 97b1caf9f6 radv: Perform multiple sorts in parallel 
This was the last part that didn't scale with multiple infos. Reducing
the amount of barriers in this case improves DOOM Eternal performance by
50%. (Running with low resolution)

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24720>
 2023-09-14 15:12:44 +00:00
Konstantin Seurer 44c47054bc radv/radix_sort: Vendor the radix sort dispatch code 
This needs to be done so we can optimize it for occpuancy when building
multiple acceleration structures in parallel. Changes to the original
code:

- Change // to /* */
- clang-format
- Replace vkCmd calls with calls to the driver entrypoints
- Add a light weight info struct
- Use radv_fill_buffer directly

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24720>
 2023-09-14 15:12:44 +00:00
Konstantin Seurer 1cacc64ea7 radv: Remove dead radix_sort_vk_get_memory_requirements call 
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24720>
 2023-09-14 15:12:43 +00:00
Samuel Pitoiset 84390c5c98 ac/spm: initialize and set instance mapping for counters 
This configures global, per-SE and per-SA counters with different
indexes. This is still unused because only for the first instance is
used by RADV/RadeonSI, but this will be changed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25211>
 2023-09-14 14:17:19 +00:00
Samuel Pitoiset 0864a7dfa9 ac/spm: rework how segment muxsel RAM are filled 
This is more close to PAL and it will be easier to add GFX11 support
on top of it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25211>
 2023-09-14 14:17:19 +00:00
Samuel Pitoiset 6ae64900e2 ac/spm: fix checking if the counter instance is valid 
This should be compared against the number of global instances, and
there is also an off-by-one error.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25211>
 2023-09-14 14:17:19 +00:00
Samuel Pitoiset 90d9406436 ac/perfcounter: compute the number of global instances of TCP,SQ,GL1C and GL2C 
This will be used by SPM.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25211>
 2023-09-14 14:17:19 +00:00
Samuel Pitoiset 60cb257d26 ac/perfcounter: set the number of instances of GL1C to 4 
According to PAL there is 4 GL1C quadrants. This will also be used
by SPM.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25211>
 2023-09-14 14:17:18 +00:00
Samuel Pitoiset 10dc97b20f ac/gpu_info: init num_cu_per_sh from the kernel 
This will be used to configure the number of instances of TCP.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25211>
 2023-09-14 14:17:18 +00:00
Samuel Pitoiset 9552716208 ac/spm: add SPM block definition for GFX10-GFX10.3 
Instead of using magic values.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25211>
 2023-09-14 14:17:18 +00:00
Samuel Pitoiset b1ce30539b ac/spm: remove useless SPM block setting for GFX9 and older GPUs 
SPM is only implemented for GFX10+ on RADV/RadeonSI, although it's
technically possible on GFX9 but unused by RGP, so don't care.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25211>
 2023-09-14 14:17:18 +00:00
Samuel Pitoiset 303184e4e5 radv,radeonsi: use AC_SPM_SEGMENT_TYPE_xxx instead of magic values 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25211>
 2023-09-14 14:17:18 +00:00