radv,radeonsi: make sure to emit GRBM_GFX_INDEX before SQ select registers
This was missing, but not sure if it was required given that only the first SE is currently sampled. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
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@@ -65,7 +65,11 @@ radv_emit_spm_counters(struct radv_device *device, struct radeon_cmdbuf *cs, enu
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const enum amd_gfx_level gfx_level = device->physical_device->rad_info.gfx_level;
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struct ac_spm *spm = &device->spm;
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radeon_check_space(device->ws, cs, spm->num_used_sq_block_sel * 3);
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radeon_check_space(device->ws, cs, 3 + spm->num_used_sq_block_sel * 3);
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radeon_set_uconfig_reg(
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cs, R_030800_GRBM_GFX_INDEX,
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S_030800_SH_BROADCAST_WRITES(1) | S_030800_INSTANCE_BROADCAST_WRITES(1) | S_030800_SE_INDEX(0));
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for (uint32_t b = 0; b < spm->num_used_sq_block_sel; b++) {
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struct ac_spm_block_select *sq_block_sel = &spm->sq_block_sel[b];
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@@ -733,6 +733,11 @@ si_emit_spm_counters(struct si_context *sctx, struct radeon_cmdbuf *cs)
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radeon_begin(cs);
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radeon_set_uconfig_reg(R_030800_GRBM_GFX_INDEX,
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S_030800_SH_BROADCAST_WRITES(1) |
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S_030800_INSTANCE_BROADCAST_WRITES(1) |
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S_030800_SE_INDEX(0));
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for (uint32_t b = 0; b < spm->num_used_sq_block_sel; b++) {
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struct ac_spm_block_select *sq_block_sel = &spm->sq_block_sel[b];
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const struct ac_spm_counter_select *cntr_sel = &sq_block_sel->counters[0];
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