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Author SHA1 Message Date
Samuel Pitoiset 4d33d3f507 radv: add radv_bind_{graphics,rt,compute}_pipeline() helpers 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38004>
 2025-10-24 05:59:06 +00:00
Samuel Pitoiset 54a6c81d3a radv: dirty dynamic descriptors when required 
The user SGPRS might be different and dynamic descriptors need to be
re-emitted again

This fixes a regression with ANGLE, and VCKTS is currently missing
coverage.

Fixes: a47952d495 ("radv: upload and emit dynamic descriptors separately from push constants")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14146
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38004>
 2025-10-24 05:59:06 +00:00
Faith Ekstrand 998dbd43d3 nvk: Capture/replay buffer addresses for EDB capture/replay 
Fixes: 3f1c3f04be ("nvk: Advertise VK_EXT_descriptor_buffer")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38040>
 2025-10-24 02:57:04 +00:00
Faith Ekstrand a13474939d nvk: Look at the right pointer in GetDescriptorInfo for SSBOs 
It doesn't actually matter but we shouldn't poke at the wrong union
field.

Fixes: 77db71db7d ("nvk: Implement GetDescriptorEXT")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38040>
 2025-10-24 02:57:04 +00:00
Faith Ekstrand d39221cef3 nvk: Emit inactive vertex attributes 
VK_KHR_maintenance9 requires that vertex attributes in shaders which map
to vertex attributes that aren't bound at the API return a consistent
value.  In order to do this, we need toemit SET_VERTEX_ATTRIBUTE_A, even
for unused attributes.  The RGBA32F format was chosen to ensure we
return (0, 0, 0, 0) from unbound attributes.

Fixes: 7692d3c0e1 ("nvk: Advertise VK_KHR_maintenance9")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38040>
 2025-10-24 02:57:04 +00:00
Qiang Yu e36c277af9 radeonsi: init task shader args 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:18 +00:00
Qiang Yu 69c10426a4 radeonsi: don't put descs in user sgpr for task shader 
task shader know user sgprs after shader variant creation
for draw_id arg. Simply disable this optimization for task
shader now.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:18 +00:00
Qiang Yu a7bccad3f2 radeonsi: add radeon_emit_alt_hiz_packets for mesh shader 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:17 +00:00
Qiang Yu 644061fdbc radeonsi: add si_emit_buffered_gfx_sh_regs_for_mesh 
For mesh shader support.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:16 +00:00
Qiang Yu 04912c585c radeonsi: lower mesh shader outputs 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:16 +00:00
Qiang Yu ca43c361bd radeonsi: handle primitive indices for mesh shader 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:15 +00:00
Qiang Yu 01fc4efd77 radeonsi: support fragment shader per primitive input 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:15 +00:00
Qiang Yu dfc679e791 radeonsi: support mesh shader per primitive output 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:15 +00:00
Qiang Yu 16656ebaaf radeonsi: compute vs_output_ps_input_cntl for mesh shader 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:14 +00:00
Qiang Yu a982e5bb8a radeonsi: add mesh shader bits for dirty_shaders_mask 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:14 +00:00
Qiang Yu 0ddc1d21f2 radeonsi: dump shader key for mesh shader 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:13 +00:00
Qiang Yu f513d47266 radeonsi: compile mesh shader with ACO only 
RADV only support mesh shader with ACO. So left LLVM
support later.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:13 +00:00
Qiang Yu fc81d7e7d4 radeonsi: si_select_hw_stage support mesh shader 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:13 +00:00
Qiang Yu 351070c46c radeonsi: si_get_output_prim_simplified support mesh shader 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:12 +00:00
Qiang Yu 8ef07d4d8b radeonsi: support mesh shader per vertex output 
mesh shader uses per vertex output store, and
si_nir_assign_param_offsets assert output store to be
scalar.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:12 +00:00
Qiang Yu 845f333111 radeonsi: select key for mesh shader 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:11 +00:00
Qiang Yu e42ada1723 radeonsi: add mesh shader debug options 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:11 +00:00
Qiang Yu 282a0ae20c radeonsi: add mesh shader state create/delete/bind 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:10 +00:00
Qiang Yu 8cae067adc radeonsi: export si_set_user_data_base for mesh shader usage 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:10 +00:00
Qiang Yu 43cf109f47 radeonsi: emit shader pointer for mesh shader 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:09 +00:00
Qiang Yu a44d91d065 radeonsi: call si_shader_change_notify when vs bind 
vs may be null when mesh shader enabled. mesh shader and
vertex shader may share the GS user sgpr, so need to call
si_shader_change_notify to mark shader pointers dirty.

Also remove some init code which will be done anyway when
vs bind first shader in si_shader_change_notify now.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
 2025-10-24 02:07:09 +00:00
Ian Romanick f1bbc3d4e4 nir/algebraic: Don't generate integer min or max that will need to be lowered 
In !35844, there was some discussion about allowing 64-bit bcsel that
would be lowered in the driver. One challenge there would be if a 64-bit
bcsel was transformed into integer min or max by an algebraic
optimization. I believe these were the only algebraic patterns that
could create new integer min or max that would not be immediately
constant folded.

There were no shader-db or fossil-db changes on any Intel platform.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38033>
 2025-10-23 22:35:27 +00:00
Caio Oliveira 6fe5d7b0a4 intel/mda: Allow to specify directories with -f 
If you have before/after mda files in separate directories, this make
easier to import them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37806>
 2025-10-23 22:21:14 +00:00
Jordan Justen 84a67b5ab4 intel/dev: Add NVL-S/U PCI IDs (with FORCE_PROBE required) 
Ref: bspec 74201
Ref: https://gitlab.freedesktop.org/drm/xe/kernel/-/commit/c002b1764e7b0ffd181f32d5103d9d0ac283beeb
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38020>
 2025-10-23 21:47:29 +00:00
Jordan Justen ac1a7e19e8 intel/dev: Add NVL-S/U device info 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38020>
 2025-10-23 21:47:29 +00:00
Jordan Justen 84bba237ca intel/dev: Add INTEL_PLATFORM_NVL_U platform enum 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38020>
 2025-10-23 21:47:28 +00:00
Mauro Rossi 7bbbfa6670 util: Fix gnu-empty-initializer error 
Fixes the following building error happening with clang:

../src/util/os_file.c:291:29: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
   struct epoll_event evt = {};
                            ^
1 error generated.

Fixes: 17e28652 ("util: mimic KCMP_FILE via epoll when KCMP is missing")
Cc: "25.3"
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37944>
 2025-10-23 21:11:30 +00:00
Connor Abbott 8d276e0d70 tu: Fix RT count with remapped color attachments 
The index of each RT is the remapped color attachment index, so we have
to use the remapped indices when telling the HW the number of RTs.

This fixes KHR-GLES3.framebuffer_blit.scissor_blit on ANGLE once we
enabled VK_EXT_multisampled_render_to_single_sampled, which switched
ANGLE to using dynamic rendering with
VK_KHR_dynamic_rendering_local_read.

Fixes: d50eef5b06 ("tu: Support color attachment remapping")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37990>
 2025-10-23 20:17:32 +00:00
Zan Dobersek 75da8229f9 tu: don't advertise sample location support for VK_SAMPLE_COUNT_1_BIT 
Hardware doesn't support programmable sample locations with 1x MSAA, so
VK_SAMPLE_COUNT_1_BIT shouldn't be included in the
VkPhysicalDeviceSampleLocationsPropertiesEXT::sampleLocationSampleCounts
bitmask. With this sample count MSAA will also be disabled through relevant
control registers, effectively forcing all samples to the center position.

Fixes failures in VK_SAMPLE_COUNT_1_BIT tests under
dEQP-VK.pipeline.*.*.sample_locations_ext.verify_interpolation.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38026>
 2025-10-23 19:46:23 +00:00
Lionel Landwerlin 2689056c82 anv: destroy sets when destroying pool 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14169
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38035>
 2025-10-23 19:25:21 +00:00
Lionel Landwerlin e450297ea9 anv/brw: fix output tcs vertices 
brw_prog_tcs_data::instances can be divided by vertices per threads on
earlier generations.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a91e0e0d61 ("brw: add support for separate tessellation shader compilation")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38036>
 2025-10-23 18:54:05 +00:00
Felix DeGrood cbcfaca647 intel/ds: reduce min sampling period of pps-producer to 5us 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37991>
 2025-10-23 18:22:20 +00:00
Sushma Venkatesh Reddy 69dc01405d intel/perf: Update perf scripts to get additional performance counters 
There are a number of metrics that are of interest for compute workloads
analysis which were missing in the initial PTL OA support (MR: 35298).
Updated oa_ptl.xml file provides these metrics.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13663
Tested-by: Arselan Alvi <arselan.alvi@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37072>
 2025-10-23 16:59:09 +00:00
Sushma Venkatesh Reddy 44c1dcd0ed intel/dev: Add geometry, color and depth pipes count 
Geometry, Color and Depth pipelines count are needed for collecting some
metrics from perfetto.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37072>
 2025-10-23 16:59:09 +00:00
Felix DeGrood f448a4668b intel/tools: add cmdbuf/queue annotation parsing 
intel_measure now prints annotations when using '--verbose'.

Filter out internal Renderdoc events when using '--trace'

Reviewed-by: Casey Bowman <casey.g.bowman@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37983>
 2025-10-23 15:31:10 +00:00
Felix DeGrood a21de67fdd intel/tools: make eop default 
Reviewed-by: Casey Bowman <casey.g.bowman@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37983>
 2025-10-23 15:31:10 +00:00
Felix DeGrood 8c10226374 intel/tools: add eop timestamp to intel_measure 
Adds end of pipe to end of pipe timestamp parsing. Does not require
inserting stall between events to get accurate values but events
will sometimes be running in parallel.

Reviewed-by: Casey Bowman <casey.g.bowman@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37983>
 2025-10-23 15:31:09 +00:00
Felix DeGrood 5ba9776bc5 intel/tools: make frame and cb index base-0 in intel_measure 
Better reflects original utrace data.

Reviewed-by: Casey Bowman <casey.g.bowman@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37983>
 2025-10-23 15:31:09 +00:00
Samuel Pitoiset 3440272406 radv/ci: update comments around video failures 
They are expected failures and they will always fail unless we have
new firmwares (which is unlikely to happen).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38021>
 2025-10-23 16:56:26 +02:00
Samuel Pitoiset f5384df105 radv/ci: stop skipping dEQP-VK.descriptor_indexing.* on Cezanne 
The fix is included in VKCTS now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38021>
 2025-10-23 16:56:26 +02:00
Xaver Hugl 14fcf145e3 vulkan/wsi: remove support for VK_COLOR_SPACE_EXTENDED_SRGB_NONLINEAR_EXT 
It's not really clear whether or not it should use gamma 2.2 or the piece-wise
transfer function, or how clients would use it for wider gamut in general.
Currently no compositors I know of support ext_srgb, so this shouldn't affect
applications in practice.

Signed-off-by: Xaver Hugl <xaver.hugl@kde.org>
Fixes: 4b663d56 ("vulkan/wsi: implement support for VK_EXT_hdr_metadata on Wayland")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36444>
 2025-10-23 13:02:32 +00:00
Simon Perretta c60232c0c5 pvr: temporarily disable gs_rta_support on all cores 
The gs_rta_support feature is currently bugged and may cause the
driver to assert; disabling it will instead use a fallback method
which is functional.

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38024>
 2025-10-23 13:18:56 +01:00
Alejandro Piñeiro 75eee7f38b panfrost: cleanup outputs_read/outputs_written at pan_shader_info 
With this commit we do two things:

  * Remove pan_shader_info.fs.outputs_written because it is not used,
    as there is already pan_shader_info.outputs_written

  * For pan_shader_info.fs.outputs_read we direcly copy the nir
    info.outputs_read, without a shift, for consistency and also
    because it is not really required.

Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38022>
 2025-10-23 11:57:37 +00:00
Rhys Perry f3ff2375ec ac/nir: don't consider quads incomplete inside loops 
We move terminates to outside loops, so this doesn't matter anymore.

fossil-db (gfx1201):
Totals from 145 (0.18% of 79839) affected shaders:
Instrs: 174693 -> 174389 (-0.17%); split: -0.18%, +0.01%
CodeSize: 917068 -> 915692 (-0.15%); split: -0.16%, +0.01%
VGPRs: 8340 -> 8184 (-1.87%)
Latency: 2528888 -> 2521006 (-0.31%); split: -0.48%, +0.16%
InvThroughput: 502383 -> 504082 (+0.34%); split: -0.44%, +0.78%
Copies: 15968 -> 15632 (-2.10%); split: -2.14%, +0.04%
PreVGPRs: 5918 -> 5858 (-1.01%)
VALU: 92802 -> 92484 (-0.34%); split: -0.35%, +0.01%
SALU: 29437 -> 29430 (-0.02%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37561>
 2025-10-23 11:22:02 +00:00
Rhys Perry 9babec1366 radv,radeonsi: use optimize_txd 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37561>
 2025-10-23 11:22:01 +00:00