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7563 Commits

Author SHA1 Message Date
Samuel Pitoiset 77d6fda0f5 nir/algebraic: distribute imul(iadd(a, b), c) when b and c are constants 
This distributes imul(iadd(a, b), c) to iadd(imul(a, c), b * c)
when both b and c are constants. This might allow some compiler
backends to create more MADs.

For ACO, this allows to combine more DS additions.

fossilds-db (Vega10):
Totals from 673 (0.49% of 136546) affected shaders:
VGPRs: 44548 -> 44516 (-0.07%); split: -0.11%, +0.04%
CodeSize: 8301552 -> 8286220 (-0.18%); split: -0.19%, +0.01%
MaxWaves: 2731 -> 2735 (+0.15%); split: +0.26%, -0.11%
Instrs: 1642684 -> 1638725 (-0.24%); split: -0.24%, +0.00%
Cycles: 20846156 -> 20793444 (-0.25%); split: -0.25%, +0.00%
VMEM: 108870 -> 108106 (-0.70%); split: +0.03%, -0.73%
SMEM: 35718 -> 35674 (-0.12%); split: +0.22%, -0.34%
VClause: 20603 -> 20622 (+0.09%); split: -0.01%, +0.10%
SClause: 48527 -> 48539 (+0.02%)
Copies: 156735 -> 156742 (+0.00%); split: -0.05%, +0.05%
PreSGPRs: 43169 -> 43166 (-0.01%); split: -0.02%, +0.02%
PreVGPRs: 41369 -> 41330 (-0.09%)

shader-db results on Intel:
Ice Lake
total instructions in shared programs: 20027588 -> 20027446 (<.01%)
instructions in affected programs: 71766 -> 71624 (-0.20%)
helped: 70
HURT: 0
helped stats (abs) min: 1 max: 7 x̄: 2.03 x̃: 1
helped stats (rel) min: 0.10% max: 2.50% x̄: 0.29% x̃: 0.15%
95% mean confidence interval for instructions value: -2.42 -1.64
95% mean confidence interval for instructions %-change: -0.38% -0.20%
Instructions are helped.

total cycles in shared programs: 977525222 -> 977494323 (<.01%)
cycles in affected programs: 8884593 -> 8853694 (-0.35%)
helped: 56
HURT: 16
helped stats (abs) min: 2 max: 7852 x̄: 681.29 x̃: 400
helped stats (rel) min: <.01% max: 19.84% x̄: 2.79% x̃: 0.41%
HURT stats (abs)   min: 2 max: 1212 x̄: 453.31 x̃: 120
HURT stats (rel)   min: 0.05% max: 1.09% x̄: 0.32% x̃: 0.11%
95% mean confidence interval for cycles value: -802.75 -55.56
95% mean confidence interval for cycles %-change: -3.19% -1.01%
Cycles are helped.

total sends in shared programs: 1032273 -> 1032272 (<.01%)
sends in affected programs: 41 -> 40 (-2.44%)
helped: 1
HURT: 0

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7445>
 2020-11-06 07:49:02 +00:00
Dave Airlie 9790fdf2ce vtn/opencl: add ctz support 
ctz is a CL2.0 opcode but 3.0 requires it as well so just add support
for it.

Tested against CTS integer_ops integer_ctz test.

(long line broken up)

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7468>
 2020-11-06 17:03:05 +10:00
Jason Ekstrand 03683b9b2e nir: Handle ray-tracing intrinsics and storage classes in copy-prop etc. 
We need to consider shader calls as potential writes to their payloads.
For other ray-tracing intrinsics, we may not have a shader payload
pointer and have to treat them more like a barrier.  We also need to
ensure that global and SSBO reads/writes aren't propagated across shader
call intrinsics.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
 2020-11-05 23:36:46 +00:00
Jason Ekstrand 5a28893279 spirv,nir: Add ray-tracing intrinsics 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
 2020-11-05 23:36:46 +00:00
Jason Ekstrand 21b1b91549 nir,spirv: Add support for the ShaderCallKHR scope 
It's currently entirely trivial.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
 2020-11-05 23:36:46 +00:00
Jason Ekstrand 6b8fd65e84 spirv: Implement the new ray-tracing storage classes 
The SPV_KHR_ray_tracing extension adds 6 new storage classes which is a
bit on the ridiculous side.  In order to avoid adding that many variable
modes to NIR, we make a few simplifying assumptions:

 1. CallableData and RayPayload data actually lives on the stack
    somewhere, presumably in the caller's stack.  We assume that these
    are no different from global variables and use nir_var_shader_temp
    for them.  We still need a separate storage class for the incoming
    variants but only so we can figure out which one the incoming one
    is and lower it to something useful.

 2. There's no difference between incoming CallableData and RayPaolad
    data.  We can use a single storage class for both.

 3. ShaderRecordBuffer data is just a global memory access.  This lets
    us avoid NIR variables entirely and just fetch the pointer via the
    shader_record_ptr system value and it's accessed using a 64-bit
    global memory pointer.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
 2020-11-05 23:36:46 +00:00
Jason Ekstrand 84a8ca1db8 nir: Add new variable modes for ray-tracing 
If we were desperate to reduce bits, we could probably also use
shader_in/out for hit attributes as they really are an output from
intersection shaders and read-only in any-hit and closest-hit shaders.
However, other passes such as nir_gether_info like to assume that
anything with nir_var_shader_in/out is indexed using vec4 locations for
interface matching.  It's easier to just add a new variable mode.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
 2020-11-05 23:36:46 +00:00
Jason Ekstrand aa4ea9c7ea nir: Add intrinsics for object to/from world RT sysvals 
These are a bit more tricky than most because they're matrix system
values.  We make the intentional choice here to not bother with allowing
indirect addressing of columns for these.  Since they're system values,
they may be magically constructed somehow or come from weird hardware so
it's easier on back-ends to just handle any indirects with bcsel.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
 2020-11-05 23:36:46 +00:00
Jason Ekstrand 07635a3284 nir/builder: Add a select_from_ssa_def_array helper 
This is an operation we have to do already for nir_vector_extract and
I'm about to do something very similar for matrix columns.  Having a
more generic helper is useful.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
 2020-11-05 23:36:46 +00:00
Jason Ekstrand 46cd91bb45 spirv,nir: Add support for ray-tracing built-ins 
Missing in this commit are NIR intrinsics for the ObjectToWorld and
WorldToObject built-ins.  Those are matrices and so they take a bit more
work and justify a separate commit.  For now, we add the enums and leave
the SYSTEM_VALUE <-> nir_intrinsic conversion commented out.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
 2020-11-05 23:36:46 +00:00
Jason Ekstrand ed907e5d84 spirv: Add support for OpTypeAccelerationStructureKHR 
For now, we assume its a 64-bit global pointer.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
 2020-11-05 23:36:45 +00:00
Jason Ekstrand 2df055ab47 spirv: Pass the deref type to storage_class_to_mode for non-forward pointers 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
 2020-11-05 23:36:45 +00:00
Jason Ekstrand 2bef02696d spirv: Add a guard for OpTypeForwardPointer storage classes 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
 2020-11-05 23:36:45 +00:00
Jason Ekstrand aabe37b969 spirv: Remove a redundant vtn_fail_if 
We already fail in these same cases in vk_desc_type_for_mode.  These
additional assertions are just extra code to update.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
 2020-11-05 23:36:45 +00:00
Caio Marcelo de Oliveira Filho 3bcebe1b27 spirv: Add Ray Tracing execution models 
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
 2020-11-05 23:36:45 +00:00
Jason Ekstrand d8dbdf20de spirv: Add basic plumbing for ray-tracing capabilities 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
 2020-11-05 23:36:45 +00:00
Caio Marcelo de Oliveira Filho f65182931d compiler: Add new Vulkan shader stages 
This particular ordering makes them conveniently match
VkShaderStageFlagBits, which is a property we already take advantage
of in the previous shader stages.

Abbreviations are based on the ones used in glslangValidator.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
 2020-11-05 23:36:45 +00:00
Mike Blumenkrantz 0b0f152c54 nir/clip_disable: handle 2x vec4 case 
some drivers may have pre-lowered gl_ClipDistance to 2x vec4 to match hw
usage, so for those cases we'll be getting deref_var here and then components
will be stored to the deref at some point

fixes mesa/mesa#3480

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6563>
 2020-11-05 21:32:27 +00:00
Mike Blumenkrantz 5e43ba39e1 nir/clip_disable: try for better no-op 
we can just check the bits using clip_distance_array_size here to simplify
everything and more easily determine if we need to be running this pass

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6563>
 2020-11-05 21:32:27 +00:00
Mike Blumenkrantz 1d23a88c6e nir/clip_disable: write 0s instead of undefs for disabled clip planes 
this should yield more reliable and ideally even correct results

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6563>
 2020-11-05 21:32:27 +00:00
Jason Ekstrand 61d2badbf4 nir/deref: Fix a typo 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3754
Fixes: df51518dc5 "nir/opt_deref: Add a deref mode specialization..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7459>
 2020-11-05 16:31:25 +00:00
Caio Marcelo de Oliveira Filho eb03f29655 spirv: Implement SpvCapabilitySubgroupBufferBlockIOINTEL 
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7448>
 2020-11-04 20:24:48 +00:00
Caio Marcelo de Oliveira Filho dd39e311b3 nir: Add nir_intrinsic_{load,store}_deref_block_intel 
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7448>
 2020-11-04 20:24:48 +00:00
Caio Marcelo de Oliveira Filho b86ce274f9 spirv: Implement SpvCapabilitySubgroupShuffleINTEL from SPV_INTEL_subgroups 
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7448>
 2020-11-04 20:24:48 +00:00
Alyssa Rosenzweig a05921b9f2 nir: Add SRC_TYPE to store_combined_output_pan 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>
 2020-11-04 11:21:08 -05:00
Rhys Perry 475077c790 nir/lower_bit_size: optimize upcast of b2i8/b2i16 
This also seems to be done by nir_opt_algebraic, but RADV will be moving
nir_lower_bit_size() to after that (so it doesn't create unsupported
8/16-bit instructions) and it doesn't seem worth creating a new pass just
for this simple optimization.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
 2020-11-04 11:50:37 +00:00
Rhys Perry 4e5c85526b nir: add shader_info::bit_sizes_used 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
 2020-11-04 11:50:37 +00:00
Jason Ekstrand 58e7088628 nir/find_array_copies: Don't assume all children exist 
Fixes: 9f3c595dfc "nir/find_array_copies: Handle cast derefs"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7437>
 2020-11-04 05:57:07 +00:00
Jason Ekstrand 4ff4d4e569 nir/opt_intrinsic: Optimize bcsel(b, shuffle(x, i), shuffle(x, j)) 
The shuffles provided by the SPV_INTEL_subgroups extension generate

    bcsel(b, shuffle(x, i), shuffle(y, j))

In the case where x and y are the same, we can turn this into a shuffle
with the bcsel on the index which lets us drop a whole shuffle.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand 2f5b56ae23 nir/opt_intrinsics: Refactor a bit 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand 3b281861c1 nir/constant_folding: Fold subgroup shuffle intrinsics 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand e59d6350d1 nir: Move constant folding of vote to opt_constant_folding 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand 9492ab2864 nir/constant_folding: Use the standard variable naming convention 
Typically, if we have one alu instruction, we call it "alu" and if we
have one intrinsic we call it "intrin".

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand 9d2ccbfc15 nir/constant_folding: Use a switch in try_fold_intrinsic 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand d9c0f3627d nir/opt_intrinsics: Report progress for the gl_SampleMask optimization 
Fixes: d3ce8a7f6b "nir: optimize gl_SampleMaskIn to gl_HelperInvocation..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Rhys Perry b90063201a nir: use nir_alu_src_is_trivial_ssa() in nir_ssa_for_alu_src() 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7426>
 2020-11-03 22:35:57 +00:00
Rhys Perry 233a820f2c nir: skip bcsel with non-trivial swizzle in opt_simplify_bcsel_of_phi() 
Fixes validation error in a Dota 2 shader.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: b031c64349 ("nir: Convert a bcsel with only phi node sources to a phi node")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7426>
 2020-11-03 22:35:57 +00:00
Rhys Perry 1df2fc9f9c nir: add nir_alu_src_is_trivial_ssa() 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7426>
 2020-11-03 22:35:57 +00:00
Jason Ekstrand b9f9528011 nir/lower_io: Add a new 62bit_generic address format 
Unlike most address formats, this address format is capable of handling
all of the fancy generic pointers stuff like is_global and friends.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand b84f74f9b7 nir/lower_io: Support generic pointer access 
If the pointer is generic and we haven't yet figured out what kind of
pointer it is yet, we emit an if-ladder based on a mode check.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand a451f037ff nir/lower_io: Add support for lowering deref_mode_is 
The guts are still missing so it will blow up if it sees any
deref_mode_is intrinsic that it can't constant-fold from the mode.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand 57943112d9 nir/lower_io: Add support for 32/64bit_global for shared 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand c50332fbc2 nir/lower_io: Add a mode parameter to addr_format_is_* 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand 7007d06898 nir/lower_io: Add a mode parameter to build_addr_iadd 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand ff838abc46 nir/opt_deref: Add an optimization for deref_mode_is 
If opt_restrict_deref_modes makes progress, we may be able to figure out
the mode well enough to turn a deref_mode_is intrinsic into a constant.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand df51518dc5 nir/opt_deref: Add a deref mode specialization optimization 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand a8e53a772f spirv: Add generic pointer support 
Most of this is fairly straightforward; we just set all the modes on any
derefs which are generic.  The one tricky bit is OpGenericCastToPtrExplicit.
Instead of adding NIR intrinsics to do the cast, we add NIR intrinsics
to do a storage class check and then bcsel based on that.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand d6415b5d2b nir: Add support for generic pointers 
The way they're handled is that deref->modes is treated as a bitfield of
possible modes.  Variables are required to have a specific mode and
derefs with deref_type_var are as well.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand 9d377c01d0 nir: Make nir_deref_instr::mode a bitfield 
We rename it to "modes" to make it clear that it may contain more than
one mode and adjust all the uses of nir_deref_instr::modes to attempt to
handle multiple modes.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand 7d5f3b5c0e nir/split_*_vars: Prepare for generic pointers 
All three passes check the variables for complex uses and don't split
them if they have any complex uses.  Most of these checks are just early
returns to avoid chasing the deref to the variable and a hash table
lookup if we can quickly determine it has the wrong mode.  In a couple
of cases, we need to re-arrange or add other checks to ensure that it's
safe for generic pointers.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00