Jason Ekstrand
47b4efc710
mesa: Move gl_vert_attrib from mtypes.h to shader_enums.h
...
It is a shader enum after all...
Acked-by: Brian Paul <brianp@vmware.com >
2015-09-01 14:45:37 -07:00
Matt Turner
e34834f059
glapi: Inline x86_64_current_tls().
...
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
2015-09-01 13:23:13 -07:00
Edward O'Callaghan
d351bab9c5
r600g: Simplify out a couple of unnecessary branches
...
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com >
2015-09-01 21:55:23 +02:00
Marek Olšák
2d8f7d3c15
radeonsi: use an indirect buffer for init_config
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:15 +02:00
Marek Olšák
df12ddb55d
radeonsi: add IB2 indirect buffer support for pm4 states
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:15 +02:00
Marek Olšák
8a9ab86ca6
winsys/radeon: add a flag telling how gfx IBs should be padded
...
This is always false on amdgpu (set by calloc).
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:15 +02:00
Marek Olšák
ba79ff7fa8
winsys/amdgpu: remove IB padding for SI
...
SI is unsupported by amdgpu
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:15 +02:00
Marek Olšák
0f4688fbe7
radeonsi: remove unused macro si_pm4_set_state
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:15 +02:00
Marek Olšák
b89fa63d45
radeonsi: remove si_pm4_cleanup
...
All remaining pm4 state are created and destroyed by state trackers.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:15 +02:00
Marek Olšák
a9971e85d9
radeonsi: rework uploading border colors
...
The border colors are uploaded only once when the state is created.
This brings truly immutable sampler descriptors, because they don't have
to be updated every time a sampler state is re-bound.
It also moves the TA_BC_BASE_ADDR registers to init_config, removing one
more state. The catch is there is now a limit: only 4096 border colors can
be used by one context. I don't think that will be a problem.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:15 +02:00
Marek Olšák
5e2619ef30
radeonsi: use all built-in border colors
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:15 +02:00
Marek Olšák
fbbebeae10
radeonsi: inline si_cmd_context_control
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:15 +02:00
Marek Olšák
77f80a20be
radeonsi: remove unused si_pm4_state code
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:15 +02:00
Marek Olšák
228e80123a
radeonsi: reorder si_context variables
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:15 +02:00
Marek Olšák
28b34b474e
radeonsi: don't send IB dword usage to si_need_cs_space
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:15 +02:00
Marek Olšák
aad43f0768
radeonsi: don't set number of IB dwords for states
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:15 +02:00
Marek Olšák
ec9d5e181e
radeonsi: don't count IB space for states, just use an upper bound
...
Since we don't put any resource descriptors in IBs, the space used by draw
calls is quite small.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:15 +02:00
Marek Olšák
fc95058add
radeonsi: convert SPI state to an atom
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:15 +02:00
Marek Olšák
7ff2991e34
gallium/radeon: rename r600_context_bo_reloc -> radeon_add_to_buffer_list
...
this name should be easy to understand without other knowledge
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:14 +02:00
Marek Olšák
d2e63ac042
gallium/radeon: rename write_*_reg functions
...
e.g. radeon_set_context_reg is nicer and looks consistent next to
radeon_emit().
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:14 +02:00
Marek Olšák
0da159ecac
radeonsi: rename and precalculate polygon offset states
...
one less calloc and state construction while drawing
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:14 +02:00
Marek Olšák
45e549fcbc
radeonsi: convert CB_TARGET_MASK setup to an atom
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:14 +02:00
Marek Olšák
8a67e78bb8
radeonsi: don't set VGT_VTX_CNT_EN twice in init_config
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:14 +02:00
Marek Olšák
e21418f221
radeonsi: convert stencil ref state into an atom
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:14 +02:00
Marek Olšák
c44de30979
radeonsi: convert blend color state into an atom
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:14 +02:00
Marek Olšák
74aa64876b
radeonsi: convert sample mask state into an atom
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:14 +02:00
Marek Olšák
12b205341a
radeonsi: convert clip state into an atom
...
Reducing calloc overhead.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:14 +02:00
Marek Olšák
0c2eed0ede
radeonsi: avoid redundant CB and DB register updates
...
The main idea is to avoid setting CB_COLORi_INFO = 0 for i>0 repeatedly
when those colorbuffers aren't used. This is mainly for glamor.
Same for DB. Z_INFO and STENCIL_INFO need to be cleared only once.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:14 +02:00
Marek Olšák
c2a42d1f9f
radeonsi: don't rebind GSVS ring buffers every draw call using GS
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:14 +02:00
Marek Olšák
c9a3196b14
radeonsi: don't clear the tessellation factor ring buffer
...
Leftover from the bring-up.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:14 +02:00
Marek Olšák
a2c6ae07b4
radeonsi: remove the tf_ring state, add the registers to init_config
...
One less state to worry about.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:14 +02:00
Marek Olšák
0d46c3bc9d
radeonsi: remove the gs_rings state, add the registers to init_config
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:14 +02:00
Marek Olšák
87c1e9e19c
radeonsi: use a bitmask for tracking dirty atoms
...
This mainly removes the cache misses when checking the dirty flags.
Not much else though.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:14 +02:00
Marek Olšák
2fe040ee61
radeonsi: initialize atom IDs for external atoms
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:14 +02:00
Marek Olšák
5bb0ad7ccc
radeonsi: call si_init_atom for remaining radeonsi atoms
...
I need to initialize more atom IDs.
This adds 4 more si_init_atom calls, which simplifies the code.
(si_init_atom needs a different context type of the emit functions though)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:13 +02:00
Marek Olšák
e191c58324
radeonsi: initialize atom IDs
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:13 +02:00
Marek Olšák
ba7a6cf626
radeonsi: define the state atom array separately
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:13 +02:00
Marek Olšák
8a97528b3a
radeonsi: optimize viewport states
...
same as scissors
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:13 +02:00
Marek Olšák
f6a10f60b7
radeonsi: optimize scissor states
...
- convert 16 states to 1 atom
- only emit 1 scissor if VIEWPORT_INDEX isn't written
- use only one packet when emitting consecutive scissors
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:13 +02:00
Marek Olšák
02c8e06497
radeonsi: add SI_MAX_ATTRIBS
...
PIPE_MAX_ATTRIBS is 32, but we currently only support 16.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:13 +02:00
Marek Olšák
05af645a95
radeonsi: fix memory usage checking for big IBs
...
Cc: 11.0 <mesa-stable@lists.freedesktop.org >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:13 +02:00
Marek Olšák
08775a2196
radeonsi: set all 16 viewport Z bounds for GL 4.1
...
Cc: 11.0 <mesa-stable@lists.freedesktop.org >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:13 +02:00
Marek Olšák
9b510a9652
radeonsi: fix a Unigine Heaven hang when drirc is missing
...
Cc: 10.6 11.0 <mesa-stable@lists.freedesktop.org >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:13 +02:00
Marek Olšák
b1e5451211
winsys/amdgpu: use small IBs for better performance on VI
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:13 +02:00
Marek Olšák
fc292b5821
gallium/util: add u_bit_scan_consecutive_range
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
2015-09-01 21:51:13 +02:00
Chris Wilson
d38a560106
i965: Prevent coordinate overflow in intel_emit_linear_blit
...
Fixes regression from
commit 8c17d53823
Author: Kenneth Graunke <kenneth@whitecape.org >
Date: Wed Apr 15 03:04:33 2015 -0700
i965: Make intel_emit_linear_blit handle Gen8+ alignment restrictions.
which adjusted the coordinates to be relative to the nearest cacheline.
However, this then offsets the coordinates by up to 63 and this may then
cause them to overflow the BLT limits. For the well aligned large
transfer case, we can use 32bpp pixels and so reduce the coordinates by
4 (versus the current 8bpp pixels). We also have to be more careful
doing the last line just in case it may exceed the coordinate limit.
Reported-and-tested-by: kaillasse91@hotmail.fr
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90734
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Kenneth Graunke <kenneth@whitecape.org >
Cc: Ian Romanick <ian.d.romanick@intel.com >
Cc: Anuj Phogat <anuj.phogat@gmail.com >
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com >
2015-09-01 16:41:07 +01:00
Connor Abbott
1484d8c9aa
i965/nir: enable the dead control flow optimization
...
total instructions in shared programs: 7541551 -> 7541381 (-0.00%)
instructions in affected programs: 3054 -> 2884 (-5.57%)
helped: 29
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
2015-09-01 01:48:04 -07:00
Connor Abbott
aec6744501
nir/dead_cf: add support for removing useless loops
...
v2: fix detecting if the loop has any phi nodes after it.
v2: use nir_foreach_ssa_def() instead of nir_foreach_dest() when
checking for values live after the loop to catch const_load
instructions.
v2: fix handling return instructions
v2: add some documentation to loop_is_dead()
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Reviewed-by: Matt Turner <mattst88@gmail.com >
2015-09-01 00:58:17 -07:00
Connor Abbott
019eea1c4f
nir: add a helper for iterating over blocks in a cf node
...
We were already doing this internally for iterating over a function
implementation, so just expose it directly.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
2015-09-01 00:58:17 -07:00
Connor Abbott
89dc0626bd
nir: add nir_block_get_following_loop() helper
...
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
2015-09-01 00:58:17 -07:00