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Rohan Garg 475fb68726 intel/brw: We no longer have atomic fmin/fmax ops for fp64 in xe2 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283>
 2024-05-15 17:16:51 +00:00
Rohan Garg 8d8d3666c6 intel/brw: Advertise fp64 atomic add's when we have 64 bit float support and a LSC 
Rework:
 * Lionel: Simplify to just checking ver >= 20.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283>
 2024-05-15 17:16:51 +00:00
Francisco Jerez 7c129d9365 intel/brw/xe2+: Keep PS sample mask in the f1.0 register whether or not kill is used. 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283>
 2024-05-15 17:16:51 +00:00
Rohan Garg 7668de019b intel/eu/xe2+: Fix src1 length bits of SEND instruction with UGM target. 
Rework:
 * Francisco Jerez: Specify the src1 length value in the correct
   units. Don't break earlier platforms.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283>
 2024-05-15 17:16:51 +00:00
Eric Engestrom fb6638da80 README: update links to our own docs 
These currently only work because we have a redirection set up; let's
link to the right place instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29224>
 2024-05-15 17:13:10 +00:00
Karol Herbst f1662e9bc9 rusticl/mesa/context: flush context before destruction 
Drivers might still be busy doing things and not properly clean things up.

Fixes a rare crash on applicatione exits with some drivers.

Fixes: 50e981a050 ("rusticl/mesa: add fencing support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29223>
 2024-05-15 16:52:03 +00:00
Rohan Garg ec06911b3d Revert "iris: slow clear higher miplevels on single sampled 8bpp resources that have TILE64" 
Miptails are now disabled on Tile64 resources, so we can drop this
restriction.

Ref: e3a5ade9 ('intel/isl: Disable miptails to align LODs for CCS WA')

This reverts commit 8670fd6ac4.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28984>
 2024-05-15 15:16:29 +00:00
Eric Engestrom 9e66d89be9 zink/ci: rename .zink-lvp-venus-rules to .zink-venus-lvp-rules to match the rest of the names 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201>
 2024-05-15 14:34:56 +00:00
Eric Engestrom 3cbb3c0b66 ci/env: move dead-code-with-comment to the end of the list to make it clearer 
and improve comment

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201>
 2024-05-15 14:34:56 +00:00
Eric Engestrom 1f17b2fa76 ci/b2c: remove dead rules: that's always overwritten 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201>
 2024-05-15 14:34:56 +00:00
Eric Engestrom 93c0a607bc ci/vkd3d: fail job when failing to get driver version 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201>
 2024-05-15 14:34:56 +00:00
Eric Engestrom 3127b52ef7 ci/vkd3d: fix version sanity check 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201>
 2024-05-15 14:34:56 +00:00
Eric Engestrom 300afd3c86 ci/vkd3d: un-hardcode architecture 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201>
 2024-05-15 14:34:56 +00:00
Eric Engestrom 978f967105 ci/init-stage2: set VK_DRIVER_FILES for both xorg and wayland 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201>
 2024-05-15 14:34:56 +00:00
Eric Engestrom e0089a1ffd ci/piglit-traces: drop re-definition of VK_DRIVER_FILES 
It's already set higher up in that same file.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201>
 2024-05-15 14:34:56 +00:00
Eric Engestrom cc49894e34 ci: drop dead VK_CPU option 
Unused since 1eca809680 ("ci/v3dv: test v3dv in arm64
environment"), and in the meantime other code paths have been added and
do not support this (`.gitlab-ci/common/init-stage2.sh` when starting
xorg & wayland for instance), so instead of fixing dead code, let's
remove it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201>
 2024-05-15 14:34:56 +00:00
Eric Engestrom b4a94b0969 ci/b2c: allow setting timeouts in seconds 
Allows for tighter timeouts.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201>
 2024-05-15 14:34:56 +00:00
Eric Engestrom 9a07db7cd8 ci/b2c: rename B2C_TIMEOUT_* to B2C_TIMEOUT_CONSOLE_ACTIVITY_* 
More verbose, sure, but also much easier to understand.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201>
 2024-05-15 14:34:56 +00:00
Eric Engestrom 09021a1c01 ci/b2c: rename B2C_TIMEOUT_FIRST_* to B2C_TIMEOUT_FIRST_CONSOLE_ACTIVITY_* 
More verbose, sure, but also much easier to understand.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201>
 2024-05-15 14:34:56 +00:00
Eric Engestrom 66ad09f569 ci: inherit the debian container building infra for test container images 
Instead of inheriting from the build job in the test job; it makes no
sense to tie them like this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201>
 2024-05-15 14:34:55 +00:00
Eric Engestrom 5157363772 ci: factor out all the deps to build the debian containers into .debian-container 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201>
 2024-05-15 14:34:55 +00:00
Eric Engestrom ad9e78ba82 ci: rename debian version variable job to include the word "version" 
The name was way too generic, and the next commit introduces an actual
`.debian-container` dot-job.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29201>
 2024-05-15 14:34:55 +00:00
Iago Toral Quiroga b545e78f12 v3dv: support 2712D0 
2712D0 has V3D 7.1.10 which included draw index and
base vertex in the shader state record packet, shuffling
the locations of most of its fields. Handle this at run
time by emitting the appropriate packet based on the
V3D version since our current versioning framework doesn't
support changes based on revision number alone.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29189>
 2024-05-15 13:57:10 +00:00
Iago Toral Quiroga 1fc846dce3 v3d: support 2712D0 
2710D0 has V3D 7.1.10 which included draw index and
base vertex in the shader state record packet, shuffling
the locations of most of its fields. Handle this at run
time by emitting the appropriate packet based on the
V3D version since our current versoning framework doesn't
support changes based on revision number alone.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29189>
 2024-05-15 13:57:10 +00:00
Iago Toral Quiroga 7b807c3e94 broadcom/cle: fix up shader record for V3D 7.1.10 / 2712D0 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29189>
 2024-05-15 13:57:10 +00:00
Lionel Landwerlin 0daf5e243f anv: shader printf example 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
 2024-05-15 13:13:38 +00:00
Lionel Landwerlin 5b76696861 intel/clc: enable printfs support 
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
 2024-05-15 13:13:38 +00:00
Lionel Landwerlin 64010716c8 anv: add debug shader printf support 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
 2024-05-15 13:13:38 +00:00
Lionel Landwerlin 9a36278475 intel/nir: add printf lowering 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
 2024-05-15 13:13:38 +00:00
Lionel Landwerlin 6a8ff3b550 intel/compiler: store u_printf_info in prog_data 
So that the driver can decode the printf buffer.

We're not going to use the NIR data directly from the driver
(Iris/Anv) because the late compile steps might want to add more
printfs.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
 2024-05-15 13:13:38 +00:00
Lionel Landwerlin ecbec25e84 intel/nir: add reloc delta to load_reloc_const_intel intrinsic 
We'll use the delta for an upcoming internal printf mechanism, where
the PARAM_IDX will be the base printf reloc identifier and the BASE
will be the string id.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
 2024-05-15 13:13:38 +00:00
Lionel Landwerlin dde91d18c2 intel/nir: remove unused prototypes 
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
 2024-05-15 13:13:37 +00:00
Lionel Landwerlin c16e58eabd nir: add a low level printf emission helper 
Uses the same memory layout as the print intrinsic lowering. This one
just let's you do the emission without having to deal with variables.

This useful for debug traces.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
 2024-05-15 13:13:37 +00:00
Lionel Landwerlin c518a176f5 nir: add ptr_bit_size parameter to nir_lower_printf 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
 2024-05-15 13:13:37 +00:00
Lionel Landwerlin 2be28ee58a nir: add a base offset for printf indexing 
This will allow a driver to use a single table of printf strings
across all shaders.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
 2024-05-15 13:13:37 +00:00
Lionel Landwerlin 8d336f069e nir/divergence: add missing load_printf_buffer_address 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
 2024-05-15 13:13:37 +00:00
Lionel Landwerlin 3716bd704f anv: fix push constant subgroup_id location 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 7c76125db2 ("anv: use 2 different buffers for surfaces/samplers in descriptor sets")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
 2024-05-15 13:13:37 +00:00
Danylo Piliaiev cd7da3a807 freedreno/devices: Add support for Adreno A32 (G3x Gen 2) 
It is based on Adreno 740, with difference in SP_UNKNOWN_AE09
and TPL1_DBG_ECO_CNTL1. We also enable cmdbuf_start_a725_quirk since
blob does the same.

Values taken from blob v744.19

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29087>
 2024-05-15 12:42:54 +00:00
Rohan Garg aa9244c8f6 intel/brw: update Xe2 max SIMD message sizes 
All the non-transpose messages are SIMD 1,2,4,8,16,32 capable (BSpec
57330)

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29212>
 2024-05-15 12:02:02 +00:00
Samuel Pitoiset c8852719d0 radv: rename radeon perfctr uconfig helpers 
To match other helpers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29192>
 2024-05-15 11:34:35 +00:00
Samuel Pitoiset 2957cedad7 radv: remove redundant radeon_set_perfctr_reg() helper 
It's exactly the same as radeon_set_uconfig_reg_perfctr().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29192>
 2024-05-15 11:34:35 +00:00
Samuel Pitoiset 6b023780ad radv: introduce radeon_set_reg_seq() 
This is the base helper for emitting packets, it will be much more
closer to the new command buffer recording mecanishm if we decide to
use the same helpers as RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29192>
 2024-05-15 11:34:35 +00:00
Samuel Pitoiset f0d4212847 radv: stop using radv_physical_device for radeon helpers 
It will be easier to share helpers between RadeonSI and RADV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29192>
 2024-05-15 11:34:35 +00:00
Karol Herbst 1e78e4a344 rusticl/device: properly handle devices with no support for images 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29205>
 2024-05-15 11:00:23 +00:00
Karol Herbst 017ae1f02d rusticl/device/caps: move enough for has_images 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29205>
 2024-05-15 11:00:23 +00:00
Karol Herbst e02b4e0d44 rusticl/device: add DeviceCaps and move timestamp stuff into it 
We do query caps quite a lot and this struct should be used to cache
results and to make it easier to express more complex dependencies between
features (e.g. images being supported or not).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29205>
 2024-05-15 11:00:23 +00:00
Paulo Zanoni e3e5f8e6db anv/sparse: assert a format can't be standard and non-standard 
A format can't be standard and non-standard at the same time. If we
ever hit this assertion, it's because something behind the scenes has
evolved (such as the tiling formats) so something that was marked as
non-standard became standard. Add an assertion so we can quickly catch
these issues in the future and adjust the code.

I don't want to mix this assertion with the one in the line above
since that one is the most useful assertion we have in all the sparse
code, so it's good to know which one we're hitting.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
 2024-05-15 08:00:16 +00:00
Paulo Zanoni 4384c8782e anv+zink/ci: add failures related to multi-sampled sparse binding 
After enabling multi-sampled sparse binding in Anv, we get these
failures. I've investigated them and none are trivial, it's not clear
if they're Anv's fault or not, especially considering how many other
texture-related failures we already have in this fails.txt file.

Since both deqp-vk and Vulkan native apps seem to be working with pure
Anv (no Zink), I don't think it's worth blocking multi-sampled sparse
on Anv just because of Zink.

From what I have investigated, the problems seem related to the
following:
 - glcts is expecting 1D images to have 2D block shapes (this is
   definitely the case for StandardPageSizesTestCase, we get rid of
   the failure by either removing sparse support for 1D images or
   telling their block shapes are the same as the 2D images)
 - glcts/zink may be trying to use formats that are unsupported by Anv
   as if they were supported
 - there's probably something funny going on with the GL_R8 format

v2: Adjust test results after merging merging MR 29118.
v3: Zink test results are a moving target...

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
 2024-05-15 08:00:16 +00:00
Paulo Zanoni 5294faee20 anv: check for VK_RENDERING_SUSPENDING_BIT once at CmdEndRendering 
Most of what we do in this function is conditional to not have
VK_RENDERING_SUSPENDING_BIT, so check for it once.

Suggested-by: Iván Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
 2024-05-15 08:00:16 +00:00
Paulo Zanoni 7ef3d652b2 anv/sparse: enable MSAA for Sparse when applicable 
The newer platforms can't support 8x and 16x since Tile64's shape for
them is not a standard block shape (and claiming standard block shapes
is higher priority than supporting things without it). The TileYs
platforms are fine.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
 2024-05-15 08:00:16 +00:00