AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
136,510 Commits 1 Branch 0 Tags
473ee28cf30dc76b338ffb048c3f3e5bfbb72607
Commit Graph

6913 Commits

Author SHA1 Message Date
Bas Nieuwenhuizen
013aa05edb radv: Use correct DCC compressed block size for sampling. 
Don't need to change the pre-GFX9 samplers because this option doesn't
vary there.

Fixes: f848f2adfa ("radv: Use ac_surface DCC settings for shareable images.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4455
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4425
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9611>
 2021-03-16 00:50:11 +00:00
Mike Blumenkrantz
1d1c7a965c radv: use common interfaces for shader modules 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9508>
 2021-03-15 21:47:44 +00:00
Samuel Pitoiset
321dadf229 radv: rework radv_use_dcc_for_image() a bit 
To make it clear that only GFX8-9 have missing DCC features.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9526>
 2021-03-15 13:22:44 +01:00
Samuel Pitoiset
9704ed3f57 radv: remove useless DCC disable check for 3D images on GFX10+ 
addrlib uses the S swizzle mode which disables DCC completely.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9526>
 2021-03-15 13:22:44 +01:00
Samuel Pitoiset
2bc51226e1 radv: add missing SQTT events for copy_commands2/create_renderpass2 
A bunch of entrypoints were missing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9560>
 2021-03-15 12:34:39 +01:00
Samuel Pitoiset
1aabfc77d3 radv: fix initialization of disable_compression when clearing color image 
Just make sure it's initialized properly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9473>
 2021-03-12 16:39:21 +00:00
Samuel Pitoiset
15fc0c351a radv: fix potential clears with non renderable images on GFX9+ 
Found by inspection.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9474>
 2021-03-12 16:09:42 +00:00
Samuel Pitoiset
9863ed9bf3 radv: fix meta save/restore state with non renderable images 
For non renderable images, the driver performs some transfer operations
with compute shaders on the gfx queue, but it was saving the gfx state
instead of the compute state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9474>
 2021-03-12 16:09:42 +00:00
Samuel Pitoiset
b42204e4d0 radv: disable sampling with VK_FORMAT_R64_SFLOAT 
It's not supported.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4433
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9519>
 2021-03-12 16:07:54 +01:00
Rhys Perry
38b2e13766 aco: remove vmem/smem score statistics 
Replaced by the Latency statistic.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
 2021-03-11 16:31:19 +00:00
Rhys Perry
a0243f5c47 aco: add ACO_DEBUG=perfinfo 
This prints the program with each instruction's contribution to it's
latency and various factors for the calculation of the Inverse Throughput
statistic.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
 2021-03-11 16:31:19 +00:00
Rhys Perry
5d6a1095bf aco: add print option to print program without temporary IDs 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
 2021-03-11 16:31:19 +00:00
Rhys Perry
23ecceb160 aco: add latency and inverse throughput statistics 
Latency is estimanted duration of a single wave, ignoring others in the
CU. It is similar to the old cycles statistic except it it's more accurate
and considers memory operations.

The InvThroughput statistic is a combination of MaxWaves, Latency and the
portion of the wave's execution which does not use various resources.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
 2021-03-11 16:31:19 +00:00
Rhys Perry
83ce9407f2 aco: add instruction classes 
These should mostly match LLVM.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
 2021-03-11 16:31:19 +00:00
Rhys Perry
0af7ff49fd aco: lower p_constaddr into separate instructions earlier 
This allows them to be scheduled properly and simplifies the assembler a
little.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
 2021-03-11 16:31:19 +00:00
Rhys Perry
ab957bb899 aco: move wait_imm to aco_ir.h 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
 2021-03-11 15:35:34 +00:00
Rhys Perry
7d5643c0fe aco: track divergent and uniform branch depth 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
 2021-03-11 15:35:30 +00:00
Rhys Perry
8f71be0a7b aco: simplify loop_nest_depth tracking in isel 
Keep track of the current loop depth in Program and set the depth inside
Program::insert_block() instead of repeating it every time we insert one.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8994>
 2021-03-11 15:35:24 +00:00
Rhys Perry
35fe62dad1 radv/llvm: fix enabled_channels for compressed exports 
The old values seemed to work fine, but the ISA docs recommend 0x0,0x3,0xc
and 0xf:

COMPR==1: export half-dword enable. Valid values are: 0x0,3,c,f
[0] enables VSRC0 : R,G from one VGPR (R in low bits, G high)
[2] enables VSRC1 : B,A from one VGPR (B in low bits, A high)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9459>
 2021-03-11 13:54:18 +00:00
Rhys Perry
341dd9d834 aco: set compr for fp16 exports 
Obviously this didn't affect correctness. Not sure about performance.

It also changes enabled_channels to match radeonsi.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: f29c81f863 ("aco: use VOP2 for v_cvt_pkrtz_f16_f32 if possible")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9459>
 2021-03-11 13:54:18 +00:00
Jason Ekstrand
5d8fa880d6 radv: Drop CreateRenderPass 
We can use the generic fall-back which calls CreateRenderPass2 instead.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8857>
 2021-03-10 18:17:31 +00:00
Jason Ekstrand
8304b4eef7 radv/meta: Use CreateRenderPass2 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8857>
 2021-03-10 18:17:31 +00:00
Jason Ekstrand
4fb6c051c9 anv: Move vk_format helpers to common code 
The Android ones we put in anv_android.c.  Maybe one day we'll want a
vk_android.h to put some common Android stuff but, for now, let's keep
it contained to ANV's android code.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8857>
 2021-03-10 18:17:31 +00:00
Marek Olšák
3b7b2df509 ac: remove switch cases for pc_lines for compute-only chips 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9389>
 2021-03-10 18:02:28 +00:00
Marek Olšák
975e5e262b ac,radeonsi: use correct VGPR granularity on Aldebaran 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9389>
 2021-03-10 18:02:28 +00:00
Marek Olšák
a9da3fc0d1 ac: handle bigger instruction prefetch for Aldebaran 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9389>
 2021-03-10 18:02:27 +00:00
Marek Olšák
9fdf69e611 ac/llvm: unpack thread IDs on Aldebaran 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9389>
 2021-03-10 18:02:27 +00:00
Marek Olšák
6edf1978d3 ac: set the TCC line size for Aldebaran 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9389>
 2021-03-10 18:02:27 +00:00
Marek Olšák
230a6dc55d ac,radeonsi: add sampler changes for Aldebaran 
- no 3D and cube textures
- no mipmapping
- no border color
- image_sample is the only supported opcode with a sampler (behaves like _lz)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9389>
 2021-03-10 18:02:27 +00:00
James Zhu
381d3a5a38 amd: add Aldebaran chip enum 
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9389>
 2021-03-10 18:02:27 +00:00
Samuel Pitoiset
077775f3ce radv: check if dynamic line stipple state changed 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9458>
 2021-03-10 07:21:46 +00:00
Samuel Pitoiset
892987e3a0 radv: check if dynamic VRS state changed 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9458>
 2021-03-10 07:21:46 +00:00
Samuel Pitoiset
ed391a62f6 radv: do not declare push constants for DCC decompress on compute 
We don't use push constants at all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9475>
 2021-03-10 07:50:31 +01:00
Jason Ekstrand
117668b811 nir: Make nir_ssa_def_rewrite_uses take an SSA value 
This commit replaces the new_src parameter of nir_ssa_def_rewrite_uses()
with an SSA def, removes nir_ssa_def_rewrite_uses_ssa(), and rewrites
all the users as needed.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9383>
 2021-03-08 16:59:55 +00:00
Marek Olšák
b43f40166c ac/surface: select best swizzle mode for 3D sampler performance 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9448>
 2021-03-08 11:41:23 +00:00
Tony Wasserka
97c97781f6 aco: Fix vector::reserve() being called with the wrong size 
The container is moved from before and hence returns size 0. To get the
correct value, the new instruction container must be used instead.

This was flagged by clang-tidy. The fixed call still triggers the
corresponding diagnostic, hence this change silences it by adding a
redundant clear() after move.

Fixes: 7f1b537304 ("aco: add new NOP insertion pass for GFX6-9")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9432>
 2021-03-08 10:44:20 +01:00
Rhys Perry
9f8a0b797e radv: cache pipeline statistics 
Applications rarely require them, but this improves fossil-db replay time.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9411>
 2021-03-05 17:01:16 +00:00
Rhys Perry
7c7e8942f8 radv,aco: remove aco_compiler_statistics 
This removes a pointer from radv_shader_binary_legacy::data.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9411>
 2021-03-05 17:01:16 +00:00
Pierre-Eric Pelloux-Prayer
7f5a8db96d ac/rgp: move radv/sqtt functions to ac 
pso_correlation and code_object_loader don't depend on drivers
specific logic so move them to the shared code.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9277>
 2021-03-05 13:10:11 +00:00
Pierre-Eric Pelloux-Prayer
b2ef94943f ac/rtld: make ac_rtld_upload returns the code size 
This will be useful to keep a copy of the uploaded code.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9277>
 2021-03-05 13:10:11 +00:00
Pierre-Eric Pelloux-Prayer
e5b1e645e7 ac/rgp: make the max gap between shader code a warning 
For radeonsi the shaders don't live in the same BOs, so they're
unlikely to be less that 0x1000 bytes apart.

So this commit bumps the threshold to 0x10000 and warns once
when hitting it.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9277>
 2021-03-05 13:10:11 +00:00
Rhys Perry
524848707b radv: don't set sx_blend_opt_epsilon for V_028C70_COLOR_10_11_11 
Matches radeonsi and PAL. From PAL:
// 1 is recommended, but doesn't provide sufficient precision

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4394
Fixes: ed94638156 ("radv: Enable RB+ where possible.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9427>
 2021-03-05 11:16:40 +00:00
Samuel Pitoiset
2169c4f763 radv: re-enable TC-compat HTILE for MSAA D32S8 images on GFX9+ 
Should help MSAA games. Note that it's broken on GFX8 because
the tiling doesn't match.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3868
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9284>
 2021-03-05 08:44:40 +00:00
Samuel Pitoiset
367a93830b radv: skip useless FCE when fast-clearing MSAA images with DCC enabled 
The clear code is 0xCC which means CMASK isn't fast-cleared.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9392>
 2021-03-05 08:11:28 +00:00
Samuel Pitoiset
6102507a74 radv: remove useless check about mips+layers for TC-compat HTILE images 
radv_use_htile_for_image() prevents it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9405>
 2021-03-05 08:10:19 +01:00
Samuel Pitoiset
438f65fb1e radv: cleanup enabling TC-compat HTILE for depth surfaces 
It makes more sense to try to enable TC-compat if the image has HTILE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9405>
 2021-03-05 08:09:42 +01:00
Samuel Pitoiset
517600b4d5 Revert "radv: stop using VM_ALWAYS_VALID on APUs" 
Disabling VM_ALWAYS_VALID actually hurts more than it helps
after doing more testing. Managing the global BO list in userspace
is really costly and make a bunch of games CPU bound.

I think re-enabling VM_ALWAYS_VALID is a step in the right direction.

This reverts commit 6ac6e2fbfb.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9341>
 2021-03-04 09:37:59 +00:00
Marek Olšák
a0cc0b3a15 ac/llvm: open code fpow on LLVM 12 using fmul.legacy 
A quick look at the asm shows that this enables source modifiers
(neg, abs) for v_mul_legacy_f32.

Totals from affected shaders:
SGPRS: 110104 -> 110400 (0.27 %)
VGPRS: 57632 -> 57636 (0.01 %)
Spilled SGPRs: 66 -> 63 (-4.55 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 3290412 -> 3283068 (-0.22 %) bytes
Max Waves: 32141 -> 32141 (0.00 %)

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9395>
 2021-03-03 20:06:09 +00:00
Marek Olšák
18c1c1404d ac/llvm: add type parameter into ac_build_buffer_load to fix 16-bit TES inputs 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9395>
 2021-03-03 20:06:09 +00:00
Marek Olšák
ed351b9a71 ac/llvm: fix visit_load_ubo_buffer to use SMEM for 16 bits instead of VMEM 
This has 3 advantages:
- It's SMEM.
- Multiple single component loads are merged into 1 multi-dword load by LLVM.
- The result is always packed for packed instructions.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9395>
 2021-03-03 20:06:09 +00:00