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182381 Commits

Author SHA1 Message Date
Rhys Perry 4579586c66 aco/tests: add tests for VALUReadSGPRHazard 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30478>
 2024-10-24 16:08:08 +00:00
Rhys Perry 47e0f468cf aco: workaround VALUReadSGPRHazard 
fossil-db (gfx1200):
Totals from 65112 (82.01% of 79395) affected shaders:
Instrs: 41732906 -> 42987198 (+3.01%); split: -0.00%, +3.01%
CodeSize: 222451964 -> 226942644 (+2.02%); split: -0.01%, +2.03%
Latency: 290411063 -> 290944688 (+0.18%); split: -0.00%, +0.18%
InvThroughput: 45854913 -> 45910275 (+0.12%); split: -0.00%, +0.12%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30478>
 2024-10-24 16:08:07 +00:00
Rhys Perry 9ab0c4b047 aco: minor CounterMap::operator== fix 
I don't think this matters for how we use CounterMap::operator==.

The BITSET_TEST() was unnecessary because of the BITSET_EQUAL above.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30478>
 2024-10-24 16:08:07 +00:00
Rhys Perry f5b871f825 aco: split CounterMap off from VGPRCounterMap 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30478>
 2024-10-24 16:08:07 +00:00
Rhys Perry d312220c2d aco,radv,radeonsi: add aco_shader_info::ps::has_prolog 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30478>
 2024-10-24 16:08:07 +00:00
Erik Faye-Lund 23c34f89fc panvk: fix broken wsi 
We don't need to bend over backwards to try to repair the consequences
of something that happened earlier when we can just prevent that from
happening in the first palce instead.

While we're at it, also move the cmd_dispatch initialization into the
conditional block, because that's only used by the secondary-buffer
emulation code.

This fixes WSI, because there's more differences than just secondary
command buffers between the device-level dispatch-table and the
cmd_dispatch table.

Fixes: c2299b6642 ("panvk/csf: Implement vkCmdExecuteCommands")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31819>
 2024-10-24 15:33:59 +00:00
Connor Abbott 048afdd438 tu: Don't invalidate CS state for 3D blits 
We don't dirty the CS state, so if a 3D blit comes between binding a
compute pipeline and executing a dispatch then we won't re-emit the
pipeline and invalidating CS state causes immediates emitted via
CP_LOAD_STATE to disappear. Fixes
dEQP-VK.binding_model.descriptor_buffer.ycbcr_sampler.compute_comp.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31764>
 2024-10-24 14:56:04 +00:00
Connor Abbott 3e3c1b042e tu: Implement VK_PIPELINE_CREATE_2_VIEW_INDEX_FROM_DEVICE_INDEX_BIT_KHR 
This was missed because the tests for it were broken. An upcoming CTS
fix will make the tests actually useful, and with this change they pass.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31764>
 2024-10-24 14:56:04 +00:00
Connor Abbott 3c8190e8b2 freedreno: Add compute constlen quirk for X1-85 
This GPU seems to have half the compute constlen of other a7xx GPUs,
because there are sporadic hangs in dEQP-VK.robustness.robustness2.* and
other tests unless we limit the constlen. This does *not* happen on
SM8550-HDK, so it does seem to be specific to the GPU in x1e laptops.

Fixes: b0d22461b9 ("freedreno: Enable the X1-85")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31764>
 2024-10-24 14:56:03 +00:00
Samuel Pitoiset 605d4dd42a radv: do not use MRT counters for images created for db capture&replay 
Setting the surface index is optimal for performance in case of
multiple MRTs because addrlib rotates tiles differently.

But this should be disabled when the image is used for descriptor
buffers capture&replay because the descriptor isn't immutable
(ie. tile_swizzle can be different).

This fixes dEQP-VK.binding_model.descriptor_buffer.capture_replay.*
on some GPUs where tile_swizzle is non-zero.

Fixes: 3b57a35ece ("radv: Enable descriptorBufferCaptureReplay.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31818>
 2024-10-24 13:53:20 +00:00
David Rosca 35eb12e2fd frontends/va: Evict unused surfaces from encode DPB 
Application should send the full DPB state in each pic to keep
the references alive. Ideally the surfaces would be evicted immediately,
but unfortunately this breaks some applications. Add evict flag and
only evict surfaces if not present in reference frames array for two
consecutive frames.
DPB buffers are not destroyed upon eviction, but instead they are kept
around and reused next time a new surface is added to DPB.

Fixes: cc14724d73 ("frontends/va: Implement DPB management for H264/5 encode")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31741>
 2024-10-24 12:36:37 +00:00
David Rosca 33c6491244 pipe: Fix video enc max DPB size for H264 
H264 have 16 as maximum DPB size by spec (A.3.1. f) MaxDpbFrames).
For encode we need one more slot for current recon, so use max size + 1.

Fixes: cc14724d73 ("frontends/va: Implement DPB management for H264/5 encode")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31741>
 2024-10-24 12:36:37 +00:00
Yao Zi 5ffc5ba8ef panvk: Link with --build-id explicitly 
panvk provides driver UUID generated from build id of the dynamic
library, but ld_args_build_id isn't used during linking. This leads to
broken drivers when building mesa with a toolchain defaults to
--no-build-id. Let's specify the flag explicitly.

Fixes: 8ea2931ed1 ("panvk: Generate proper device and driver UUIDs")
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31654>
 2024-10-24 12:09:16 +00:00
Rhys Perry d227968201 ac/llvm: cast to integer after derivative intrinsics 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Fixes: daa97bb41a ("amd: switch to derivative intrinsics")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31788>
 2024-10-24 11:23:07 +00:00
Danylo Piliaiev 3209a97c5c util/vma: Fix util_vma_heap_get_max_free_continuous_size calculation 
It was based on misunderstanding of how holes are sorted, they are
sorted by address and not by size.

Fixes: df3ba95a24
("util/vma: Add function to get max continuous free size")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31722>
 2024-10-24 10:50:08 +00:00
Daniel Schürmann 87cb42f953 treewide: don't lower to LCSSA before calling nir_divergence_analysis() 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Daniel Schürmann 95ed72922e nir/divergence: Don't assume that LCSSA phis are not loop-invariant 
Since we check for loop-invariance, we don't have to unconditionally
flag LCSSA phis as divergent in presence of divergent breaks.
This ensures consistency, with or without LCSSA form.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Daniel Schürmann c5f142a695 nir/divergence: skip expensive nir_src_is_divergent() check in most cases 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Daniel Schürmann 0eff03d385 nir/divergence: calculate divergence without requiring LCSSA form 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Daniel Schürmann d34d2f8fa8 nir: consider loop invariance in nir_src_is_divergent() 
By doing so, this function does not require LCSSA form anymore
in order to provide correct results.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Daniel Schürmann 1a55d6c23b nir/divergence: Introduce and set nir_def::loop_invariant 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Daniel Schürmann c0b3d7a916 nir/divergence: require nir_metadata_block_index 
This allows for fast checks whether some value is defined inside a loop.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Daniel Schürmann 8d1abd4996 treewide: use nir_src_is_divergent() rather than checking the divergence of the SSA 
Without LCSSA, divergence between src and def might differ.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Daniel Schürmann c8348139fd nir: change signature of nir_src_is_divergent() 
Now, it takes nir_src * instead of nir_src.
Also move the implementation to nir_divergence_analysis.c.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Daniel Schürmann 421b42637d nir: remove nir_update_instr_divergence() 
This function has obscure limitations.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Daniel Schürmann ce0a3fe645 nir/opt_uniform_atomics: don't preserve divergence information 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Daniel Schürmann c25c63ebc0 nir/divergence: separately indicate whether loops have divergent continues or breaks 
bool nir_loop_is_divergent(nir_loop *)
 replaces the previous loop->divergent indicator.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Jordan Justen a4c5bfd34c intel/dev: Use hwconfig for urb min/max entry values 
Backport-to: 24.2
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31692>
 2024-10-24 09:21:56 +00:00
Jordan Justen 7b86da0ccd intel/dev: Allow specifying a version when to always use hwconfig 
Backport-to: 24.2
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31692>
 2024-10-24 09:21:56 +00:00
Jordan Justen a71702d342 intel/dev: Simplify DEVINFO_HWCONFIG_KV by adding should_apply_hwconfig_item() 
Backport-to: 24.2
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31692>
 2024-10-24 09:21:56 +00:00
Jordan Justen b4df9658f5 intel/dev: Rework DEVINFO_HWCONFIG; add DEVINFO_HWCONFIG_KV macro 
Backport-to: 24.2
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31692>
 2024-10-24 09:21:56 +00:00
Stéphane Cerveau ac2b7d07e4 anv: check that inline query pool is VK_NULL_HANDLE 
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Stéphane Cerveau <scerveau@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31765>
 2024-10-24 08:17:11 +00:00
Stéphane Cerveau aaa5770d4b anv: inline query for vulkan video encode 
Follow up of the work performed in decode to
support inline query.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Signed-off-by: Stéphane Cerveau <scerveau@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31765>
 2024-10-24 08:17:11 +00:00
Samuel Pitoiset be81c8b8db radv: fix initializing the HTILE buffer on transfer queue 
When only of the depth/stencil aspects is used, RADV dispatches a
compute shader to initialize the HTILE buffer. But dispatching on SDMA
just hangs and the only way to initialize the HTILE buffer is to clear
both aspects using a memory fill operation.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31803>
 2024-10-24 06:25:18 +00:00
Tapani Pälli dcb88ea4ab anv/iris: add note about Wa_18039438632 for RT flush after SBA 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31801>
 2024-10-24 04:29:56 +00:00
Paulo Zanoni c0bceaf057 brw: don't emit instruction to add zero in spilling code 
When the spill_offset is zero, don't emit an instruction that adds
zero.

Results on MTL:

- Shaders:
instructions helped:   shaders/blender/581.shader_test FS SIMD8:         6760 -> 6759 (-0.01%) (scheduled: none)
instructions helped:   shaders/blender/1017.shader_test FS SIMD8:        6760 -> 6759 (-0.01%) (scheduled: none)
instructions helped:   shaders/blender/1045.shader_test FS SIMD8:        6474 -> 6473 (-0.02%) (scheduled: none)
instructions helped:   shaders/blender/723.shader_test FS SIMD8:         6458 -> 6457 (-0.02%) (scheduled: none)
instructions helped:   shaders/blender/1042.shader_test FS SIMD8:        6458 -> 6457 (-0.02%) (scheduled: none)
instructions helped:   shaders/blender/917.shader_test FS SIMD8:         4900 -> 4897 (-0.06%) (scheduled: none)
instructions helped:   shaders/blender/455.shader_test FS SIMD8:         4832 -> 4829 (-0.06%) (scheduled: none)

cycles helped:   shaders/blender/917.shader_test FS SIMD8:         891856 -> 891832 (<.01%) (scheduled: none)
cycles helped:   shaders/blender/455.shader_test FS SIMD8:         894692 -> 894660 (<.01%) (scheduled: none)

total instructions in shared programs: 1596934 -> 1596923 (<.01%)
instructions in affected programs: 42642 -> 42631 (-0.03%)
helped: 7
HURT: 0

- Fossils:

Instrs: 151744378 -> 151741213 (-0.00%)
Cycle count: 16007811131 -> 16007643963 (-0.00%); split: -0.00%, +0.00%

Totals from 1353 (0.21% of 632545) affected shaders:
Instrs: 3925143 -> 3921978 (-0.08%)
Cycle count: 2292838118 -> 2292670950 (-0.01%); split: -0.01%, +0.00%

 RELATIVE IMPROVEMENTS - Instrs                                      Before     After      Delta      Percentage
 mesa/benchmarks/gravity_mark/3e9c48cebaddf012/cs/0                  1947       1941       -6         -0.31%
 mesa/steam-native/red_dead_redemption2/571534e21fb7bd2a/fs.8/0      3431       3421       -10        -0.29%
 mesa/steam-dxvk/batman_arkham_city_goty/d783eacc9ebe324d/fs.8/0     717        715        -2         -0.28%
 mesa/steam-dxvk/batman_arkham_city_goty/14e0878a6a9605c9/fs.8/0     724        722        -2         -0.28%
 mesa/steam-dxvk/batman_arkham_city_goty/d859c2ae858269dc/fs.8/0     744        742        -2         -0.27%
 mesa/steam-dxvk/total_war_warhammer3/18b9d4a3b1961616/vs/0          1539       1535       -4         -0.26%
 mesa/steam-dxvk/total_war_warhammer3/a21827ce57dc0e29/vs/0          1539       1535       -4         -0.26%
(and a bunch of others where the delta is -2, -4 or -6)

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31694>
 2024-10-23 20:19:48 +00:00
Adam Jackson 858eb18952 glx: Fix the GLX_EXT_swap_control_tear drawable attributes 
GLX_SWAP_INTERVAL_EXT is always positive, GLX_LATE_SWAPS_TEAR_EXT is how
you tell whether the drawable is set to do it. This aligns us with the
spec and NVIDIA's GLX.

Closes: mesa/mesa#10193
Fixes: 5e9e457383 glx/dri3: Implement GLX_EXT_swap_control_tear
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31655>
 2024-10-23 19:55:53 +00:00
Georg Lehmann a4b179e445 aco/ssa_elimination: don't avoid saving exec when optimizing branching sequence 
insert_exec_mask will no longer use s_and_saveexec if there was a previous copy
from a sgpr to exec, so this code path is no longer taken.

No Foz-DB changes.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31567>
 2024-10-23 19:34:53 +00:00
Georg Lehmann d2dcaf1f5e aco/insert_exec: reuse old exec temp instead using s_and_saveexec 
This means the v_cmpx optimization in ssa_elimination no longer
needs to insert a copy to save exec.

Foz-DB Navi31:
Totals from 13816 (17.40% of 79395) affected shaders:
Instrs: 23694267 -> 23670199 (-0.10%); split: -0.11%, +0.01%
CodeSize: 124559288 -> 124457508 (-0.08%); split: -0.09%, +0.01%
SpillSGPRs: 5324 -> 5354 (+0.56%); split: -1.00%, +1.56%
Latency: 207245846 -> 207213681 (-0.02%); split: -0.03%, +0.01%
InvThroughput: 35442657 -> 35437220 (-0.02%); split: -0.02%, +0.01%
VClause: 444672 -> 444670 (-0.00%); split: -0.00%, +0.00%
SClause: 639419 -> 639373 (-0.01%); split: -0.04%, +0.03%
Copies: 1529008 -> 1515871 (-0.86%); split: -1.02%, +0.16%
Branches: 557201 -> 557701 (+0.09%); split: -0.00%, +0.09%
PreSGPRs: 682840 -> 686048 (+0.47%)
VALU: 13978010 -> 13978032 (+0.00%); split: -0.00%, +0.00%
SALU: 2214600 -> 2197061 (-0.79%); split: -0.81%, +0.02%
VOPD: 5561 -> 5560 (-0.02%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31567>
 2024-10-23 19:34:53 +00:00
Georg Lehmann 0471522377 aco/insert_exec: reuse old exec temp in loop pre-header 
Avoid an exec copy.

Foz-DB Navi31:
Totals from 2315 (2.92% of 79395) affected shaders:
Instrs: 9082831 -> 9058990 (-0.26%); split: -0.27%, +0.00%
CodeSize: 48017244 -> 47858064 (-0.33%); split: -0.34%, +0.01%
SpillSGPRs: 1680 -> 1684 (+0.24%); split: -0.48%, +0.71%
Latency: 109511718 -> 109525041 (+0.01%); split: -0.01%, +0.02%
InvThroughput: 20287085 -> 20289370 (+0.01%); split: -0.00%, +0.02%
VClause: 192259 -> 192260 (+0.00%)
SClause: 234082 -> 234124 (+0.02%); split: -0.01%, +0.03%
Copies: 667271 -> 645577 (-3.25%); split: -3.27%, +0.02%
Branches: 264086 -> 264088 (+0.00%)
PreSGPRs: 136831 -> 136966 (+0.10%)
VALU: 5234735 -> 5234740 (+0.00%); split: -0.00%, +0.00%
SALU: 949283 -> 927327 (-2.31%); split: -2.32%, +0.01%
VOPD: 1529 -> 1535 (+0.39%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31567>
 2024-10-23 19:34:53 +00:00
Georg Lehmann 31f62a6123 aco/insert_exec: don't always reset top exec 
This allows to re-use previous temporaries in case exec was restored
from a Temp, rather than having to create a new copy of exec.

Foz-DB Navi31:
Totals from 545 (0.69% of 79395) affected shaders:
Instrs: 216563 -> 215698 (-0.40%)
CodeSize: 1183536 -> 1180076 (-0.29%)
Latency: 1135269 -> 1135294 (+0.00%); split: -0.00%, +0.00%
Copies: 11933 -> 11072 (-7.22%)
SALU: 18990 -> 18129 (-4.53%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31567>
 2024-10-23 19:34:53 +00:00
Georg Lehmann 4f04e6f0c4 aco/insert_exec: avoid phis for masks in exec 
Exec always contains the same value as the top of stack, even if the
top of stack is a temporary/constant. So if the predecessors have different
top of stack operands, don't insert a phi and use exec as the new top of stack.

No Foz-DB changes.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31567>
 2024-10-23 19:34:53 +00:00
Georg Lehmann 0338bb9ae8 aco/ssa_elimination: also optimize branching sequence with s_and without saveexec 
insert_exec will start using this in the future, handle it the same
just without the path to save exec before the v_cmpx instruction.

No Foz-DB changes.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31567>
 2024-10-23 19:34:53 +00:00
Lionel Landwerlin 68a372f6ce anv: use UINT32_MAX to be consistent 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31799>
 2024-10-23 18:54:39 +00:00
Lionel Landwerlin b4ae8cf381 anv: reemit push constants on pipeline changes 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 02294961ee ("anv: stop using a binding table entry for gl_NumWorkgroups")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12058
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31799>
 2024-10-23 18:54:39 +00:00
Lionel Landwerlin 7d9449c873 anv: fix missing inline parameter emission 
Should only impact Xe2+

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 02294961ee ("anv: stop using a binding table entry for gl_NumWorkgroups")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31799>
 2024-10-23 18:54:39 +00:00
Lionel Landwerlin 3a5b9ee59e anv: fix binding table entry count for compute shaders 
We're not using a binding table entry anymore for num_workgroups.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 02294961ee ("anv: stop using a binding table entry for gl_NumWorkgroups")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31799>
 2024-10-23 18:54:39 +00:00
Chia-I Wu fc2aecd2c9 panvk: fix texture size/levels/samples query 
Fix an off-by-one for user sets in load_resource_deref_desc.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31794>
 2024-10-23 18:31:22 +00:00
Eric Engestrom 1cb4378479 zink+turnip/ci: update a750 results 
These are regressions, but impossible to bisect since everything was
completely broken for ages and no test could run at all.

A commit in the range 834b919f...02269223 fixed it, and we now have
results, so let's update the results so that we can see future
unexpected results!

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31806>
 2024-10-23 18:09:28 +00:00
Simon Perretta 981ddec633 pvr: Make Vulkan driver depend only on nir headers, not library 
Avoids linking issues when building with the compiler.

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
 2024-10-23 16:47:34 +00:00