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104643 Commits

Author SHA1 Message Date
Bas Nieuwenhuizen 451f030c06 radv: Fix uninitialized warning. 
For es_vgpr_comp_cnt.

Fixes: 795adbbadd "radv/gfx10: Add pipeline state support for tess."
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-21 01:39:08 +02:00
Chia-I Wu d31d25f634 virgl: fix a sync issue in virgl_buffer_transfer_extend 
In virgl_buffer_transfer_extend, when no flush is needed, it tries
to extend a previously queued transfer instead if it can find one.
Comparing to virgl_resource_transfer_prepare, it fails to check if
the resource is busy.

The existence of a previously queued transfer normally implies that
the resource is not busy, maybe except for when the transfer is
PIPE_TRANSFER_UNSYNCHRONIZED.  Rather than burdening us with a
lengthy comment, and potential concerns over breaking it as the
transfer code evolves, this commit makes the valid_buffer_range
check the only condition to take the fast path.

In real world, we hit the fast path almost only because of the
valid_buffer_range check.  In micro benchmarks, the condition should
always be true, otherwise the benchmarks are not very representative
of meaningful workloads.  I think this fix is justified.

The recent change to PIPE_TRANSFER_MAP_DIRECTLY usage disables the
fast path.  This commit re-enables it as well.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
 2019-07-19 18:04:42 -07:00
Chia-I Wu 324c20304e virgl: rework virgl_transfer_queue_extend 
Do not take a transfer and do the memcpy.  Add a _buffer suffix to
the function name to make it clear that it is only for buffers.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
 2019-07-19 18:04:37 -07:00
Chia-I Wu 2b8ad88078 virgl: fix virgl_buffer_transfer_extend 
Without setting hw_res, virgl_transfer_queue_extend never finds a
match and always returns NULL.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
 2019-07-19 18:04:34 -07:00
Marek Olšák bcabf75ab7 radeonsi: initialize scissor registers etc. without clear state 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:56 -04:00
Marek Olšák 47f41af06c radeonsi: return success from vi_dcc_clear_level to simplify callers 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:54 -04:00
Marek Olšák 7a764b963a radeonsi: fix compute-based culling regression in 1ce52c1e37 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:50 -04:00
Marek Olšák c741bed6e8 radeonsi/gfx10: fix VGT_PRIMITIVE_TYPE programming 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák a0d330bedb radeonsi/gfx10: enable Wave32 for vertex, geometry, and tessellation shaders 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 1d82240f55 radeonsi/gfx10: add debug options to enable/disable Wave32 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 8f72f137ad radeonsi/gfx10: add as_ngg variant for TES as ES to select Wave32/64 
Legacy GS has to use Wave64, so TES before GS has to use Wave64 too.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 88efb63caf radeonsi/gfx10: implement Wave32 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 54e6900ede radeonsi/gfx10: use 32-bit wavemasks for Wave32 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 81091a5183 ac: create the LLVM builder in ac_llvm_context_init 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák eb54b8c222 ac: create the LLVM module for Wave32 or Wave64 in ac_llvm_context_init 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 921c1d24d5 ac/rtld: add support for Wave32 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 73aa04e40d ac: add Wave32 LLVM target machine 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 9e467d111b ac: initial Wave32 support in LLVM build helpers 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák c35e926a81 radeonsi: assume that selector != NULL for compute shaders 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:48 -04:00
Marek Olšák bf0f0697a1 radeonsi: remove what appears to be legacy compute code 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:47 -04:00
Marek Olšák be67a275b5 radeonsi: remove si_program::use_code_object_v2 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:45 -04:00
Marek Olšák fd92e65feb radeonsi: add si_shader_selector into si_compute 
Now we can assume that shader->selector is always set.
This will simplify some code.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:43 -04:00
Marek Olšák e2c8ff009e radeonsi: set threadgroup size to 0 for threadgroups with only 1 wave 
This has no effect on Wave64.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:39 -04:00
Marek Olšák a8a526c5cb radeonsi/gfx10: set as_ngg for GS prolog 
as_ngg is required by Wave32.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák d3a80f2dda radeonsi/gfx10: remove the disable_ngg option 
because legacy VS hangs.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 0f30223cf4 radeonsi/gfx10: combine hw edgeflags with user edgeflags for correct behavior 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák bfaca7259c radeonsi/gfx10: deduplicate code for esvert_lds_size 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák a6722285c2 radeonsi/gfx10: simplify a streamout loop in gfx10_emit_ngg_epilogue 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 2683347ba0 radeonsi/gfx10: don't use MALLOC for outputs 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 1b4354dab9 radeonsi/gfx10: clean up ESGS ring size computation 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 37db9d2865 radeonsi/gfx10: fix unnecessary LDS overallocation for NGG GS 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 985a59e0d1 radeonsi/gfx10: don't compile the GS copy shader if it's 100% not needed 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 7f0ada3f3e radeonsi/gfx10: set GE_CTNL.PACKET_TO_ONE_PA for NGG 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák e08463ac22 radeonsi/gfx10: update a tunable max_es_verts_base for NGG 
We have to fix the computation so as not to break quads.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 79d56e6a4a radeonsi/gfx10: implement ARB_post_depth_coverage 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák a57f0f8a6b radeonsi: fix leaked compute shader NIR 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:37 -04:00
Marek Olšák 98377d3450 radeonsi: save the enable_nir option in the shader cache correctly 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:35 -04:00
Marek Olšák d227b91d2e radeonsi/gfx10: enable SDMA 
no changes since gfx9 for buffers

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 47dee97329 ac: use llvm.amdgcn.writelane 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Marek Olšák 39d0c68321 ac: fix shader clock on LLVM 9 
Probably relevant commit:

commit dd32dc3f72ec99b1794d62c74d2beb3b60468d50
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Date:   Tue Jul 9 03:10:18 2019 +0000

    [AMDGPU] Always use s_memtime for readcyclecounter

    Differential Revision: https://reviews.llvm.org/D64369

    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365431 91177308-0d34-0410-b5e6-96231b3b80d8

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Boyuan Zhang 26099bc35d radeon/vcn: adding engine type for new fw interface 
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:33 -04:00
Marek Olšák 936e9fa951 radeonsi: use the correct buffer size in si_vid_clear_buffer 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-19 20:16:19 -04:00
Pierre-Eric Pelloux-Prayer b1efc9d05f mesa: add EXT_dsa glEnabledIndexedEXT 
The implementation uses _mesa_ActiveTexture to change the active texture unit and
then reset it.

It causes an unnecessary _NEW_TEXTURE_STATE but:
  - adding an index argument to _mesa_set_enable causes a lot of changes (~140 callers)
  - enable_texture (called by _mesa_set_enable) might cause a _NEW_TEXTURE_STATE
    anyway.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-07-19 20:04:07 -04:00
Pierre-Eric Pelloux-Prayer ff0cafc8f3 mesa: add EXT_dsa glGetTextureLevelParameter*vEXT functions 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-07-19 20:04:06 -04:00
Pierre-Eric Pelloux-Prayer 5fb9c9d628 mesa: add EXT_dsa gl(Copy)Texture(Sub)Image1D/2D/3DEXT functions 
Added functions:
- glTextureImage1DEXT
- glTextureImage2DEXT
- glTextureImage3DEXT
- glTextureSubImage1DEXT
- glTextureSubImage3DEXT
- glCopyTextureImage1DEXT
- glCopyTextureImage2DEXT
- glCopyTextureSubImage1DEXT
- glCopyTextureSubImage2DEXT
- glCopyTextureSubImage3DEXT
- glGetTextureImageEXT

All but the last one can be compiled in a display list.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-07-19 20:04:03 -04:00
Pierre-Eric Pelloux-Prayer f8ad95c45f mesa: move lookup_texture_ext_dsa up in teximage.c 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-07-19 20:04:01 -04:00
Pierre-Eric Pelloux-Prayer 9dd1f7cec0 mesa: pass gl_texture_object as arg to not depend on state 
This will allow to use the same functions for EXT_dsa implementation.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-07-19 20:03:57 -04:00
Pierre-Eric Pelloux-Prayer 0d8826f723 mesa: refactor get_texture_image to remove duplicate code 
Move shared code in a new function (_get_texture_image) and use it instead
of duplicating the same lines.
Will be also used by the EXT_dsa functions (GetTextureImageEXT and GetMultiTexImageEXT).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-07-19 20:03:40 -04:00
Jeremy Newton 666ea30017 pipe-loader: use radeonsi for MM if amdgpu dri is used 
The amdgpu dri is used for the closed source AMD driver. Since this driver
does not implement multimedia, we fall back to radeonsi in mesa to do
multimedia. This corrects the dri driver name for when it is set to amdgpu.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (v1)
Signed-off-by: Jeremy Newton <Jeremy.Newton@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
 2019-07-19 19:59:02 -04:00
Eric Engestrom 1a25980c46 egl: drop incorrect pkg-config file for glvnd 
With b01524fff0 ("meson: don't build libGLES*.so with GLVND")
we dropped the incorrect pkg-config files for GLES*.

Since then, the glvnd issue of its missing files has become painfully
apparent, since it break the build for everyone using glvnd.

NVIDIA has had a fix for a few years now, but has yet to accept it:
https://github.com/NVIDIA/libglvnd/pull/86

Since the breakage is already there, let's clean up everything on our side
while we wait for NVIDIA to accept the fix.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
 2019-07-20 00:07:06 +01:00