AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
186,074 Commits 1 Branch 0 Tags
3e5dfd668d09ea260a667003e33a97fd7b954869
Commit Graph

186074 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Paulo Zanoni
3e5dfd668d anv: add an anv_pipe_bits bit to allow invalidating the TLB 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27928>
 2024-03-11 19:17:20 +00:00
José Roberto de Souza
52ced4008c intel: Drop pre-production steppings 
Workaround tool was already updated with MTL production stepping so no
need to return any stepping value for MTL.

For TGL it was also updated a long time ago, so no need to check for
revision 0.

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27399>
 2024-03-11 18:52:44 +00:00
Juston Li
80f532a636 venus: fix VkDeviceGroupSubmitInfo cmd counts from feedback 
Per v1.3.279 spec "VUID-VkDeviceGroupSubmitInfo-commandBufferCount-00083
commandBufferCount must equal VkSubmitInfo::commandBufferCount"

When adding feedback, need to check for vkDeviceGroupSubmitInfo in the
SubmitInfo pNext to update their commandBufferCount and
pCommandBufferDeviceMasks to include feedback cmds.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28029>
 2024-03-11 18:31:06 +00:00
Mike Blumenkrantz
577085ef0e zink: update nv baseline 
all format selection bugs in core mesa

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28111>
 2024-03-11 18:09:57 +00:00
Faith Ekstrand
cda4ca53b8 nvk: Drop nvk_device::pdev 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28105>
 2024-03-11 17:46:15 +00:00
Faith Ekstrand
4b38ba5d70 nvk: Replace more dev->pdev with nvk_device_physical() 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28105>
 2024-03-11 17:46:15 +00:00
Faith Ekstrand
9ddaa4ea10 nvk: Add and use more cmd_buffer_*_cls helpers 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28105>
 2024-03-11 17:46:15 +00:00
Faith Ekstrand
f55bb91159 nvk: Drop a bunch of dev->pdev and just use pdev 
In all these cases, we already have a pdev temporary, we're just not
using it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28105>
 2024-03-11 17:46:15 +00:00
Friedrich Vock
4c35828933 radv,driconf: Remove active accel struct workaround 
Now unused and enabled by default.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28077>
 2024-03-11 17:08:09 +00:00
Friedrich Vock
217072d25f radv/rt: Force active leaves for every updateable accel struct 
We can't rely on games getting updates right. To avoid adding
workarounds for tons of games, be more robust by default.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28077>
 2024-03-11 17:08:09 +00:00
Samuel Pitoiset
d12984edb8 ac/nir: fix exporting NGG streamout outputs with implicit PrimId from VS/TES 
With RADV, when VS/TES and FS are compiled separately, the PrimitiveId
is exported unconditionally because it's not possible to know if the
FS reads it or not. This happens with fast-link GPL and shader object.

Though, the PrimitiveID should be ignored when it's implicitly exported
because otherwise the stream output LDS offset is incorrect.

This fixes a bunch of failures with transform feedback and Zink/RADV
when shader object is enabled on RDNA3.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27981>
 2024-03-11 16:28:32 +00:00
Eric Engestrom
6d287943d1 vk/update-aliases: drop VK_ERROR_ prefix substitution 
There is no code currently concatenating that string so it is not useful
to have it here, and it is triggering a loop because a substitution is
becoming itself if we remove this prefix.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28102>
 2024-03-11 14:48:14 +00:00
Mike Blumenkrantz
9a57b1df53 driconf: add radv_zero_vram for Crystal Project (1637730) 
fixes #10666

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28079>
 2024-03-11 14:14:52 +00:00
Mike Blumenkrantz
c19edbb6af zink: update nvk baseline with nvk changes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28100>
 2024-03-11 13:55:19 +00:00
Samuel Pitoiset
7e3056e21c zink/ci: update list of flakes for RADV jobs 
Mostly auto-generated with ci-collate.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28039>
 2024-03-11 13:32:04 +00:00
Samuel Pitoiset
e0f9cd882c radv/ci: update list of flakes for VKCTS jobs 
Using ci-collate, no wildcards because this has been auto generated.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28039>
 2024-03-11 13:32:04 +00:00
Samuel Pitoiset
91579236dc ci: use Linux kernel 6.6 for RADV 
Because .b2c-test is used by other farms, this needs to be overwritten
elsewhere.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28039>
 2024-03-11 13:32:04 +00:00
Juan A. Suarez Romero
69fbd5cb90 v3d: fix line coords with perspective projection 
The algorithm used to rendering smooth lines worked under the assumption
that line coords were in the [0, 1] range. This was correct when using
an orthogonal projection, but not when using a perspective projection.

With a perspective projection (where the value for 1/Wc set in the VPM
is not 1.0), line coords values are also affected by this projection, so
the values are not in this range.

To deal with this, we normalize the line coords using the Wc value so
the range becomes [0, 1], and the smooth line rendering works as
expected.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10496
Fixes: ee4d51f8b2 ("v3d: Add a lowering pass for line smoothing")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28072>
 2024-03-11 12:42:50 +00:00
Juan A. Suarez Romero
62e1dff256 v3d: add load_fep_w_v3d intrinsic 
This intrinsic helps to read the W coordinate stored in the QPU register
when initializing the input data for the fragment shaders.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28072>
 2024-03-11 12:42:49 +00:00
Eric Engestrom
4e720f1fef docs: delay 24.1 branchpoint by 2 weeks 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28098>
 2024-03-11 12:34:54 +00:00
Juan A. Suarez Romero
d38ff02c03 v3dv: mark some promoted extensions as supported 
There are few EXT_ extensions that were promoted to KHR_, but we didn't
enabled them as supported.

This makes some CTS tests to be run as unsupported when they should be
supported instead.

For example, we were passing 16/108 line rasterization tests instead of
40/108 because we did not enabled KHR_line rasterization.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28090>
 2024-03-11 12:17:43 +00:00
Boris Brezillon
6fab8abebb vk/meta: Fix base_type selection in build_{clear,blit}_shader() 
vk_format_is_int() returns true for both signed and unsigned integers,
which means unsigned types will always be assigned a GLSL_TYPE_INT type,
which causes some backend compilers (like bifrost) to pick a wrong
register type.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28073>
 2024-03-11 11:52:13 +00:00
Boris Brezillon
c722265c16 vk/meta: Add the PUSH_DESCRIPTOR_BIT flag when creating blit pipeline layouts 
Descriptors are updated with CmdPushDescriptorSet(), we need to reflect
that with a VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT_KHR when
the DescriptorSetLayout is created.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28073>
 2024-03-11 11:52:13 +00:00
Luigi Santivetti
24cedcf838 pvr: return the OS page size for minMemoryMapAlignment 
The driver was returning the wrong limit. The spec says that after calling
vkMapMemory: "subtracting offset bytes from the returned pointer will
always produce an integer multiple of this limit", which is in fact the OS
page size.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10767
Fixes 8991e6464 ("pvr: Add a Vulkan driver for Imagination Technologies PowerVR Rogue GPUs")

Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28044>
 2024-03-11 11:32:53 +00:00
Samuel Pitoiset
433a3c262a util/u_debug: fix parsing of "all" again 
The current implementation is incorrect if the string starts with "all"
like "RADV_DEBUG=allbos".

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10741
Fixes: 0c42c79edf ("utils/u_debug: Fix parse of "all,<something else>")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28051>
 2024-03-11 10:44:12 +00:00
Juan A. Suarez Romero
7eae0e03f1 broadcom/compiler: fix SFU check for 7.1 
Avoid SFU op when the result would land in other thread.

total instructions in shared programs: 691634 -> 691928 (0.04%)
instructions in affected programs: 44888 -> 45182 (0.65%)
helped: 17
HURT: 211
helped stats (abs) min: 1 max: 2 x̄: 1.06 x̃: 1
helped stats (rel) min: 0.19% max: 1.96% x̄: 0.74% x̃: 0.71%
HURT stats (abs)   min: 1 max: 8 x̄: 1.48 x̃: 1
HURT stats (rel)   min: 0.06% max: 14.29% x̄: 2.15% x̃: 1.11%
95% mean confidence interval for instructions value: 1.14 1.44
95% mean confidence interval for instructions %-change: 1.62% 2.24%
Instructions are HURT.

total max-temps in shared programs: 133794 -> 133804 (<.01%)
max-temps in affected programs: 237 -> 247 (4.22%)
helped: 0
HURT: 10
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 1.72% max: 12.50% x̄: 6.52% x̃: 4.63%
95% mean confidence interval for max-temps value: 1.00 1.00
95% mean confidence interval for max-temps %-change: 3.37% 9.66%
Max-temps are HURT.

total sfu-stalls in shared programs: 818 -> 766 (-6.36%)
sfu-stalls in affected programs: 164 -> 112 (-31.71%)
helped: 79
HURT: 26
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 10.00% max: 100.00% x̄: 76.52% x̃: 100.00%
HURT stats (abs)   min: 1 max: 2 x̄: 1.04 x̃: 1
HURT stats (rel)   min: 0.00% max: 100.00% x̄: 12.18% x̃: 0.00%
95% mean confidence interval for sfu-stalls value: -0.67 -0.32
95% mean confidence interval for sfu-stalls %-change: -64.00% -45.11%
Sfu-stalls are helped.

total inst-and-stalls in shared programs: 692452 -> 692694 (0.03%)
inst-and-stalls in affected programs: 36509 -> 36751 (0.66%)
helped: 9
HURT: 181
helped stats (abs) min: 1 max: 2 x̄: 1.11 x̃: 1
helped stats (rel) min: 0.19% max: 1.96% x̄: 0.74% x̃: 0.71%
HURT stats (abs)   min: 1 max: 8 x̄: 1.39 x̃: 1
HURT stats (rel)   min: 0.06% max: 6.25% x̄: 1.57% x̃: 1.09%
95% mean confidence interval for inst-and-stalls value: 1.12 1.43
95% mean confidence interval for inst-and-stalls %-change: 1.27% 1.66%
Inst-and-stalls are HURT.

total nops in shared programs: 25075 -> 25154 (0.32%)
nops in affected programs: 529 -> 608 (14.93%)
helped: 3
HURT: 76
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 5.26% max: 50.00% x̄: 21.75% x̃: 10.00%
HURT stats (abs)   min: 1 max: 6 x̄: 1.08 x̃: 1
HURT stats (rel)   min: 1.04% max: 200.00% x̄: 48.08% x̃: 50.00%
95% mean confidence interval for nops value: 0.84 1.16
95% mean confidence interval for nops %-change: 36.45% 54.40%
Nops are HURT.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28009>
 2024-03-11 10:23:48 +00:00
Juan A. Suarez Romero
9b1008f3bc v3d: disable Early Z for multisampled 16-bit depth buffers 
Besides disabling early-z when a frame is an odd width or height, we
need to disable it if the buffer is 16-bit and multisampled.

Note that the ZS state can change after we decided globably the early-Z.
In this case, we need to re-evaluate the decision.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28009>
 2024-03-11 10:23:48 +00:00
Juan A. Suarez Romero
08af5f2703 v3dv: disable Early Z for multisampled 16-bit depth buffers 
Besides disabling early-z when a frame is an odd width or height, we
need to disable it if the buffer is 16-bit and multisampled.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28009>
 2024-03-11 10:23:48 +00:00
Juan A. Suarez Romero
33e77c9041 v3d,v3d: use new simulator 
The new simulator provides a new API, so we need to adapt the code.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28009>
 2024-03-11 10:23:48 +00:00
Samuel Pitoiset
75a940c949 radvi/ci: enable RADV_PERFTEST=shader_object for RENOIR 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28069>
 2024-03-11 09:45:58 +00:00
Samuel Pitoiset
898f28f790 radv: allow RADV_PERFTEST=shader_object on all GFX9 GPUs 
Renoir used to hangs in CI but it's fixed now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28069>
 2024-03-11 09:45:58 +00:00
Mary Guillemard
fbe820f5a0 panfrost, pan/lib: Move pan_resource_table to panfrost 
pan_blitter now uses its own table definition.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27846>
 2024-03-11 09:23:56 +00:00
Mary Guillemard
4a4698733b pan/bi: Lower ubo table in indices for Valhall 
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27846>
 2024-03-11 09:23:56 +00:00
Mary Guillemard
652e1c2e13 pan/bi: Rework indices for attributes on Valhall 
This also fix missing encoding of indice with non immediate index.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27846>
 2024-03-11 09:23:56 +00:00
Mary Guillemard
27031910f7 pan/bi: Rework indices for image on Valhall 
Lower image table in indices on panfrost.
Also implement indirect texture index support.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27846>
 2024-03-11 09:23:56 +00:00
Mary Guillemard
ce52b6d359 pan/bi: Rework indices for tex on Valhall 
Lower tex/sampler table in indices on panfrost.

This also implement wide indices and change the format of texture and sampler
indices received by the compiler.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27846>
 2024-03-11 09:23:56 +00:00
Mary Guillemard
181891495a pan/lib: Remove variables in blitter 
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27846>
 2024-03-11 09:23:56 +00:00
Mary Guillemard
05607311fe pan/bi: assert indices when offsets are present in bi_emit_tex_valhall 
This should always be 0 as lower_index_to_offset is expected to be set.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27846>
 2024-03-11 09:23:56 +00:00
Samuel Pitoiset
c7202751ad radv: fix emitting default blend state for PS without epilogs and ESO 
When a fragment shader doesn't have any written color outputs it
doesn't need a PS epilog because it's unnecessary. Though, with ESO
the driver still needs to emit the default blend state like graphics
pipelines.

This fixes a bunch of flakes with ESO and Zink.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28008>
 2024-03-11 08:51:47 +00:00
Samuel Pitoiset
7ebff681db radv: re-emit RB+ state with PS epilogs only when the col format changes 
RB+ was re-emitted every time a new PS epilog was requested even if
the non-compacted color format was equal.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28008>
 2024-03-11 08:51:47 +00:00
Samuel Pitoiset
c1307184d2 radv: stop using the custom blend mode for PS epilogs 
Internal operations that set the custom blend mode are monolithic
pipelines only, and the value should always be zero.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28008>
 2024-03-11 08:51:47 +00:00
Tapani Pälli
e592ab466f anv: use workaround framework for Wa_16013000631 
This should drop it from MTL as there it should apply only for a0
stepping.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28047>
 2024-03-11 08:18:26 +00:00
Christian Gmeiner
93255abe30 etnaviv: Fix how we determine the max supported number of varyings 
The driver is written that we should support ETNA_NUM_VARYINGS and reporting
a bigger number will cause some troubles. I had a quick look at galcore's
hw database and there are entries that report a higher value.

So I think what we want is to the minimum value of what kernel driver reports
and what the gallium driver should be able to handle.

Fixes: 84816c22e4 ("etnaviv: ask kernel for max number of supported varyings")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27923>
 2024-03-11 07:30:51 +00:00
Yonggang Luo
14e9894a19 glx: Remove DEBUG code in xfont.c 
This is the result of https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21946#note_1836697

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28093>
 2024-03-11 00:09:58 +00:00
Faith Ekstrand
cc74a819e4 nvk: Disable the Out Of Range Address exception 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27927>
 2024-03-10 17:30:48 +00:00
Faith Ekstrand
0ed7bce8e5 nvk: Always wait for the FALCON in set_priv_reg 
The previous version had an optimization where, instead of actually
waiting on the FALCON to return, it would just do a bunch of nops in
some cases.  This seems broken at least on Turing+ and results in
registers not ending up with the right values.  It only really shows up
when you set two registers back-to-back in which case the second
SET_PRIV_REG may mess up the first.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27927>
 2024-03-10 17:30:48 +00:00
Faith Ekstrand
df90d80d9d nvk: Document the register name for the helper load workaround 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27927>
 2024-03-10 17:30:48 +00:00
Faith Ekstrand
cbcef73668 nil: Fix a typo in a comment 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27927>
 2024-03-10 17:30:48 +00:00
Echo J
f8f9bceb17 nak: Rip out a few dead_code statements 
This is a far less radical solution (but I still removed a decent
amount of them)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27991>
 2024-03-10 16:28:14 +00:00
Caio Oliveira
e1afffe7fa intel/brw: Use hstride instead of stride for accumulator 
The `stride` field is not meant to be used by ARFs (like the
accumulator), and is always 1.  Use the `hstride` instead.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28064>
 2024-03-09 18:26:24 +00:00