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Author SHA1 Message Date
Samuel Pitoiset
3deebeb20a radv: unify emitting non-indirect/indirect descriptor sets 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31096>
 2024-09-10 15:07:04 +00:00
Samuel Pitoiset
bac5ad9f8d radv: rename radv_emit_descriptor_pointers() to radv_emit_descriptors_per_stage() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31096>
 2024-09-10 15:07:04 +00:00
Samuel Pitoiset
2c2735083b radv: store the indirect descriptor sets VA to the descriptor state 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31096>
 2024-09-10 15:07:04 +00:00
Samuel Pitoiset
529d7ebdcc radv: cleanup some functions that emit shader user SGPRs 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31096>
 2024-09-10 15:07:04 +00:00
Pierre-Eric Pelloux-Prayer
ed781c7403 frontends/va: honor DRI_PRIME for VA_DISPLAY_WAYLAND 
This matches the X11 behavior. Other display types are unaffected.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8069
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31012>
 2024-09-10 14:32:23 +00:00
Pavel Ondračka
286bac97ad r300: remove nir_opt_load_store_vectorize 
This is another remnant from ntt times, and at this point we have
everything as ubo_vec4 so this had zero effect anyway (and there was a
bug in the callback function as a bonus, but it got never called luckily).

No shader-db changes.

Fixes the r300 part of https://gitlab.freedesktop.org/mesa/mesa/-/issues/11350

Reviewed-by: Filip Gawin <filip@gawin.net>
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30890>
 2024-09-10 13:33:58 +00:00
Pavel Ondračka
c8c1cec1f7 ttn: unconditionally call nir_shader_gather_info 
Mesa st always calls this and thus some drivers expect to have the
info. This fixes assertions in NineTests on iris.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6946
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Tested-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27460>
 2024-09-10 12:38:46 +00:00
Pavel Ondračka
3b73c80280 ttn: use nir_shader_get_entrypoint in nir_shader_gather_info 
To fix crash with serialized NIR in some circumstances.

Acked-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27460>
 2024-09-10 12:38:46 +00:00
David Rosca
69c18607a9 pipe: Remove video enc header_flags 
This is now replaced with raw headers.

Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30927>
 2024-09-10 11:58:26 +00:00
David Rosca
a308360fd4 radeonsi/vcn: Don't copy the pipe enc structs 
There is no need to copy them, frontend calls begin_frame immediately
followed by encode_bitstream so we can use it directly.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30927>
 2024-09-10 11:58:26 +00:00
David Rosca
96f3daeaeb radeonsi: Remove unused radeon_temporal.h 
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30927>
 2024-09-10 11:58:26 +00:00
David Rosca
c43f8cb0b9 radeonsi/vcn: Support raw packed headers for H264 and HEVC 
This works by copying the input headers at the beginning of the output
bitstream buffer. VPS/SPS/PPS are still written by driver and slice
headers are written by FW, but all other headers are directly copied
from application input.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30927>
 2024-09-10 11:58:26 +00:00
David Rosca
12f60c1cd1 frontends/va: Allow multiple NALUs in coded buffer segments 
Add PIPE_VIDEO_CODEC_UNIT_LOCATION_FLAG_SINGLE_NALU to set
VA_CODED_BUF_STATUS_SINGLE_NALU for each segment.
Always set this flag in d3d12 to keep the old behavior.

Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30927>
 2024-09-10 11:58:26 +00:00
David Rosca
1866f4d899 frontends/va: Support raw packed headers for H264 and HEVC 
Make all packed headers received from application available
to drivers. Add emulation prevention bytes if the packed header
was sent without them, so the driver will always get the headers
with emulation prevention bytes and is able to directly copy them
to output bitstream as is.

Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30927>
 2024-09-10 11:58:25 +00:00
David Rosca
20f9418478 pipe: Add pipe_h264_nal_unit_type and pipe_h265_nal_unit_type enums 
This will also be useful for drivers.

Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30927>
 2024-09-10 11:58:25 +00:00
David Heidelberg
6bf7b5bcd8 nir_lower_mem_access_bit_sizes: Assert when 0 components or bits are requested 
Prevent the accidental passing of 0 components or bits, as it makes no sense.

Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Suggested-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31103>
 2024-09-10 11:17:48 +00:00
Karol Herbst
45b531fdfc rusticl: add nir debugging option 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30152>
 2024-09-10 10:54:41 +00:00
Karol Herbst
f098620c21 rusticl/kernel: add optimized Kernel variant 
By default we have to take into account that the application could set
offsets, or that one kernel launch won't fit into a single hw dispatch.

In order to mitigate the overhead it causes at kernel runtime, and because
those things are in most cases irrelevant, we compile an optimized kernel
making a few assumptions.

We also make use of the the workgroup_size_hint as an additional
optimization.

This should speed up relatively small kernels significantly as it can cut
the instruction count in half for those.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30152>
 2024-09-10 10:54:41 +00:00
Karol Herbst
59f63381d4 rusticl/kernel: add CompilationResult to hold compilation artifacts 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30152>
 2024-09-10 10:54:41 +00:00
Karol Herbst
41100e3743 rusticl/kernel: track if arg is dead inside CompiledKernelArg 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30152>
 2024-09-10 10:54:41 +00:00
Karol Herbst
6cf74419fe rusticl/kernel: split up nir compilation into various steps 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30152>
 2024-09-10 10:54:41 +00:00
Karol Herbst
36550d9da3 rusticl/kernel: move assign_locations into CompiledKernelArg 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30152>
 2024-09-10 10:54:41 +00:00
Karol Herbst
76b2236834 rusticl/mesa: implement Clone for NirShader 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30152>
 2024-09-10 10:54:41 +00:00
Karol Herbst
89b2c3927e rusticl/mesa: add more workgroup_Size functions to NirShader 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30152>
 2024-09-10 10:54:41 +00:00
Karol Herbst
8383c727b2 rusticl/platform: add env variable to disable kernel variants 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30152>
 2024-09-10 10:54:41 +00:00
Karol Herbst
634366e1dc rusticl/kernel: move dead_var options into constant space 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30152>
 2024-09-10 10:54:41 +00:00
Erik Faye-Lund
b59b2d4bfa mesa/main: tighten gl-version checks 
If we allow this whenever the extension is supported by the driver, we
end up allowing out-of-spec behavior for instance on GLES 1.x.

So let's tighten these checks to consider the current API, by using the
new helpers.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31039>
 2024-09-10 10:10:44 +00:00
Erik Faye-Lund
9068e4415a mesa/main: tighten glsl-version checks 
We don't want to expose GLSL versions above what should be exposed for
the current API, otherwise we allow out-of-spec behavior.

This is unlikely to have any real-world effect, because most of the
time, the version is the highest supported. It's only if the version is
artificially limited that this should matter.

But it's also a bit cleaner this way.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31039>
 2024-09-10 10:10:44 +00:00
Erik Faye-Lund
97b8febf3d mesa/main: add gles-compatible check helpers 
We need to perform these checks fairly often; let's create helpers for
them.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31039>
 2024-09-10 10:10:44 +00:00
Daniel Schürmann
dfc13fcf9f aco: introduce Operand flag 'CopyKill' 
This flag indicates that the Operand must be copied in order to satisfy register
constraints. The copy is immediately killed by the instruction.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30299>
 2024-09-10 09:44:53 +00:00
Daniel Schürmann
91f65d5935 aco/live_var_analysis: use Clobbered flag to calculate additional operand demand 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30299>
 2024-09-10 09:44:53 +00:00
Daniel Schürmann
5a6fa8a8eb aco: introduce new Operand flag 'Clobbered' 
This flag indicates that the Operand's register gets clobbered by the instruction.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30299>
 2024-09-10 09:44:53 +00:00
Daniel Schürmann
1c14013b9e aco/live_var_analysis: Don't attempt to re-insert the same temporary twice into live set 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30299>
 2024-09-10 09:44:53 +00:00
Samuel Pitoiset
e621f0c173 radv: rework emitting indirect compute pipelines with DGC 
Instead of recreating the packets in the DGC prepare shader, the best
solution is to emit them to a temporary CS object at pipeline creation
time. Then in the DGC prepare shader, the driver just needs to copy
the packets.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31101>
 2024-09-10 09:13:44 +00:00
Samuel Pitoiset
8802612458 radv: advertise VK_KHR_pipeline_binary 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30812>
 2024-09-10 08:19:52 +00:00
Samuel Pitoiset
b4d6d88c6b radv: add support for importing pipeline binaries 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30812>
 2024-09-10 08:19:52 +00:00
Samuel Pitoiset
96a300a3f0 radv: add support for capturing pipeline binaries 
When VK_PIPELINE_CREATE_2_CAPTURE_DATA_BIT_KHR is set, implementations
shouldn't store pipeline data to an internal cache.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30812>
 2024-09-10 08:19:52 +00:00
Samuel Pitoiset
be06bfcbed radv: add initial support for pipeline binaries 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30812>
 2024-09-10 08:19:52 +00:00
Samuel Pitoiset
32a4c9e117 radv: disable the in-memory cache when disableInternalCache is true 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30812>
 2024-09-10 08:19:52 +00:00
Samuel Pitoiset
af76f48fc2 radv: make pipeline hashing functions non-static 
They will be used to generate pipeline hashes from pCreateInfo.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30812>
 2024-09-10 08:19:52 +00:00
Samuel Pitoiset
3423facbd1 radv: store whether a RT pipeline is a library to the shaders cache 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30812>
 2024-09-10 08:19:52 +00:00
Samuel Pitoiset
0a15dcf95c radv: store the number of RT stages per pipeline to the shaders cache 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30812>
 2024-09-10 08:19:52 +00:00
Samuel Pitoiset
42b1c728b2 radv: store the SHA1 RT stage to the shaders cache 
When pipeline binaries are imported, that SHA1 would also need to be
imported in order to deduplicate shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30812>
 2024-09-10 08:19:52 +00:00
Samuel Pitoiset
3d2cd4687c radv: rework helpers for serialize/deserialize shaders 
They will be used to serialize/deserialize shaders for pipeline
binaries.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30812>
 2024-09-10 08:19:52 +00:00
Samuel Pitoiset
279b5ca10c vulkan: skip the disk cache when disableInternalCache is true 
The Vulkan spec says:
    "disableInternalCache can be used to disable the driver’s internal
     cache, allowing an application to take full control of both memory
     and disk usage."

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30812>
 2024-09-10 08:19:52 +00:00
Samuel Pitoiset
60474c9d69 vulkan: Update XML and headers to 1.3.294 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30812>
 2024-09-10 08:19:52 +00:00
Samuel Pitoiset
0c7896deef Revert "radv: specialize push constant stages with DGC" 
This change was wrong but there is nothing testing this. For example,
if we have a pipeline with VS+GS+FS and DGC only updates push constants
for VS. On GFX9+, VS is merged to GS, so the VS push constants info
would be zero and nothing would be emitted.

This reverts commit 45319cb253.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31099>
 2024-09-10 07:39:54 +00:00
David Rosca
656a03e583 glx: Destroy base screen after deinitScreen 
Instead of destroying it before deinitScreen to match the original order.

Fixes: 407a9094f7 ("glx: move base screen destroy to glx_screen_cleanup")

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31087>
 2024-09-10 08:55:58 +02:00
Dave Airlie
7531f6fd9c radv/anv/video: handling encoding both sps and pps in same buffer 
This API should allow encoding these back to back into the same
buffer, so handle it properly.

Cc: mesa-stable
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31086>
 2024-09-10 06:03:15 +00:00
Dave Airlie
62320232de vl/bitstream: use an int32_t for se encoding. 
This seems to fix a bug found with radv and ffmpeg encoding

Fixes: 1782ab4d8b ("util: add a bitstream encoder for video stream headers.")
Acked-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31086>
 2024-09-10 06:03:15 +00:00