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Author SHA1 Message Date
Erik Faye-Lund
3c259f5cac mailmap: invert tomeu's mapping 
Tomeu hasn't been working at Collabora for a while now, let's invert the
mapping so his private email address is more prominent.

Reviewed-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29240>
 2024-06-19 09:06:14 +00:00
Dave Airlie
b888946f7a radv/video: fix layered decode h264/5 tests. 
CTS tests both layered and separate DPB, but radv wasn't handling
layered properly when used with the tier 2 dpb handling.

This adjusts the addresses to use the layer index for tier2.

Fixes dEQP-VK.video.decode.*layered*

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29758>
 2024-06-19 08:02:31 +00:00
Yonggang Luo
a0f3d99f44 gallivm: add lp_context_ref for combine usage of LLVMContextSetOpaquePointers 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26033>
 2024-06-19 17:01:51 +10:00
Dave Airlie
65092ab1a5 nouveau/nvc0: add support for using common pushbuf dumper 
This dumper is covers things a lot better than just hex, and
should support all the classes we currently use on nvc0.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29542>
 2024-06-19 02:35:24 +00:00
Dave Airlie
f12641f89f nouveau/push: add support for m2mf/i2mf to dumper 
This will be used to dump nvc0 command buffers.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29542>
 2024-06-19 02:35:24 +00:00
Faith Ekstrand
4b6970cf36 ci: Update trace SHAs 
I have no idea which commit changed these but they look fine.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793>
 2024-06-19 01:56:23 +00:00
Faith Ekstrand
22f1b04a99 nir/format_convert: Assert that UNORM formats are <= 16 bits 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793>
 2024-06-19 01:56:23 +00:00
Faith Ekstrand
5f5f4474f6 nir: Add a format unpack helper and tests 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793>
 2024-06-19 01:56:22 +00:00
Faith Ekstrand
faf4c2edfe nir: Add a format pack helper and tests 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793>
 2024-06-19 01:56:22 +00:00
Faith Ekstrand
bd961343d3 util: Make format_srgb.h C++ safe 
This fixes link errors with MSVC if used in C++ files

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793>
 2024-06-19 01:56:22 +00:00
Faith Ekstrand
1ffb0c5af4 nir: Support 0 and 32 bits in some format conversion helpers 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793>
 2024-06-19 01:56:22 +00:00
Faith Ekstrand
34161d3fda nir: Move most of nir_format_convert to a C file 
There's no good reason for this to be header-only besides laziness on my
part when I first wrote a few "small" helpers.  Some of those are pretty
good sized and don't need to be inlined.

Keeping the original copyright since this is just moving code.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793>
 2024-06-19 01:56:22 +00:00
Faith Ekstrand
9d3b144018 nir: Add a nir_intrinsic_use for unit tests 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793>
 2024-06-19 01:56:22 +00:00
Faith Ekstrand
5b9ac9a68f nir/format_convert: Use fmin/fmax to clamp R9G9B9E5 data 
As long as drivers implement an fmin/fmax that do the right thing with
NaN, there's no reason for the integer comparison.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793>
 2024-06-19 01:56:22 +00:00
Faith Ekstrand
86aad90e2a nir/format_convert: Smash NaN to 0 in pack_r9g9b9e5() 
I have no idea why I flipped the order of these to checks vs. the C
code when I wrote the NIR helper.  We need to deal with NaN first or
else the fmin will smash NaN to MAX_RGB9E5 and it won't get handled as
NaN.

Fixes: 9981709d8f ("nir/format_convert: Add a function to pack RGB9_E5 formats")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793>
 2024-06-19 01:56:22 +00:00
Faith Ekstrand
cd8a3ea04b util/format: Handle denorms when converting to R11G11B10F 
The spec allows denormals and the R11G11B20F decoder handles them but
the encoder always flushes them to zero.  We should be consistent and
handle denorms going both directions.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793>
 2024-06-19 01:56:22 +00:00
Faith Ekstrand
ef5e441274 util/format: Round to nearest even when converting to R11G11B20F 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793>
 2024-06-19 01:56:22 +00:00
Faith Ekstrand
3797fc18d8 util/format_pack: Clamp SNORM values to [-1, 1] when unpacking 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793>
 2024-06-19 01:56:22 +00:00
Faith Ekstrand
354f0958af util/format_pack: Also use iround for SCALED formats 
This is probably not necessary but more correct.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793>
 2024-06-19 01:56:22 +00:00
Faith Ekstrand
b187be5b1c util/format_pack: Fix packing of signed 1010102 SSCALED formats 
Previously, [SU]SCALED formats would hit the integer path and we would
generate:

    ((uint32_t)CLAMP(src[i], min, max)) & MASK

This is fine for unsigned scaled formats.  However, for signed formats,
a negative float value cast to an unsigned integer yields undefined
results.  On x86, it implicitly clamps to 0.  This change makes us
generate:

    ((uint32_t)(int32_t)CLAMP(src[i], min, max)) & MASK

hich gets us correct casting.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793>
 2024-06-19 01:56:22 +00:00
Caio Oliveira
2a9f4618c5 intel/brw: Make component_size() consistent between VGRF and FIXED_GRF 
Change so the size rounds up to the next multiple of the horizontal stride like
is done for VGRF.  This was causing an inconsistency in regs_read() -- The original
component_size() calculation for FIXED_GRF excluded any padding at the end but it was
still being discounted by regs_read().

Suggested by Curro.

Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11069
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29736>
 2024-06-19 01:33:58 +00:00
Caio Oliveira
8fb70f0746 intel/brw: Add unit tests for scoreboard handling FIXED_GRF with stride 
Based on shaders reported in
https://gitlab.freedesktop.org/mesa/mesa/-/issues/11069 and
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29723.  These
currently fail, later patch will enable them.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29736>
 2024-06-19 01:33:58 +00:00
Dave Airlie
7013797827 nvidia: fixup classes import and import new classes. 
This fixes the import script up and pulls in all new class changes,
a bunch of new registers and inline-to-memory classes which we can
use for debugging dumps from nvc0.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29773>
 2024-06-18 22:06:55 +00:00
Lionel Landwerlin
c4e952dbd9 anv: reuse device local variable 
No functional changes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29595>
 2024-06-18 20:44:51 +00:00
Lionel Landwerlin
0147908a89 anv: predicate emission of STATE_BASE_ADDRESS 
Completely skip the stall & programming if the bindless address has
not changed. Only on Gfx12.5+ since previous generations also program
the binding table pool base address through STATE_BASE_ADDRESS.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29595>
 2024-06-18 20:44:51 +00:00
Lionel Landwerlin
9a3e8508a7 anv: factor out STATE_BASE_ADDRESS filling to helper function 
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29595>
 2024-06-18 20:44:51 +00:00
Lionel Landwerlin
f8c0a99d52 anv: emit conditional after gfx state flushing 
In a following change the predicate registers might be used when
flushing the state.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29595>
 2024-06-18 20:44:51 +00:00
Lionel Landwerlin
ed43be941e anv: add custom mi write fences 
The mi-builder already takes care of mi write/read fences, but we have
a few cases in Anv where we also need to fence mi-write ->
shader-read.

We also have one case where a command buffer jump address is modified
by a previous mi write command.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29595>
 2024-06-18 20:44:51 +00:00
Rhys Perry
9fe3af1e2a aco: insert s_nop before discard early exit sendmsg(dealloc_vgpr) 
Forgot about this one.

fossil-db (gfx1100):
Totals from 3920 (2.94% of 133461) affected shaders:
Instrs: 6632088 -> 6636008 (+0.06%)
CodeSize: 34165376 -> 34181056 (+0.05%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Fixes: 37fbfa655a ("aco: insert s_nop before VGPR deallocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29770>
 2024-06-18 20:17:38 +00:00
Erico Nunes
814e7c7af5 Revert "ci: lima farm maintenance" 
This reverts commit c5e13af73c.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29474>
 2024-06-18 19:13:27 +00:00
Erico Nunes
08ecb39789 lima/ci: update piglit ci expectations 
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29474>
 2024-06-18 19:13:27 +00:00
Maaz Mombasawala
9cadf45ddf svga: Retry DRM_VMW_SYNCCPU ioctl on failure. 
The ioctl DRM_VMW_SYNCCPU may sometimes fail with ERESTART or EBUSY, which
in turn bubbles up to the application as a GL_OUT_OF_MEMORY error.
We are seeing this in glamor, while this does not cause any real issues, it
does pollute the system log.
Retrying DRM_VMW_SYNCCPU fixes this issue.

Reviewed-by: Neha Bhende <neha.bhende@broadcom.com>
Reviewed-by: Zack Rusin <zack.rusin@broadcom.com>
Reviewed-by: Martin Krastev <martin.krastev@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29755>
 2024-06-18 19:01:53 +00:00
Caio Oliveira
f982d2bb79 intel/brw: Fix typo in DPAS emission code 
The enums were mixed up.  Code was working because they were being
used only for their numerical values.

Fixes: e666872c75 ("intel/compiler: Initial bits for DPAS instruction")
Acked-by: Iván Briano <ivan.briano@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29762>
 2024-06-18 18:25:21 +00:00
Georg Lehmann
c3c398d56d aco: make local functions static in files without anonymous namespace 
I don't think adding an anonymous namespace in these files is worth it
given the amount of global functions

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29740>
 2024-06-18 17:53:07 +00:00
Georg Lehmann
046414e061 aco: add more anonymous namespaces 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29740>
 2024-06-18 17:53:07 +00:00
Connor Abbott
c9c483bf02 ir3: Enable early preamble 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462>
 2024-06-18 16:52:31 +00:00
Danylo Piliaiev
d8d192f3f4 ir3: Correctly assemble mova1 with (r) on const 
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462>
 2024-06-18 16:52:31 +00:00
Danylo Piliaiev
e9c764c825 freedreno/ir3: mova has special meaning for (r) flag 
It prevents the hazard when in the following case:

 ldc.1.k.imm c[a1.x], 0, 1
 (ss)mova1 a1.x, 8

The correct way is:
 ldc.1.k.imm c[a1.x], 0, 1
 (ss)mova1 a1.x, (r)8

Without it ldc may use a1.x which is set after ldc.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462>
 2024-06-18 16:52:31 +00:00
Connor Abbott
0a4afef6ea freedreno/a6xx: Implement early preamble 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462>
 2024-06-18 16:52:31 +00:00
Connor Abbott
53ba1613ec tu: Implement early preamble 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462>
 2024-06-18 16:52:31 +00:00
Connor Abbott
3ce04c1111 ir3: Add ir3_info::early_preamble 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462>
 2024-06-18 16:52:31 +00:00
Connor Abbott
d35c1e5051 freedreno/a6xx: Workaround early preamble HW bug 
Port of the previous commit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462>
 2024-06-18 16:52:31 +00:00
Connor Abbott
472ce31e56 tu: Workaround early preamble HW bug 
This seems to be reproducable only by running CTS in parallel with
deqp-runner.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462>
 2024-06-18 16:52:31 +00:00
Connor Abbott
1f1f42e9d4 freedreno,ir3: Add has_early_preamble 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462>
 2024-06-18 16:52:31 +00:00
Connor Abbott
aa1603bcb0 ir3/legalize: Insert dummy bary.f after preamble 
Otherwise it will not get executed with early preamble.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462>
 2024-06-18 16:52:31 +00:00
Connor Abbott
b38fef99ac ir3: Put VS->TCS barrier after preamble 
Putting it beforehand doesn't work with early preamble.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462>
 2024-06-18 16:52:31 +00:00
Adam Jackson
10d21d4100 mesa: Enable EXT_shadow_samplers for GLES2 
I thought this was just the funny GLES spelling of the extn name, but
there's also some ESSL bits you need to add. Most of which you could
probably yoink from the old Unity glsl-optimizer (which itself yoinked
most of the GLSL compiler from Mesa):

94a9b2959b

Signed-off-by: Adam Jackson <ajax@redhat.com>
Co-authored-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6691>
 2024-06-18 14:40:33 +00:00
Samuel Pitoiset
33a849e004 radv: emit indirect sets for indirect compute pipelines with DGC 
This used to work by luck because the current DGC prepare shader
is using one descriptor set and it was the currently bound compute
shader... Using two descriptor sets or starting from 1 would just fail.

For indirect compute pipelines, descriptors must be emitted from the
DGC shader because there is no bound compute pipeline at all. This
solution is using indirect descriptor sets because it's much shorter
and easier to implement. This could be improved but nothing uses
indirect compute pipelines and this is like experimental stuff.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29700>
 2024-06-18 13:50:16 +00:00
Samuel Pitoiset
b1ba02e707 radv: force using indirect descriptor sets for indirect compute pipelines 
Emitting descriptors in DGC is a huge pain but using indirect descriptor
sets is much easier.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29700>
 2024-06-18 13:50:16 +00:00
Timothy Arceri
ef21df917f glsl: remove do_function_inlining() 
This no longer has any users. nir based inlining should be used for any
new code.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29519>
 2024-06-18 12:34:52 +00:00