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Ian Romanick 3b579a2ea8 intel/compiler: Validate 3-source instruction source strides 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20527>
 2023-01-09 19:15:19 +00:00
Ian Romanick c5684019f6 intel/compiler: Validate 3-source instruction sources have same base type 
This can't be checked in EU validation because the bits to describe the
base type of the individual sources no longer exist.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20527>
 2023-01-09 19:15:19 +00:00
Georg Lehmann c241980751 aco: Mark more instructions as 16bit on GFX10. 
p_cvt_f16_f32_rtne will be lowered to v_cvt_f16_f32 and we already know that
preserves the high bits.

I tested the others on GFX1036.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20574>
 2023-01-09 18:54:35 +00:00
Rhys Perry b64afc1d37 aco: use s_delay_alu skip field 
fossil-db (gfx1100):
Totals from 130066 (96.65% of 134574) affected shaders:
Instrs: 80208817 -> 71420648 (-10.96%)
CodeSize: 403523036 -> 368370360 (-8.71%)
Latency: 658064779 -> 657935384 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 87698268 -> 87693326 (-0.01%); split: -0.01%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20512>
 2023-01-09 18:22:59 +00:00
Rhys Perry e2f083c0a7 aco: add more dependency instructions under waitcnt class 
This makes these instructions free when considering pipeline statistics
and s_delay_alu insertion.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20512>
 2023-01-09 18:22:59 +00:00
Rhys Perry c8357136d4 aco: improve parse_delay_alu 
Use gpr_map to determine how many cycles each dependency of the
s_delay_alu needs. This information helps the pass avoid further
s_delay_alu instructions.

fossil-db (gfx1100):
Totals from 13097 (9.73% of 134574) affected shaders:
Instrs: 30711894 -> 30702692 (-0.03%)
CodeSize: 153462500 -> 153425692 (-0.02%)
Latency: 372758612 -> 372741922 (-0.00%)
InvThroughput: 50164111 -> 50160717 (-0.01%); split: -0.01%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20512>
 2023-01-09 18:22:59 +00:00
Samuel Pitoiset bbad550f3d radv/winsys: fill real info for CHIP_GFX1100 
From my AMD Radeon 7900 XT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20476>
 2023-01-09 17:28:05 +00:00
Samuel Pitoiset d944959fbf radv: configure VGT_TF_PARAM directly from the command buffer 
The driver re-emits the tessellation domain origin state when a new
pipeline with tessellation is bound, so this can be moved there.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20486>
 2023-01-09 15:46:49 +00:00
Samuel Pitoiset f1b3e6aefd radv: fix re-emitting tessellation domain origin when it's dynamic 
The winding order can be different between pipelines.

Fixes new dEQP-VK.pipeline.pipeline_library.dynamic_control_points.change_*_winding.

Fixes: f22290949d ("radv: add support for dynamic tessellation domain origin")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20486>
 2023-01-09 15:46:49 +00:00
Pierre-Eric Pelloux-Prayer 6e24b76c10 util/00-mesa-defaults: add Limbo workaround 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7976
Cc: mesa-stable

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Diego Viola <diego.viola@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20548>
 2023-01-09 15:17:34 +00:00
José Roberto de Souza 1067ec90a5 anv: Update PIPELINE_CONTROL flush when switching pipeline mode in TGL+ 
This 2 PIPELINE_CONTROL flushes are not necessary for TGL and newer
and also it have different requirements of flush, so here doing
this two changes at the same time.

As no ANV_PIPE_INVALIDATE_BITS is set as parameter of
anv_add_pending_pipe_bits(),
genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer) will only emit one
PIPELINE_CONTROL.

BSpec: 44505
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20501>
 2023-01-09 14:40:26 +00:00
José Roberto de Souza 172e0b0ebf iris: Update PIPELINE_CONTROL flush when switching pipeline mode in TGL+ 
This 2 PIPELINE_CONTROL flushes are not necessary for TGL and newer
and also it have different requirements of flush, so here doing
this two changes at the same time.

BSpec: 44505
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20501>
 2023-01-09 14:40:26 +00:00
Pierre-Eric Pelloux-Prayer 595079c37c hud: extract float printf modifer selection logic to helper 
And use it when printing to a file from hud_graph_add_value.

This turns:
  fps: 59.972473
Into:
  fps: 59.97

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20494>
 2023-01-09 14:25:55 +01:00
Pierre-Eric Pelloux-Prayer 31d95dd3c6 dri: get rid of LIBGL_SHOW_FPS 
The same functionnality can be achieved using GALLIUM_HUD=stdout,fps (and for
now a fallback is doing this if LIBGL_SHOW_FPS=1 is used).

This removes one entry from the vtable and simplify dri3_handle_present_event.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20494>
 2023-01-09 14:25:51 +01:00
Pierre-Eric Pelloux-Prayer 87f4d79427 hud,dri: emulate LIBGL_SHOW_FPS using hud 
LIBGL_SHOW_FPS=1 is now almost equivalent to using:

   GALLIUM_HUD=stdout,fps
   GALLIUM_HUD_VISIBLE=false
   GALLIUM_HUD_PERIOD=$LIBGL_SHOW_FPS

so we can drop LIBGL_SHOW_FPS handling in dri and move it to hud.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20494>
 2023-01-09 14:25:43 +01:00
Pierre-Eric Pelloux-Prayer 0a3e91b9ee hud: add "stdout" option to print values to console 
Values gathered by the hud context will be printed to stdout,
prefixed by their name.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20494>
 2023-01-09 14:25:41 +01:00
Pierre-Eric Pelloux-Prayer 3170f7d7fa hud: check GALLIUM_HUD_DUMP_DIR value only once 
Minor cleanup but will allow another change in the next commit.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20494>
 2023-01-09 14:25:25 +01:00
Dmitry Osipenko 32fe60e8c4 util/disk_cache: Support combined foz ro and non-foz rw caches 
Mesa utilizes only one type of cache at a time. This patch enables support
for combined reading from read-only Fossilize cache + non-foz read-write
caches.

From now on, a non-foz read-write caches will first try to retrieve data
from a read-only foz cache if new MESA_DISK_CACHE_COMBINE_RW_WITH_RO_FOZ
environment variable is set to true, otherwise the caching behaviour is
unchanged. The new flag has no effect when MESA_DISK_CACHE_SINGLE_FILE=1,
i.e. when the single-file foz cache is used.

This change allows us to ship a prebuilt RO caches for a certain
applications, while the rest of applications will benefit from the
regular RW caching that supports cache-size limitation. This feature
will be used by ChromeOS.

Usage example #1:

MESA_DISK_CACHE_DATABASE=0
MESA_DISK_CACHE_SINGLE_FILE=0
MESA_DISK_CACHE_COMBINE_RW_WITH_RO_FOZ=1
MESA_DISK_CACHE_READ_ONLY_FOZ_DBS=rocache1,rocache2

Usage example #2:

MESA_DISK_CACHE_DATABASE=1
MESA_DISK_CACHE_SINGLE_FILE=0
MESA_DISK_CACHE_COMBINE_RW_WITH_RO_FOZ=1
MESA_DISK_CACHE_READ_ONLY_FOZ_DBS=rocache1,rocache2

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18551>
 2023-01-09 12:12:55 +00:00
Dmitry Osipenko 75dae4f8e3 util/disk_cache: Store environment variable values in disk_cache struct 
Store values of all environment variables related to disk caching within
struct disk_cache. This makes code cleaner and also will allow us to
combine read-only single-file cache with read-write caches.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18551>
 2023-01-09 12:12:55 +00:00
Dmitry Osipenko 434bf4b482 util/fossilize_db: Fix resource leaks in foz_prepare() error paths 
The foz_prepare() doesn't perform cleanup on failure and then foz_destroy()
is never invoked for the foz_db, causing minor memory and FD leaks. Add the
cleanup to foz_prepare() error code paths. Make foz_destroy() to clear the
foz_db struct for consistency, right now the destroying is invoked only once,
but Mesa cache error code paths aren't trivial and may change in the future.

Suggested-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18551>
 2023-01-09 12:12:55 +00:00
SoroushIMG 2b77a65800 zink: fix disappearing smooth lines after workaround 
The passthrough geometery shader was using points for smooth lines.
This meant the shader would always statically get 1 vertex and never emit a line.

Fixes: 80285db9ef ("zink: lower smooth-lines if not supported")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20582>
 2023-01-09 10:56:52 +00:00
Xaver Hugl 41eb491fb6 driconf: add a workaround for plasmashell freezing 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7624

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Dan Johansen <strit@manjaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20472>
 2023-01-09 09:04:25 +00:00
Lionel Landwerlin 6b494745be intel/fs: only avoid SIMD32 if strictly inferior in throughput 
This enabled SIMD32 in blorp shaders and seems to be give a small FPS
bump when using a DG2 GPU as secondary (requires copies to linear
buffers to exchange with main GPU).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19341>
 2023-01-09 08:41:47 +00:00
Samuel Pitoiset 480308c6e5 radv: remove unused radv_is_raster_enabled() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20517>
 2023-01-09 08:20:10 +00:00
Samuel Pitoiset 1099fd71b0 radv: initialize blend state after compiling shaders 
This function used to compute part of the graphics key but everything
has been moved.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20517>
 2023-01-09 08:20:10 +00:00
Samuel Pitoiset 87b88de973 radv: replace blend_enable_4bit by radv_pipeline_is_blend_enabled() 
Same logic, though this workaround shouldn't be determined from the
pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20517>
 2023-01-09 08:20:10 +00:00
Samuel Pitoiset 0768cc5ed1 radv: determine DISABLE_DUAL_QUAD directly from the command buffer 
With dynamic color blend equations, dual-src blending will be
determined from the dynamic state, better to move it there now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20517>
 2023-01-09 08:20:10 +00:00
Samuel Pitoiset ab48665f8d radv: simplify uses of color_write_mask/color_blend_enable 
The common Vulkan code already sets them when they are dynamic, so this
was redundant.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20517>
 2023-01-09 08:20:10 +00:00
Samuel Pitoiset 25f067ef4c radv: adjust CB_SHADER_MASK right after SPI_SHADER_COL_FORMAT is compacted 
This is a cleanup.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20517>
 2023-01-09 08:20:10 +00:00
Samuel Pitoiset db2108672d radv: remove unused parameter in radv_init_multisample_state() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20517>
 2023-01-09 08:20:10 +00:00
Vinson Lee 84527093c4 spirv2dxil: Fix memory leak on error path. 
Fix resource leak reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable file_contents going out of scope leaks the storage it points to.

Fixes: 531d17c334 ("spirv2dxil: Support linking multiple shaders")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20576>
 2023-01-08 21:12:46 +00:00
Erico Nunes 9b29876a02 ci: Start weston with Xwayland 
This can be used instead of HWCI_START_XORG to provide X in CI.
It will only be actually used if HWCI_START_XORG is not set in the same
job.
It is particularly useful as weston has the explicit headless backend
which is more straightforward to use in the headless systems in CI.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20393>
 2023-01-08 17:36:13 +01:00
Gert Wollny c91a78c03a virgl: Use virgl host side shader stage IDs when reading caps 
The ordering of enum pipe_shader_type changed, but not all locations where
the host uses the original ordering were changed to translate to the new
ordering, namely reading the shader caps was not fixed up so do this now.

v2: - inline virgl_shader_stage_convert (Corentin)
    - encapuslate use of host shader stage when reading array elements
      of host caps

Fixes: a26543f636
   gallium: reorder the shader stage enum to match Mesa

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8023

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20544>
 2023-01-07 10:02:18 +00:00
David Heidelberg 300dc7d653 ci/virgl: cover more glx@glx-copy-sub-buffer flakes 
Generally, where this test doesn't fail, there it flakes.

Cover all variants.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7753

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20556>
 2023-01-07 03:37:21 +01:00
Ryan Neph 91a1455e3b Revert "ci/venus: disable for now" 
This reverts commit 22ab226396.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20554>
 2023-01-07 01:23:28 +00:00
Ryan Neph 3e66ef53d4 ci: Bump crosvm and virglrenderer versions 
Signed-off-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20554>
 2023-01-07 01:23:28 +00:00
Mary d8e5714e81 isaspec: Fix bitmask conversions when isa.bitsize < 64 
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20541>
 2023-01-07 00:14:10 +01:00
Lucas Stach 2d7ea1895e etnaviv: add cleared surfaces to context flush set when necessary 
A RS/BLT clear might only clear the TS buffer, so the cleared resources
need to be added to the context flush set when they aren't explicitly
flushed in order to make the effect of the clear visible in the resource
on context flush.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20012>
 2023-01-06 19:30:47 +00:00
Lucas Stach cf501a7f34 etnaviv: split adding resource to context flush set into own function 
It is needed in a few more places, so split it into a separate
function to make it reusable.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20012>
 2023-01-06 19:30:47 +00:00
Eric Engestrom a6e487e367 ci_run_n_monitor.py: automatically retry on transient errors 
This morning a GitLab update was deployed, leading to a few moments
where the API returned an error.

python-gitlab is actually able to handle a number of those and retry
automatically, so let's enable that:
https://python-gitlab.readthedocs.io/en/stable/api-usage-advanced.html#transient-errors

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20094>
 2023-01-06 19:28:55 +00:00
Emma Anholt 617e7596d1 zink: Add an assert for not seeing any more MSAA image-to-buffer copies. 
Now that transfer_map gets MSAA handled by the helper, we shouldn't have
to worry about this any more.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20523>
 2023-01-06 19:00:17 +00:00
Emma Anholt f74bbcd8a0 zink: Have u_transfer_helper resolve MSAA surfaces when mapping. 
This fixes all the dEQP winsys multisampling failures (like
dEQP-GLES3.functional.multisample.default_framebuffer.depth) I've found so
far.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20523>
 2023-01-06 19:00:17 +00:00
Emma Anholt 823e34f938 u_transfer_helper: Merge in-place and split z/s interleaved map handling. 
The paths were mostly the same, except that in-place was missing the
appropriate layering for MSAA helper re-mapping.  We can instead share
more code, making the differences between the interleave packing clear,
and have the MSAA resolve blit happen once before we do the split
mappings.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20523>
 2023-01-06 19:00:17 +00:00
Emma Anholt 4372069f5a u_transfer_helper: Use common code for interleaved unmap. 
The function was static and only used from this caller, and the only
difference was that the interleaved case didn't handle trans->ss (which
will always be unset for an interleaved mapping since interleaving splits
the underlying map of the MSAA resource into trans->trans and
trans->trans2).

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20523>
 2023-01-06 19:00:17 +00:00
Emma Anholt b5b2194a3a u_transfer_helpre: Drop !interleave handling from the interleave code. 
It's only called when need_interleave_path(), and they're static functions
in this file since !17959.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20523>
 2023-01-06 19:00:17 +00:00
Emma Anholt 95c4241f47 docs/gallium: Explain that MSAA transfer_map must be supported. 
It's called this way in various drivers, and is an established part of the
transfer_map interface.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20523>
 2023-01-06 19:00:17 +00:00
Emma Anholt 03a26ae3d9 ci: Fix VK driver setup for HWCI_START_*. 
Review feedback requested a change that was incorrect, causing Xorg to
start to fail, but I forgot to retest the manual -full jobs that relied on
it.

Fixes: 99a6f2a186 ("ci: Set the path to the VK drivers during HWCI_START_XORG/WESTON.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20523>
 2023-01-06 19:00:17 +00:00
Rohan Garg 85650297d2 anv,hasvk: move the null check into the function call and drop null check copies 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20104>
 2023-01-06 17:22:16 +00:00
Rohan Garg 0ae23b81a4 anv: Drop useless FIXME 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20104>
 2023-01-06 17:22:16 +00:00
Rohan Garg 00ffe8227f anv,hasvk: drop unused function 
align_i32 is not used anywhere

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20104>
 2023-01-06 17:22:16 +00:00