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Author SHA1 Message Date
Job Noorman 39ff20b757 ir3/legalize: emit predication quirk nops in next block 
Emitting in the same block as the pred[tfe] caused helper_sched to
sometimes insert unnecessary (eq). For example:

block i:
...
prede
(eq)(rpt6)nop
block i+1:
(eq)nop

Emitting the quirk nops in the next block (i+1 in this case) prevents
this.

Note that the small number of shaders where NOPs regress, are cases
where an extra (eq)nop is inserted in a block that doesn't contain any
other nops (but did contain the quirk nop before this change).

Totals from 3814 (2.32% of 164575) affected shaders:
Instrs: 6732543 -> 6732252 (-0.00%); split: -0.01%, +0.00%
CodeSize: 11978286 -> 11978086 (-0.00%); split: -0.00%, +0.00%
NOPs: 1683239 -> 1682948 (-0.02%); split: -0.02%, +0.01%
(ss)-stall: 635237 -> 634077 (-0.18%)
(sy)-stall: 2562027 -> 2533761 (-1.10%); split: -1.10%, +0.00%
Cat0: 1849898 -> 1849607 (-0.02%); split: -0.02%, +0.01%

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35934>
 2025-07-07 10:36:50 +00:00
Wolf480pl 62b3fd0a5e radv/virtio: don't leak drm FD when using vpipe 
The fd in radv_physical_device_try_create is one we opened in that function.
We don't need it when vpipe is in use, so we should close it,
before setting it to -1.

Fixes: 999d5098b4 ("radv/virtio: support vpipe")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35947>
 2025-07-07 09:51:15 +00:00
Valentine Burley 72e76689a3 turnip/ci: Reduce parallelism of a660-vk 
Some `sm8350-hdk` DUTs are currently failing LAVA health checks in the
Collabora farm, reducing available capacity. To mitigate job delays,
temporarily reduce the parallelism of the `a660-vk` job.

Thanks to previous optimizations and further increasing the
tests_per_group setting, there is no loss in test coverage.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35939>
 2025-07-07 06:06:25 +00:00
Valentine Burley 1d5d6e3560 turnip/ci: Skip slow tests in a660-vk 
These tests have been intermittently timing out even before the changes
in this MR (see e.g. https://gitlab.freedesktop.org/mesa/mesa/-/jobs/79736836),
so skip them in the pre-merge job by adding them to the slow-skips list.

They will still run in the full nightly job.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35939>
 2025-07-07 06:06:25 +00:00
Valentine Burley 43a70fc385 freedreno/ci: Increase the concurrency of sm8350-hdk 
The sm8350-hdk has 8 threads and 12 GB of RAM, which allows increasing
`FDO_CI_CONCURRENT` to 9 to speed up all its jobs.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35939>
 2025-07-07 06:06:25 +00:00
Dmitry Osipenko d561be1c27 venus: Fix vn_CreateImage crashing with debug build of venus 
Fix Venus crashing when running in KMS mode and using debug build of Mesa
due to previous patch missing to adjust the assert-check, making it prepared
to handle WSI/scanout images.

Fixes: 31a8218f5b78 ("venus: wsi workaround for gamescope")
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35958>
 2025-07-07 01:45:50 +03:00
Alyssa Rosenzweig d31cb824df treewide: use VARYING_BIT_* 
Via Coccinelle patch generated by the following Python:

  varys = [ "POS", "COL0", "COL1", "FOGC", "TEX0", "TEX1", "TEX2", "TEX3", "TEX4",
           "TEX5", "TEX6", "TEX7", "PSIZ", "BFC0", "BFC1", "EDGE", "CLIP_VERTEX",
           "CLIP_DIST0", "CLIP_DIST1", "CULL_DIST0", "CULL_DIST1", "PRIMITIVE_ID",
           "PRIMITIVE_COUNT", "LAYER", "VIEWPORT", "FACE",
           "PRIMITIVE_SHADING_RATE", "PNTC", "TESS_LEVEL_OUTER",
           "TESS_LEVEL_INNER", "PRIMITIVE_INDICES", "BOUNDING_BOX0",
           "BOUNDING_BOX1", "VIEWPORT_MASK", "CULL_PRIMITIVE" ]
  t = """
  @@
  @@

  -(1 << VARYING_SLOT_${V})
  +VARYING_BIT_${V}

  @@
  @@

  -BITFIELD_BIT(VARYING_SLOT_${V})
  +VARYING_BIT_${V}

  @@
  @@

  -(1ull << VARYING_SLOT_${V})
  +VARYING_BIT_${V}

  @@
  @@

  -BITFIELD64_BIT(VARYING_SLOT_${V})
  +VARYING_BIT_${V}

  """
  for v in varys:
      from mako.template import Template
      print(Template(t).render(V = v))

Closes: #13453
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> [panfrost, common]
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> [broadcom]
Reviewed-by: Corentin Noël <corentin.noel@collabora.com> [virgl]
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> [zink]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35917>
 2025-07-04 19:01:04 +00:00
Mike Blumenkrantz 956d3f1562 mesa/st: handle renderbuffer with null zsbuf 
this matches cbuf handling

Fixes: 2eb45daa9c ("gallium: de-pointerize pipe_surface")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35941>
 2025-07-04 17:36:40 +00:00
Mike Blumenkrantz 3925e53efe zink: fix submit_count disambiguation for bo usage checks 
also improve docs for submit_count to avoid similar errors

Fixes: 61b0955308 ("zink: always check submit_count to disambiguate when checking/waiting")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35940>
 2025-07-04 17:19:44 +00:00
Mike Blumenkrantz 69b5abee14 zink: fix acquire semaphore sync 
the semaphore stage is VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT,
so the src access barrier must also use this in order to ensure it happens
after the acquire

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35940>
 2025-07-04 17:19:44 +00:00
Mike Blumenkrantz 85e4a19ed1 zink: stop deleting src stage in image sync 
this probably doesn't help much and makes debugging harder

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35940>
 2025-07-04 17:19:44 +00:00
Pierre-Eric Pelloux-Prayer c6086f3a54 frontends/va: fix potential overflows 
The multiplication of 32 bits integers will be truncated before
being widened to the destination variable' size.
Reported by static analysis.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35877>
 2025-07-04 15:26:39 +00:00
Pierre-Eric Pelloux-Prayer f7890c0df9 mesa: fix total_invocations computation 
The multiplication of 32 bits integers will be truncated before
being widened to the destination variable' size.
Reported by static analysis.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35877>
 2025-07-04 15:26:39 +00:00
Pierre-Eric Pelloux-Prayer fddd5bc2e5 util/texcompress: fix comparison warning 
Fixes warnings reported by static analysis. It shouldn't change
the behavior as numxpixels/numypixels should always be smaller
than 255.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35877>
 2025-07-04 15:26:39 +00:00
Pierre-Eric Pelloux-Prayer 41c7e6b17c aux/indices: remove useless lines 
Presumably these were added to silence a "variable j not used"
compiler warning, but "j" seems used in the loop counter.
Reported by static analysis.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35877>
 2025-07-04 15:26:39 +00:00
Pierre-Eric Pelloux-Prayer 62657471c8 egl: cast printf argument to the expected type 
Reported by static analysis.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35877>
 2025-07-04 15:26:39 +00:00
Pierre-Eric Pelloux-Prayer 1aaf1f858e mesa/program: remove useless assignment 
target_mask is set to 0 and then unconditionnally assigned
a different value 10 lines below. Drop the useless init.
Reported by static analysis.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35877>
 2025-07-04 15:26:39 +00:00
Pierre-Eric Pelloux-Prayer bd625f7453 tc: fix potential overflows 
Reported by static analysis. Multiplication may overflow
before being converted to the larger type, so fix this
by casting one of the operands to the destination type.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35877>
 2025-07-04 15:26:38 +00:00
Pierre-Eric Pelloux-Prayer 8731293170 radeonsi: fix potential overflows 
Reported by static analysis. Multiplication may overflow
before being converted to the larger type, so fix this
by casting one of the operands to the destination type.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35877>
 2025-07-04 15:26:38 +00:00
Pierre-Eric Pelloux-Prayer fab2c9a923 ac: fix invalid array size 
Reported by static analysis.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35877>
 2025-07-04 15:26:38 +00:00
Pierre-Eric Pelloux-Prayer 6e371f0a8a ac: fix potential overflows 
Reported by static analysis. Multiplication may overflow
before being converted to the larger type, so fix this
by casting one of the operands to the destination type.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35877>
 2025-07-04 15:26:38 +00:00
Eric Engestrom 0c641c8170 panfrost/meson: drop invalid C-only -Wno-override-init from C++ args 
cc1plus: warning: command-line option '-Wno-override-init' is valid for C/ObjC but not for C++

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35892>
 2025-07-04 13:03:46 +00:00
Erik Faye-Lund 504e511c44 panfrost: limit sample_shading to bifrost and later 
We haven't wired this up in the Midgard compiler, so we can't expose
sample shading on Midgard GPUs. This all seems fixable, because the KILL
instruction can update the coverage without the kill-flag (yeah, a bit
confusing naming), but until someone puts in the time to wire up that,
let's just disable the functionality to avoid crashes.

Fixes: 6bba718027 ("panfrost: Advertise SAMPLE_SHADING")
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35881>
 2025-07-04 11:53:03 +00:00
Karmjit Mahil 6237388454 tu: Remove handling of float16 in the 3D blit path 
We're using the 2D path for float16 now, so no need for this code
anymore.

Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35709>
 2025-07-04 11:25:10 +00:00
Karmjit Mahil 65861e81af tu: Use A2D for float16 formats 
Previously we had to utilize the 3D path for float16 formats since
the hw would implicitly convert f16->f32 canonicalizing NaNs
resulting in copies that were not bit exact.
The `HALF_PRECISION` bit was discovered which avoids this
conversion, so we can go back to using the 2D path.

Using the 2D path is faster than the 3D path. Results of Crucible
bench.cast-image show an improvement of slightly above a 50% average
for the 1 MiB image->image copy of {4,6,16,32,64)B chunks, and for
the 16 GiB there's a slight improvement.
The affected formats are {R16,R16G16,R16G16A16}_SFLOAT.

Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35709>
 2025-07-04 11:25:10 +00:00
Danylo Piliaiev 3bcedb66c6 freedreno/regs: update A2D definitions 
Co-authored-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35709>
 2025-07-04 11:25:09 +00:00
Caleb Callaway 6f38d58db3 iris: ISP invalidate at end of compute batches 
We're now re-emitting push constants at the
start of compute batches, so we can avoid the
overhead of restoring them.

CC: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35873>
 2025-07-04 11:05:38 +00:00
Caleb Callaway 8fd008a45f iris: re-emit push constants at compute batch start 
Per Ken Graunke, corruption issues with push
constants for render batches on Gen12 graphics
have been observed and worked around by re-emitting
push constants at the start of the batch buffer.
We're seeing similar issues with compute batches,
so we'll apply the same work-around.

Fixes corruption reported in Blender on ADL/RPL

CC: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35873>
 2025-07-04 11:05:38 +00:00
Job Noorman c757b22c5f ir3: add subreg move optimization 
Certain instructions essentially behave as a move of half of their full
src to their half dst. More specifically:
- `cov.u32u16 hdst, src`: moves lower half of src to hdst.
- `[a]shr.b hdst, src, 16`: moves upper half of src to hdst.

In mergedregs mode, if the src and dst of these instructions are
assigned overlapping registers, they can be removed.

Implement this by 1) merging the src and dst merge sets of such
instruction before RA, and 2) removing them if RA assigned overlapping
registers.

Totals from 7483 (4.55% of 164575) affected shaders:
Instrs: 8913039 -> 8859209 (-0.60%); split: -0.62%, +0.01%
CodeSize: 16588988 -> 16489082 (-0.60%); split: -0.61%, +0.00%
NOPs: 2020848 -> 2013070 (-0.38%); split: -0.71%, +0.33%
MOVs: 352179 -> 352146 (-0.01%); split: -0.06%, +0.05%
COVs: 256946 -> 242972 (-5.44%)
Full: 145737 -> 145738 (+0.00%)
(ss): 224816 -> 222102 (-1.21%); split: -1.24%, +0.03%
(sy): 109208 -> 109222 (+0.01%); split: -0.01%, +0.02%
(ss)-stall: 842387 -> 831457 (-1.30%); split: -1.63%, +0.33%
(sy)-stall: 3353188 -> 3337732 (-0.46%); split: -0.62%, +0.16%
Preamble Instrs: 1403333 -> 1401362 (-0.14%)
Cat0: 2219312 -> 2211530 (-0.35%); split: -0.65%, +0.30%
Cat1: 690367 -> 677240 (-1.90%); split: -1.99%, +0.09%
Cat2: 3279215 -> 3246293 (-1.00%)
Cat7: 412865 -> 412866 (+0.00%)

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35858>
 2025-07-04 10:38:36 +00:00
Job Noorman 28e810eb74 ir3/merge_regs: fix merge set alignment check 
b_offset should be checked against b's alignment, not a's.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35858>
 2025-07-04 10:38:36 +00:00
Lars-Ivar Hesselberg Simonsen 84fd6b67dd panvk: Advertise VK_KHR_unified_image_layouts 
We're currently not using image layouts in PanVK so we can advertise
this extension without additional changes.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: John Anthony <john.anthony@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35911>
 2025-07-04 09:26:34 +00:00
Valentine Burley 486c51db95 panvk/ci: Run full g52-vk job pre-merge 
We have enough DUTs to increase the job parallelism to 8. At this level,
the runtime reported by deqp-runner averages about 8:30, which is below
the 10-minute target recommended by the docs.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35913>
 2025-07-04 08:05:42 +00:00
Valentine Burley a0ccc32ef0 freedreno/ci: Merge a750-piglit-cl and a750-gl 
The actual runtime of `a750-piglit-cl` was under 2 minutes.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35906>
 2025-07-04 06:36:10 +00:00
Valentine Burley 6abc967835 freedreno/ci: Increase the concurrency of a660-gl-cl 
The sm8350-hdk has 8 threads and 12 GB of RAM, which allows increasing
`FDO_CI_CONCURRENT` to 9 to speed up the job.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35906>
 2025-07-04 06:36:10 +00:00
Valentine Burley f0204a3b5c freedreno/ci: Increase parallelism of a660-gl-cl 
Following the previous commit, we have an additional `parallel:` slot
available.
Use it to run `a660-gl-cl` without a fraction, allowing us to remove the
nightly `a660-gl-full` job.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35906>
 2025-07-04 06:36:09 +00:00
Valentine Burley 793d25ca13 freedreno/ci: Merge a660-piglit-cl and a660-gl 
The actual runtime of `a660-piglit-cl` is under 2 minutes, so it can be
merged into `a660-gl` to improve resource utilization by avoiding the
launch of the additional job.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35906>
 2025-07-04 06:36:09 +00:00
Valentine Burley bdb3fdfe20 freedreno/ci: Merge a618-piglit-cl into a618-piglit 
The actual runtime of `a618-piglit-cl` was under 2 minutes, so it can be
folded into the main `a618-piglit` job.

To accommodate this, the "gpu" profile's fraction was fully moved to the
deqp-runner suite without changing the overall test coverage:
`fraction = 3` * `DEQP_FRACTION: 2` = 6

Also drop the redundant freedreno-a618-skips.txt skip while we're here,
as that's automatically picked up via GPU_VERSION.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35906>
 2025-07-04 06:36:08 +00:00
Mike Blumenkrantz 30e79aafa0 zink: fix another case of blocking image op reordering with GENERAL layouts 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35896>
 2025-07-04 03:41:48 +00:00
Mike Blumenkrantz 446d8d23c2 zink: more fixups for GENERAL image sync 
these need to always use unordered access when set

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35896>
 2025-07-04 03:41:48 +00:00
Mike Blumenkrantz 3f51dad5bb zink: use HIC image transitions to init swapchain images 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35896>
 2025-07-04 03:41:48 +00:00
Mike Blumenkrantz 5e98018e80 zink: make HIC image transitions public 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35896>
 2025-07-04 03:41:47 +00:00
Mel Henning 3db7628e4c nak: Use a worklist approach for dataflow 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35446>
 2025-07-03 19:38:16 -04:00
Mel Henning a418ece021 nak: Use the dataflow framework for NextUseLiveness 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35446>
 2025-07-03 19:38:16 -04:00
Mel Henning 1240c2591b nak: Factor dataflow logic out of SimpleLiveness 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35446>
 2025-07-03 19:38:16 -04:00
Georg Lehmann 045ddb992a nir/opt_algebraic: optimize 16bit vec2 comparison followed by b2i16 using usub_sat 
Helps vectorized emulated fp16 -> fp8 conversions

No Foz-DB changes.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35876>
 2025-07-03 20:08:39 +00:00
Yiwei Zhang b21e62b71a anv: avoid leaking private binding for aliased wsi image 
Aliased wsi image has to share the same private binding with the
original wsi image for memory consistency. If the private binding
exists, it needs to be released before being overridden.

Fixes: d85a9d658f ("anv/image: Call into WSI to create swapchain images")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35893>
 2025-07-03 17:40:31 +00:00
Mike Blumenkrantz ef0bf50ae9 zink: don't modify the u_foreach_bit64 bit inside the loop in loop_io_var_mask() 
this breaks the macro and causes infinite loops on patch locations in release builds

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35922>
 2025-07-03 17:21:21 +00:00
Mary Guillemard 14608f1469 panvk: Do not adjust job offset with base on CSF 
The JOB_OFFSET only actually affect the global id and not wg id.

In NIR common, we assume that if base wg isn't supported, it means that
global and wg id already contains it.

To follow the convention around, we remove the offset to assume
global id will need an offset added.

Alone, this doesn't change functionality as we always lower away global
id so far.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35909>
 2025-07-03 16:41:51 +00:00
Mary Guillemard a3272cd0ce pan/genxml: Fix wrong size for compute size workgroup 
Fix annoying warnings when decoding CSF.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: 486c341769 ("panfrost: Add architecture description XML for v10")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35909>
 2025-07-03 16:41:51 +00:00
Alyssa Rosenzweig f853d285ef nir/lower_tex: optimize LOD bias lower for txl 
make sure we can fold the f2f away. alternatively f2fmp would work
here but details.

elden ring:

Totals from 137 (4.27% of 3206) affected shaders:
Instrs: 485455 -> 484904 (-0.11%)
CodeSize: 3218638 -> 3215338 (-0.10%)
ALU: 308071 -> 307520 (-0.18%)
FSCIB: 308071 -> 307520 (-0.18%)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35909>
 2025-07-03 16:41:51 +00:00