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radeonsi: fix potential overflows

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Reported by static analysis. Multiplication may overflow
before being converted to the larger type, so fix this
by casting one of the operands to the destination type.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35877>
This commit is contained in:
Pierre-Eric Pelloux-Prayer
2025-06-19 10:17:15 +02:00
committed by Marge Bot
parent fab2c9a923
commit 8731293170
5 changed files with 8 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/radeonsi/si_compute.c
+1 -1
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@@ -294,7 +294,7 @@ static bool si_setup_compute_scratch_buffer(struct si_context *sctx, struct si_s
{
uint64_t scratch_bo_size =
sctx->compute_scratch_buffer ? sctx->compute_scratch_buffer->b.b.width0 : 0;
uint64_t scratch_needed = sctx->max_seen_compute_scratch_bytes_per_wave *
uint64_t scratch_needed = (uint64_t)sctx->max_seen_compute_scratch_bytes_per_wave *
sctx->screen->info.max_scratch_waves;
assert(scratch_needed);
src/gallium/drivers/radeonsi/si_debug.c
+1 -1
View File
@@ -739,7 +739,7 @@ static void si_dump_descriptor_list(struct si_screen *screen, struct si_descript
}
struct si_log_chunk_desc_list *chunk =
CALLOC_VARIANT_LENGTH_STRUCT(si_log_chunk_desc_list, 4 * element_dw_size * num_elements);
CALLOC_VARIANT_LENGTH_STRUCT(si_log_chunk_desc_list, 4 * (size_t)element_dw_size * num_elements);
chunk->shader_name = shader_name;
chunk->elem_name = elem_name;
chunk->element_dw_size = element_dw_size;
src/gallium/drivers/radeonsi/si_state_draw.cpp
+4 -4
View File
@@ -1586,7 +1586,7 @@ static void si_emit_draw_packets(struct si_context *sctx, const struct pipe_draw
if (increment_draw_id) {
if (index_bias_varies) {
for (unsigned i = 0; i < num_draws; i++) {
uint64_t va = index_va + draws[i].start * index_size;
uint64_t va = index_va + (uint64_t)draws[i].start * index_size;
if (i > 0) {
radeon_set_sh_reg_seq(sh_base_reg + SI_SGPR_BASE_VERTEX * 4, 2);
@@ -1610,7 +1610,7 @@ static void si_emit_draw_packets(struct si_context *sctx, const struct pipe_draw
} else {
/* Only DrawID varies. */
for (unsigned i = 0; i < num_draws; i++) {
uint64_t va = index_va + draws[i].start * index_size;
uint64_t va = index_va + (uint64_t)draws[i].start * index_size;
if (i > 0)
radeon_set_sh_reg(sh_base_reg + SI_SGPR_DRAWID * 4, drawid_base + i);
@@ -1632,7 +1632,7 @@ static void si_emit_draw_packets(struct si_context *sctx, const struct pipe_draw
if (index_bias_varies) {
/* Only BaseVertex varies. */
for (unsigned i = 0; i < num_draws; i++) {
uint64_t va = index_va + draws[i].start * index_size;
uint64_t va = index_va + (uint64_t)draws[i].start * index_size;
if (i > 0)
radeon_set_sh_reg(sh_base_reg + SI_SGPR_BASE_VERTEX * 4, draws[i].index_bias);
@@ -1662,7 +1662,7 @@ static void si_emit_draw_packets(struct si_context *sctx, const struct pipe_draw
}
for (unsigned i = 0; i < num_draws; i++) {
uint64_t va = index_va + draws[i].start * index_size;
uint64_t va = index_va + (uint64_t)draws[i].start * index_size;
radeon_emit(PKT3(PKT3_DRAW_INDEX_2, 4, render_cond_bit));
radeon_emit(index_max_size);
src/gallium/drivers/radeonsi/si_test_blit_perf.c
+1 -1
View File
@@ -670,7 +670,7 @@ void si_test_blit_perf(struct si_screen *sscreen)
ctx->destroy_query(ctx, q);
double sec = (double)result.u64 / (1000 * 1000 * 1000);
uint64_t pixels_per_surf = num_repeats * dst_box.width *
uint64_t pixels_per_surf = num_repeats * (uint64_t) dst_box.width *
dst_box.height * dst_box.depth;
uint64_t bytes;
src/gallium/drivers/radeonsi/si_texture.c
+1 -1
View File
@@ -1545,7 +1545,7 @@ bool si_texture_commit(struct si_context *ctx, struct si_resource *res, unsigned
for (int i = 0; i < d; i++) {
uint64_t base = commit_base + i * depth_pitch;
for (int j = 0; j < h; j++) {
uint64_t offset = base + j * row_pitch;
uint64_t offset = base + j * (uint64_t)row_pitch;
if (!ctx->ws->buffer_commit(ctx->ws, res->buf, offset, size, commit))
return false;
}