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11063 Commits

Author SHA1 Message Date
Timur Kristóf 39448c8e9c radv, aco: Add uses_full_subgroups to compute shader info. 
Allow the compiler to assume that the shader always has full subgroups,
meaning that the initial EXEC mask is -1 in all waves (all lanes enabled).
This assumption is incorrect for ray tracing and internal (meta) shaders
because they can use unaligned dispatch.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20670>
 2023-01-26 01:59:26 +00:00
Timur Kristóf 22b350fa27 radv: Get rid of app_shaders_internal. 
This will make sure the internal field is set to true for internal
shaders which are initialized outside of radv_device_init_meta.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20670>
 2023-01-26 01:59:26 +00:00
Friedrich Vock e07729e8de radv/rmv: Correct timestamp shifting 
The shifting was off-by-one compared to how it is done in the kernel. Also, excess_length needs to be casted to uint64_t to prevent zeroing everything except the 5 LSBs.

Fixes: abf3bcd6 ("radv: Add RMV resource tracking")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20820>
 2023-01-26 01:17:26 +00:00
Friedrich Vock 292d7b95fc radv/rmv: Log bo destruction before freeing it 
Fixes: abf3bcd6 ("radv: Add RMV resource tracking")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20820>
 2023-01-26 01:17:26 +00:00
Friedrich Vock 2d5d247203 radv/rmv: Avoid more CPU unmap deadlocks 
Fixes: 8d0e6c02 ("radv: Add RMV tracing utilities")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20820>
 2023-01-26 01:17:26 +00:00
Friedrich Vock 2dec10c297 radv/rmv: Also check the other pid field 
Sometimes it seems like this field contains the correct pid instead.

Fixes: 8d0e6c02 ("radv: Add RMV tracing utilities")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20820>
 2023-01-26 01:17:26 +00:00
Emma Anholt f6c06ef2f6 ci: Add manual rules variations to disable irrelevant driver jobs. 
If you're only affecting one or a couple of drivers, it would be nice if
your pipeline buttons on the web UI weren't full of manual run buttons for
all the other drivers.

This is a bunch of duplicated lines, but less than it could have been now
that we have !references.

In some of these cases (i915g, nouveau, etnaviv), we have no non-manual
jobs for those drivers, so I could have just rewritten the original
"driver-rules" to "driver-manual-rules".  I decided to keep things
consistent between drivers, though, because this is all esoteric enough to
readers already without making different drivers' rules look different.

Fixes: #4891
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17445>
 2023-01-26 00:48:19 +00:00
Samuel Pitoiset a5bff81f47 radv/winsys: prefix all error messages with RADV 
RadeonSI prints the exact same message and it can be confusing.
All other error messages in the winsys are prefixed now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20904>
 2023-01-25 18:47:52 +00:00
Mike Blumenkrantz d5846bd1e5 radv: Move constant flushing check out to callers. 
Approximately 10% improvement in CPU overhead score on 3900X.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20655>
 2023-01-25 18:27:20 +00:00
Konstantin Seurer 3eb646efd0 radv: Merge the leaf and internal converter 
We have everything we need in the internal one already so we can just
encode leaf nodes there. Since this functionality isn't split anymore,
the shader was renamed to "encode".

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20768>
 2023-01-25 15:54:03 +00:00
Rhys Perry 883f18f761 radv: skip creation of null TLAS for null winsys 
This won't work because there are no memory types.

Fixes fossilize replay with NULL winsys.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Fixes: 31ca19589f ("radv: Create a null TLAS as meta state")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20878>
 2023-01-25 14:16:54 +00:00
Samuel Pitoiset 7b76d46e38 radv: fix RADV_DEBUG=hang with multiple cmdbuffer per submission 
With RADV_DEBUG=hang, there is only one cmdbuffer per submission and
this has been broken recently.

This fixes a segfault when generating GPU hang reports.

Fixes: 76deaa1b1a ("radv: Refactor command buffer handling in radv_queue_submit_normal.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20860>
 2023-01-25 09:05:11 +00:00
Bas Nieuwenhuizen 75ae391375 radv: Reduce descriptor pool allocation for alignment. 
Since we can now rely on this due to the stricter layout code.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20847>
 2023-01-25 08:45:50 +00:00
Bas Nieuwenhuizen 6a16d3b312 radv: Strictly limit alignment needed within a descriptor set. 
By doing two passes we limit the number of times we need to have a gap
after a 16-byte descriptor to align for an image descriptor.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20847>
 2023-01-25 08:45:50 +00:00
Yogesh Mohan Marimuthu 44f25792d5 radv: allow NULL initial_preamble_cs in radv_amdgpu_winsys_cs_submit_sysmem() 
In case of mcbp, shadowed_regs is initialized early in radv_queue_init()
function by submitting the command buffer. The command buffer is submitted in
radv_init_shadowed_regs_buffer_state() function. When RADV_DEBUG=noibs is used
radv_amdgpu_winsys_cs_submit_sysmem() function is used to submit command buffer.
radv_amdgpu_winsys_cs_submit_sysmem() crashes here because initial_preamble_cs
is NULL. This patch fixes the radv_amdgpu_winsys_cs_submit_sysmem() function
to support NULL initial_preamble_cs.

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>
 2023-01-25 04:53:34 +00:00
Yogesh Mohan Marimuthu c6702e1530 radv: fence complete struct is 4 qw size 
also libdrm function amdgpu_cs_chunk_fence_info_to_data() has qw multiplier
and hence need not do it in radv_amdgpu_cs_submit().

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>
 2023-01-25 04:53:34 +00:00
Yogesh Mohan Marimuthu b11f49f069 radv: INDEX_TYPE and NUM_INSTANCES PKT3 are not shadowed 
INDEX_TYPE and NUM_INSTANCES PKT3 should be always written
if shadowing is enabled since they are not shadowed.

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>
 2023-01-25 04:53:34 +00:00
Yogesh Mohan Marimuthu 2258090c73 radv: set preemp flag and pre_ena bit for shadowregs 
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>
 2023-01-25 04:53:34 +00:00
Yogesh Mohan Marimuthu 97b9b2cf40 radv: add support for register shadowing 
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>
 2023-01-25 04:53:34 +00:00
Yogesh Mohan Marimuthu db61db7f67 radv: add shadowregs variable to RADV_DEBUG environment variable 
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>
 2023-01-25 04:53:34 +00:00
Yogesh Mohan Marimuthu 5f0fcc05c2 ac,radeonsi: move shadow regs create ib preamble function to amd common 
The si_create_shadowing_ib_preamble() function can be reused from radv also.
Hence it is moved.

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>
 2023-01-25 04:53:34 +00:00
Samuel Pitoiset 49b7f0842e radv: print depth image size with RADV_DEBUG=img 
This turned out to be useful when investigating a GPU hang.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20872>
 2023-01-24 15:42:44 +00:00
Samuel Pitoiset bf3c14b8a5 radv/winsys: fix incorrect PCIID for GFX11 in the null winsys 
Fixes: bbad550f3d ("radv/winsys: fill real info for CHIP_GFX1100")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20850>
 2023-01-24 08:00:57 +00:00
Emma Anholt 849af68dbd ci/piglit: Add some common piglit skips for Mesa CI's testing of glx. 
Since our X servers don't have a compositor, and we run tests in parallel,
various swap and frontbuffer tests won't ever be stable.  Rather than
having every driver have to track those flakes, make a general X11 skips
list as a known issue of our CI rather than pointing fingers at drivers.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>
 2023-01-24 00:13:02 +00:00
Emma Anholt ac5b1df2b9 ci: Move PIGLIT_PLATFORM settings out of the .tomls. 
I'm going to add some automatic platform-based skips lists shortly (like
all-skips but more targeted), and this avoids needing to add them to each
.toml.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>
 2023-01-24 00:13:02 +00:00
Mike Blumenkrantz c26306f7d9 radv: stop using radv_pipeline_has_stage() in BindPipeline 
this incurs a small amount of unnecessary cpu overhead as compared to just
checking bitflags

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20615>
 2023-01-23 21:04:53 +00:00
Sergi Blanch Torne cce1f1ea70 ci: Uprev kernel to 6.1.7 
Once prepared the archive in gfx-ci/linux for kernel 6.1 pointing to 6.1.7 and
with the patches for mesa, update the link. Also, enable some kconfigs needed
for the Adreno and USB.

One job in AMD required an expectation file to be updated with one test. Also,
an mt8192 device tree has been included in the arm64 trees for lava build.

Co-developed-by: Daniel Stone <daniels@collabora.com>
Co-developed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Co-developed-by: Helen Koike <helen.koike@collabora.com>
Co-developed-by: David Heidelberg <david.heidelberg@collabora.com>
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20855>
 2023-01-23 19:13:13 +00:00
Georg Lehmann e527f686ca Revert "aco: Combine v_cvt_u32_f32 with insert to v_cvt_pk_u8_f32." 
This reverts commit 6d02054047.

v_cvt_pk_u8_f32 returns 0xff instead of v_cvt_u32_f32 & 0xff if the input is
larger than 255.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8128

Cc: mesa-stable
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20829>
 2023-01-23 16:22:55 +00:00
Rhys Perry 26e4621fa2 aco/tests: update assembler tests for latest LLVM 16 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20747>
 2023-01-23 12:30:28 +00:00
Rhys Perry b0fa106dc6 aco/tests: fix assembler.gfx11.vop12c_v128 with LLVM 15 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8089
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20747>
 2023-01-23 12:30:28 +00:00
Erik Faye-Lund 9f4f131f2e radeonsi: respect smoothing_enabled 
When this was last changed, the smoothing_enabled flag seems to have
been forgotten about, breaking line-smoothing (and probably also polygon
smoothing).

Fixes: 4147add280 ("radeonsi: update db_eqaa even if msaa is disabled")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20810>
 2023-01-23 08:41:04 +00:00
Mike Blumenkrantz 5bbeb8f507 radv: add an early out in radv_cmd_buffer_flush_dynamic_state() 
no point checking all the states if they're known to be unset

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20653>
 2023-01-22 13:27:23 +01:00
Konstantin Seurer d59683ab89 radv: Enable extended SAH for shallow BVHs 
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20656>
 2023-01-21 20:26:41 +00:00
Konstantin Seurer da87c2883d radv: Wrap internal build type inside a build_config struct 
This will be useful for finer control over build configurations.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20656>
 2023-01-21 20:26:41 +00:00
Konstantin Seurer c53eb2f3d4 radv: Add a shader variant for PLOC with extended SAH 
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20656>
 2023-01-21 20:26:41 +00:00
Konstantin Seurer b1755c0b21 radv/bvh: Add a define for extended SAH 
This will be used to only chose depth aware SAH when we know that it's
more optimal and doesn't increase build overhead too much.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20656>
 2023-01-21 20:26:41 +00:00
Konstantin Seurer 13a8a4071a radv/bvh/meson: Add the option to set defines 
This is useful for compiling different variants of the same shader.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20656>
 2023-01-21 20:26:41 +00:00
Mike Blumenkrantz b3fd72fd09 radv: remove redundant type sizing 
this is already 8 bits

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20751>
 2023-01-20 19:43:43 +00:00
Mike Blumenkrantz 46e2cc5d4c radv: add some graphics pipeline hints to optimize pipeline bind 
this is a costly function, and we want to avoid loading random struct data
as much as possible

these struct members aren't accessed anywhere else in the function, so eliminating
access avoids some cpu overhead

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20751>
 2023-01-20 19:43:43 +00:00
Mike Blumenkrantz 8fc5d93060 radv: simplify depth aspect check in radv_handle_image_transition() 
this info is already available, so reduce cpu overhead

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20751>
 2023-01-20 19:43:43 +00:00
Mike Blumenkrantz f9ff2d9d07 radv: reorder dynamic state checks during bind 
this avoids potential out-of-order reads from a struct that spans
18 CPU cachelines

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20751>
 2023-01-20 19:43:43 +00:00
Mike Blumenkrantz 83c290ff84 radv: repack radv_graphics_pipeline struct 
this reduces the number of cachelines used by the struct and allows for
improved memory access

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20751>
 2023-01-20 19:43:43 +00:00
Samuel Pitoiset 473732dfd1 radv: remove an old FIXME about a possible bug with TC-compat HTILE 
I added this FIXME 2 years ago because it was unclear if it was
broken or not. Since, CTS coverage improved and the number of tests
with depth/stencil on the compute queue increased a lot. vkd3d-proton
also widely uses depth/stencil with GENERAL on GFX10+ and likely with
async compute as well. No issues so far.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4048
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20785>
 2023-01-20 17:07:26 +00:00
Timur Kristóf 08f6d14b85 radv: Make NGG query emission a dirty flag. 
Don't emit the NGG query user SGPR if its state doesn't change.
Based on original work by Mike Blumenkrantz.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18819>
 2023-01-20 14:31:45 +00:00
Samuel Pitoiset f42521f6c3 radv: advertise extendedDynamicState3ColorBlendEquation 
This enables full ds3 support with Zink!

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20281>
 2023-01-20 11:55:07 +00:00
Samuel Pitoiset de1e2b65db radv: fix detecting that blend is enabled when all CB states are dynamic 
It's allowed to be NULL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20281>
 2023-01-20 11:55:07 +00:00
Samuel Pitoiset 4041be0f6f radv: enable compiling PS epilogs on-demand for dynamic color blend equations 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20281>
 2023-01-20 11:55:07 +00:00
Samuel Pitoiset daa2aeaa0c radv: add support for dynamic blend equation 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20281>
 2023-01-20 11:55:06 +00:00
Samuel Pitoiset 11382a6711 radv: add a new helper for normalizing blend factors 
It will be also used when compiling PS epilogs on-demand.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20281>
 2023-01-20 11:55:06 +00:00
Samuel Pitoiset 39dcac4f79 radv: move some color blend helpers to radv_private.h 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20281>
 2023-01-20 11:55:06 +00:00