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b3fd72fd091ee2e96813b1965d46bf22dae6e8f6
mesa/src/amd
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Mike Blumenkrantz b3fd72fd09 radv: remove redundant type sizing
this is already 8 bits

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20751>
2023-01-20 19:43:43 +00:00
..
addrlib
meson: Enable initialized-but-unused warning for MSVC
2022-11-17 21:20:38 +00:00
ci
ci/piglit: 2023-01-19 uprev
2023-01-19 23:46:44 +00:00
common
radv: rename ac_surf_nbc_view::max_mip to num_levels
2023-01-19 12:46:07 +00:00
compiler
meson: replace uses of ExternalProgram.path with .full_path
2023-01-19 16:29:03 +00:00
drm-shim
r300: use drm_shim_override
2022-11-16 14:37:47 +00:00
llvm
ac/llvm: add support for fp32 addition atomics
2023-01-17 17:39:15 +00:00
registers
amd/registers: regenerate gfx11 headers from amd-staging-drm-next
2022-11-04 00:42:08 +00:00
vulkan
radv: remove redundant type sizing
2023-01-20 19:43:43 +00:00
.clang-format
radv: Add nir_foreach_variable_with_modes to .clang-format
2022-12-09 07:07:10 +00:00
meson.build
meson: build radeon drm-shim also for r300 and r600
2022-11-16 14:37:47 +00:00
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